1 //===- InstrSelection.cpp - Machine Independant Inst Selection Driver -----===//
3 // Machine-independent driver file for instruction selection. This file
4 // constructs a forest of BURG instruction trees and then uses the
5 // BURG-generated tree grammar (BURM) to find the optimal instruction sequences
6 // for a given machine.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/CodeGen/InstrSelection.h"
11 #include "llvm/CodeGen/InstrSelectionSupport.h"
12 #include "llvm/CodeGen/InstrForest.h"
13 #include "llvm/CodeGen/MachineCodeForInstruction.h"
14 #include "llvm/CodeGen/MachineCodeForBasicBlock.h"
15 #include "llvm/CodeGen/MachineCodeForMethod.h"
16 #include "llvm/Target/MachineRegInfo.h"
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Function.h"
19 #include "llvm/iPHINode.h"
20 #include "llvm/Pass.h"
21 #include "Support/CommandLine.h"
22 #include "Support/LeakDetector.h"
27 //===--------------------------------------------------------------------===//
28 // SelectDebugLevel - Allow command line control over debugging.
30 enum SelectDebugLevel_t {
32 Select_PrintMachineCode,
33 Select_DebugInstTrees,
34 Select_DebugBurgTrees,
37 // Enable Debug Options to be specified on the command line
38 cl::opt<SelectDebugLevel_t>
39 SelectDebugLevel("dselect", cl::Hidden,
40 cl::desc("enable instruction selection debug information"),
42 clEnumValN(Select_NoDebugInfo, "n", "disable debug output"),
43 clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"),
44 clEnumValN(Select_DebugInstTrees, "i",
45 "print debugging info for instruction selection"),
46 clEnumValN(Select_DebugBurgTrees, "b", "print burg trees"),
50 //===--------------------------------------------------------------------===//
51 // InstructionSelection Pass
53 // This is the actual pass object that drives the instruction selection
56 class InstructionSelection : public FunctionPass {
57 TargetMachine &Target;
58 void InsertCodeForPhis(Function &F);
59 void InsertPhiElimInstructions(BasicBlock *BB,
60 const vector<MachineInstr*>& CpVec);
61 void SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt);
62 void PostprocessMachineCodeForTree(InstructionNode* instrNode,
63 int ruleForNode, short* nts);
65 InstructionSelection(TargetMachine &T) : Target(T) {}
67 bool runOnFunction(Function &F);
71 // Register the pass...
72 static RegisterLLC<InstructionSelection>
73 X("instselect", "Instruction Selection", createInstructionSelectionPass);
75 TmpInstruction::TmpInstruction(Value *s1, Value *s2, const std::string &name)
76 : Instruction(s1->getType(), Instruction::UserOp1, name) {
77 Operands.push_back(Use(s1, this)); // s1 must be nonnull
79 Operands.push_back(Use(s2, this));
82 // TmpInstructions should not be garbage checked.
83 LeakDetector::removeGarbageObject(this);
86 // Constructor that requires the type of the temporary to be specified.
87 // Both S1 and S2 may be NULL.(
88 TmpInstruction::TmpInstruction(const Type *Ty, Value *s1, Value* s2,
89 const std::string &name)
90 : Instruction(Ty, Instruction::UserOp1, name) {
91 if (s1) { Operands.push_back(Use(s1, this)); }
92 if (s2) { Operands.push_back(Use(s2, this)); }
94 // TmpInstructions should not be garbage checked.
95 LeakDetector::removeGarbageObject(this);
99 bool InstructionSelection::runOnFunction(Function &F)
102 // Build the instruction trees to be given as inputs to BURG.
104 InstrForest instrForest(&F);
106 if (SelectDebugLevel >= Select_DebugInstTrees)
108 cerr << "\n\n*** Input to instruction selection for function "
109 << F.getName() << "\n\n" << F
110 << "\n\n*** Instruction trees for function "
111 << F.getName() << "\n\n";
116 // Invoke BURG instruction selection for each tree
118 for (InstrForest::const_root_iterator RI = instrForest.roots_begin();
119 RI != instrForest.roots_end(); ++RI)
121 InstructionNode* basicNode = *RI;
122 assert(basicNode->parent() == NULL && "A `root' node has a parent?");
124 // Invoke BURM to label each tree node with a state
125 burm_label(basicNode);
127 if (SelectDebugLevel >= Select_DebugBurgTrees)
129 printcover(basicNode, 1, 0);
130 cerr << "\nCover cost == " << treecost(basicNode, 1, 0) << "\n\n";
131 printMatches(basicNode);
134 // Then recursively walk the tree to select instructions
135 SelectInstructionsForTree(basicNode, /*goalnt*/1);
139 // Record instructions in the vector for each basic block
141 for (Function::iterator BI = F.begin(), BE = F.end(); BI != BE; ++BI)
142 for (BasicBlock::iterator II = BI->begin(); II != BI->end(); ++II) {
143 MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(II);
144 MachineCodeForBasicBlock &MCBB = MachineCodeForBasicBlock::get(BI);
145 MCBB.insert(MCBB.end(), mvec.begin(), mvec.end());
148 // Insert phi elimination code
149 InsertCodeForPhis(F);
151 if (SelectDebugLevel >= Select_PrintMachineCode)
153 cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
154 MachineCodeForMethod::get(&F).dump();
161 //-------------------------------------------------------------------------
162 // This method inserts phi elimination code for all BBs in a method
163 //-------------------------------------------------------------------------
166 InstructionSelection::InsertCodeForPhis(Function &F)
168 // for all basic blocks in function
170 for (Function::iterator BB = F.begin(); BB != F.end(); ++BB) {
171 BasicBlock::InstListType &InstList = BB->getInstList();
172 for (BasicBlock::iterator IIt = InstList.begin();
173 PHINode *PN = dyn_cast<PHINode>(&*IIt); ++IIt) {
174 // FIXME: This is probably wrong...
175 Value *PhiCpRes = new PHINode(PN->getType(), "PhiCp:");
177 // for each incoming value of the phi, insert phi elimination
179 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
180 // insert the copy instruction to the predecessor BB
181 vector<MachineInstr*> mvec, CpVec;
182 Target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PhiCpRes,
184 for (vector<MachineInstr*>::iterator MI=mvec.begin();
185 MI != mvec.end(); ++MI) {
186 vector<MachineInstr*> CpVec2 =
187 FixConstantOperandsForInstr(PN, *MI, Target);
188 CpVec2.push_back(*MI);
189 CpVec.insert(CpVec.end(), CpVec2.begin(), CpVec2.end());
192 InsertPhiElimInstructions(PN->getIncomingBlock(i), CpVec);
195 vector<MachineInstr*> mvec;
196 Target.getRegInfo().cpValue2Value(PhiCpRes, PN, mvec);
198 // get an iterator to machine instructions in the BB
199 MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(BB);
201 bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end());
202 } // for each Phi Instr in BB
203 } // for all BBs in function
206 //-------------------------------------------------------------------------
207 // Thid method inserts a copy instruction to a predecessor BB as a result
208 // of phi elimination.
209 //-------------------------------------------------------------------------
212 InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB,
213 const vector<MachineInstr*>& CpVec)
215 Instruction *TermInst = (Instruction*)BB->getTerminator();
216 MachineCodeForInstruction &MC4Term = MachineCodeForInstruction::get(TermInst);
217 MachineInstr *FirstMIOfTerm = MC4Term.front();
219 assert (FirstMIOfTerm && "No Machine Instrs for terminator");
221 MachineCodeForBasicBlock &bbMvec = MachineCodeForBasicBlock::get(BB);
223 // find the position of first machine instruction generated by the
224 // terminator of this BB
225 MachineCodeForBasicBlock::iterator MCIt =
226 std::find(bbMvec.begin(), bbMvec.end(), FirstMIOfTerm);
228 assert( MCIt != bbMvec.end() && "Start inst of terminator not found");
230 // insert the copy instructions just before the first machine instruction
231 // generated for the terminator
232 bbMvec.insert(MCIt, CpVec.begin(), CpVec.end());
236 //---------------------------------------------------------------------------
237 // Function SelectInstructionsForTree
239 // Recursively walk the tree to select instructions.
240 // Do this top-down so that child instructions can exploit decisions
241 // made at the child instructions.
243 // E.g., if br(setle(reg,const)) decides the constant is 0 and uses
244 // a branch-on-integer-register instruction, then the setle node
245 // can use that information to avoid generating the SUBcc instruction.
247 // Note that this cannot be done bottom-up because setle must do this
248 // only if it is a child of the branch (otherwise, the result of setle
249 // may be used by multiple instructions).
250 //---------------------------------------------------------------------------
253 InstructionSelection::SelectInstructionsForTree(InstrTreeNode* treeRoot,
256 // Get the rule that matches this node.
258 int ruleForNode = burm_rule(treeRoot->state, goalnt);
260 if (ruleForNode == 0) {
261 cerr << "Could not match instruction tree for instr selection\n";
265 // Get this rule's non-terminals and the corresponding child nodes (if any)
267 short *nts = burm_nts[ruleForNode];
269 // First, select instructions for the current node and rule.
270 // (If this is a list node, not an instruction, then skip this step).
271 // This function is specific to the target architecture.
273 if (treeRoot->opLabel != VRegListOp)
275 vector<MachineInstr*> minstrVec;
277 InstructionNode* instrNode = (InstructionNode*)treeRoot;
278 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
280 GetInstructionsByRule(instrNode, ruleForNode, nts, Target, minstrVec);
282 MachineCodeForInstruction &mvec =
283 MachineCodeForInstruction::get(instrNode->getInstruction());
284 mvec.insert(mvec.end(), minstrVec.begin(), minstrVec.end());
287 // Then, recursively compile the child nodes, if any.
290 { // i.e., there is at least one kid
291 InstrTreeNode* kids[2];
292 int currentRule = ruleForNode;
293 burm_kids(treeRoot, currentRule, kids);
295 // First skip over any chain rules so that we don't visit
296 // the current node again.
298 while (ThisIsAChainRule(currentRule))
300 currentRule = burm_rule(treeRoot->state, nts[0]);
301 nts = burm_nts[currentRule];
302 burm_kids(treeRoot, currentRule, kids);
305 // Now we have the first non-chain rule so we have found
306 // the actual child nodes. Recursively compile them.
308 for (unsigned i = 0; nts[i]; i++)
311 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
312 if (nodeType == InstrTreeNode::NTVRegListNode ||
313 nodeType == InstrTreeNode::NTInstructionNode)
314 SelectInstructionsForTree(kids[i], nts[i]);
318 // Finally, do any postprocessing on this node after its children
319 // have been translated
321 if (treeRoot->opLabel != VRegListOp)
322 PostprocessMachineCodeForTree((InstructionNode*)treeRoot, ruleForNode, nts);
325 //---------------------------------------------------------------------------
326 // Function PostprocessMachineCodeForTree
328 // Apply any final cleanups to machine code for the root of a subtree
329 // after selection for all its children has been completed.
332 InstructionSelection::PostprocessMachineCodeForTree(InstructionNode* instrNode,
336 // Fix up any constant operands in the machine instructions to either
337 // use an immediate field or to load the constant into a register
338 // Walk backwards and use direct indexes to allow insertion before current
340 Instruction* vmInstr = instrNode->getInstruction();
341 MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(vmInstr);
342 for (unsigned i = mvec.size(); i != 0; --i)
344 vector<MachineInstr*> loadConstVec =
345 FixConstantOperandsForInstr(vmInstr, mvec[i-1], Target);
347 mvec.insert(mvec.begin()+i-1, loadConstVec.begin(), loadConstVec.end());
353 //===----------------------------------------------------------------------===//
354 // createInstructionSelectionPass - Public entrypoint for instruction selection
355 // and this file as a whole...
357 Pass *createInstructionSelectionPass(TargetMachine &T) {
358 return new InstructionSelection(T);