2 //***************************************************************************
4 // InstrSelectionSupport.h
7 // Target-independent instruction selection code.
8 // See SparcInstrSelection.cpp for usage.
11 // 10/10/01 - Vikram Adve - Created
12 //**************************************************************************/
14 #include "llvm/CodeGen/InstrSelectionSupport.h"
15 #include "llvm/CodeGen/InstrSelection.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/MachineCodeForInstruction.h"
18 #include "llvm/CodeGen/MachineCodeForMethod.h"
19 #include "llvm/CodeGen/InstrForest.h"
20 #include "llvm/Target/TargetMachine.h"
21 #include "llvm/Target/MachineRegInfo.h"
22 #include "llvm/ConstantVals.h"
23 #include "llvm/Function.h"
24 #include "llvm/BasicBlock.h"
25 #include "llvm/Type.h"
26 #include "llvm/iMemory.h"
29 //*************************** Local Functions ******************************/
32 static TmpInstruction*
33 InsertCodeToLoadConstant(Function *F,
36 vector<MachineInstr*>& loadConstVec,
37 TargetMachine& target)
39 vector<TmpInstruction*> tempVec;
41 // Create a tmp virtual register to hold the constant.
42 TmpInstruction* tmpReg = new TmpInstruction(opValue);
43 MachineCodeForInstruction &MCFI = MachineCodeForInstruction::get(vmInstr);
46 target.getInstrInfo().CreateCodeToLoadConst(F, opValue, tmpReg,
47 loadConstVec, tempVec);
49 // Register the new tmp values created for this m/c instruction sequence
50 for (unsigned i=0; i < tempVec.size(); i++)
51 MCFI.addTemp(tempVec[i]);
53 // Record the mapping from the tmp VM instruction to machine instruction.
54 // Do this for all machine instructions that were not mapped to any
55 // other temp values created by
56 // tmpReg->addMachineInstruction(loadConstVec.back());
62 //---------------------------------------------------------------------------
63 // Function GetConstantValueAsSignedInt
65 // Convenience function to get the value of an integer constant, for an
66 // appropriate integer or non-integer type that can be held in an integer.
67 // The type of the argument must be the following:
68 // Signed or unsigned integer
72 // isValidConstant is set to true if a valid constant was found.
73 //---------------------------------------------------------------------------
76 GetConstantValueAsSignedInt(const Value *V,
77 bool &isValidConstant)
79 if (!isa<Constant>(V))
81 isValidConstant = false;
85 isValidConstant = true;
87 if (V->getType() == Type::BoolTy)
88 return (int64_t) cast<ConstantBool>(V)->getValue();
90 if (V->getType()->isIntegral())
92 if (V->getType()->isSigned())
93 return cast<ConstantSInt>(V)->getValue();
95 assert(V->getType()->isUnsigned());
96 uint64_t Val = cast<ConstantUInt>(V)->getValue();
97 if (Val < INT64_MAX) // then safe to cast to signed
101 isValidConstant = false;
106 //---------------------------------------------------------------------------
107 // Function: FoldGetElemChain
110 // Fold a chain of GetElementPtr instructions containing only
111 // structure offsets into an equivalent (Pointer, IndexVector) pair.
112 // Returns the pointer Value, and stores the resulting IndexVector
113 // in argument chainIdxVec.
114 //---------------------------------------------------------------------------
117 FoldGetElemChain(const InstructionNode* getElemInstrNode,
118 vector<Value*>& chainIdxVec)
120 MemAccessInst* getElemInst = (MemAccessInst*)
121 getElemInstrNode->getInstruction();
123 // Return NULL if we don't fold any instructions in.
124 Value* ptrVal = NULL;
126 // The incoming index vector must be for the user of the chain.
127 // Its leading index must be [0] and we insert indices after that.
128 assert(chainIdxVec.size() > 0 &&
129 isa<ConstantUInt>(chainIdxVec.front()) &&
130 cast<ConstantUInt>(chainIdxVec.front())->getValue() == 0);
132 // Now chase the chain of getElementInstr instructions, if any.
133 // Check for any array indices and stop there.
135 const InstrTreeNode* ptrChild = getElemInstrNode;
136 while (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
137 ptrChild->getOpLabel() == GetElemPtrIdx)
139 // Child is a GetElemPtr instruction
140 getElemInst = (MemAccessInst*)
141 ((InstructionNode*) ptrChild)->getInstruction();
142 const vector<Value*>& idxVec = getElemInst->copyIndices();
143 bool allStructureOffsets = true;
145 // If it is a struct* access, the first offset must be array index [0],
146 // and all other offsets must be structure (not array) offsets
147 if (!isa<ConstantUInt>(idxVec.front()) ||
148 cast<ConstantUInt>(idxVec.front())->getValue() != 0)
149 allStructureOffsets = false;
151 if (allStructureOffsets)
152 for (unsigned int i=1; i < idxVec.size(); i++)
153 if (idxVec[i]->getType() == Type::UIntTy)
155 allStructureOffsets = false;
159 if (allStructureOffsets)
160 { // Get pointer value out of ptrChild.
161 ptrVal = getElemInst->getPointerOperand();
163 // Insert its index vector at the start, but after the leading [0]
164 chainIdxVec.insert(chainIdxVec.begin()+1,
165 idxVec.begin()+1, idxVec.end());
167 // Mark the folded node so no code is generated for it.
168 ((InstructionNode*) ptrChild)->markFoldedIntoParent();
170 else // cannot fold this getElementPtr instr. or any further ones
173 ptrChild = ptrChild->leftChild();
180 //------------------------------------------------------------------------
181 // Function Set2OperandsFromInstr
182 // Function Set3OperandsFromInstr
184 // For the common case of 2- and 3-operand arithmetic/logical instructions,
185 // set the m/c instr. operands directly from the VM instruction's operands.
186 // Check whether the first or second operand is 0 and can use a dedicated "0"
188 // Check whether the second operand should use an immediate field or register.
189 // (First and third operands are never immediates for such instructions.)
192 // canDiscardResult: Specifies that the result operand can be discarded
193 // by using the dedicated "0"
195 // op1position, op2position and resultPosition: Specify in which position
196 // in the machine instruction the 3 operands (arg1, arg2
197 // and result) should go.
199 // RETURN VALUE: unsigned int flags, where
200 // flags & 0x01 => operand 1 is constant and needs a register
201 // flags & 0x02 => operand 2 is constant and needs a register
202 //------------------------------------------------------------------------
205 Set2OperandsFromInstr(MachineInstr* minstr,
206 InstructionNode* vmInstrNode,
207 const TargetMachine& target,
208 bool canDiscardResult,
212 Set3OperandsFromInstr(minstr, vmInstrNode, target,
213 canDiscardResult, op1Position,
214 /*op2Position*/ -1, resultPosition);
219 Set3OperandsFromInstr(MachineInstr* minstr,
220 InstructionNode* vmInstrNode,
221 const TargetMachine& target,
222 bool canDiscardResult,
227 assert(op1Position >= 0);
228 assert(resultPosition >= 0);
231 minstr->SetMachineOperandVal(op1Position, MachineOperand::MO_VirtualRegister,
232 vmInstrNode->leftChild()->getValue());
234 // operand 2 (if any)
235 if (op2Position >= 0)
236 minstr->SetMachineOperandVal(op2Position, MachineOperand::MO_VirtualRegister,
237 vmInstrNode->rightChild()->getValue());
239 // result operand: if it can be discarded, use a dead register if one exists
240 if (canDiscardResult && target.getRegInfo().getZeroRegNum() >= 0)
241 minstr->SetMachineOperandReg(resultPosition,
242 target.getRegInfo().getZeroRegNum());
244 minstr->SetMachineOperandVal(resultPosition,
245 MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
249 MachineOperand::MachineOperandType
250 ChooseRegOrImmed(Value* val,
251 MachineOpCode opCode,
252 const TargetMachine& target,
254 unsigned int& getMachineRegNum,
255 int64_t& getImmedValue)
257 MachineOperand::MachineOperandType opType =
258 MachineOperand::MO_VirtualRegister;
259 getMachineRegNum = 0;
262 // Check for the common case first: argument is not constant
264 Constant *CPV = dyn_cast<Constant>(val);
265 if (!CPV) return opType;
267 if (ConstantBool *CPB = dyn_cast<ConstantBool>(CPV))
269 if (!CPB->getValue() && target.getRegInfo().getZeroRegNum() >= 0)
271 getMachineRegNum = target.getRegInfo().getZeroRegNum();
272 return MachineOperand::MO_MachineRegister;
276 return MachineOperand::MO_SignExtendedImmed;
279 // Otherwise it needs to be an integer or a NULL pointer
280 if (! CPV->getType()->isIntegral() &&
281 ! (CPV->getType()->isPointerType() &&
285 // Now get the constant value and check if it fits in the IMMED field.
286 // Take advantage of the fact that the max unsigned value will rarely
287 // fit into any IMMED field and ignore that case (i.e., cast smaller
288 // unsigned constants to signed).
291 if (CPV->getType()->isPointerType())
295 else if (CPV->getType()->isSigned())
297 intValue = cast<ConstantSInt>(CPV)->getValue();
301 uint64_t V = cast<ConstantUInt>(CPV)->getValue();
302 if (V >= INT64_MAX) return opType;
303 intValue = (int64_t)V;
306 if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
308 opType = MachineOperand::MO_MachineRegister;
309 getMachineRegNum = target.getRegInfo().getZeroRegNum();
311 else if (canUseImmed &&
312 target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
314 opType = MachineOperand::MO_SignExtendedImmed;
315 getImmedValue = intValue;
322 //---------------------------------------------------------------------------
323 // Function: FixConstantOperandsForInstr
326 // Special handling for constant operands of a machine instruction
327 // -- if the constant is 0, use the hardwired 0 register, if any;
328 // -- if the constant fits in the IMMEDIATE field, use that field;
329 // -- else create instructions to put the constant into a register, either
330 // directly or by loading explicitly from the constant pool.
332 // In the first 2 cases, the operand of `minstr' is modified in place.
333 // Returns a vector of machine instructions generated for operands that
334 // fall under case 3; these must be inserted before `minstr'.
335 //---------------------------------------------------------------------------
337 vector<MachineInstr*>
338 FixConstantOperandsForInstr(Instruction* vmInstr,
339 MachineInstr* minstr,
340 TargetMachine& target)
342 vector<MachineInstr*> loadConstVec;
344 const MachineInstrDescriptor& instrDesc =
345 target.getInstrInfo().getDescriptor(minstr->getOpCode());
347 Function *F = vmInstr->getParent()->getParent();
349 for (unsigned op=0; op < minstr->getNumOperands(); op++)
351 const MachineOperand& mop = minstr->getOperand(op);
353 // skip the result position (for efficiency below) and any other
354 // positions already marked as not a virtual register
355 if (instrDesc.resultPos == (int) op ||
356 mop.getOperandType() != MachineOperand::MO_VirtualRegister ||
357 mop.getVRegValue() == NULL)
362 Value* opValue = mop.getVRegValue();
363 bool constantThatMustBeLoaded = false;
365 if (Constant *opConst = dyn_cast<Constant>(opValue))
367 unsigned int machineRegNum;
369 MachineOperand::MachineOperandType opType =
370 ChooseRegOrImmed(opValue, minstr->getOpCode(), target,
371 (target.getInstrInfo().getImmedConstantPos(minstr->getOpCode()) == (int) op),
372 machineRegNum, immedValue);
374 if (opType == MachineOperand::MO_MachineRegister)
375 minstr->SetMachineOperandReg(op, machineRegNum);
376 else if (opType == MachineOperand::MO_VirtualRegister)
377 constantThatMustBeLoaded = true; // load is generated below
379 minstr->SetMachineOperandConst(op, opType, immedValue);
382 if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
383 { // opValue is a constant that must be explicitly loaded into a reg.
384 TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue, vmInstr,
387 minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
393 // Also, check for implicit operands used (not those defined) by the
394 // machine instruction. These include:
395 // -- arguments to a Call
396 // -- return value of a Return
397 // Any such operand that is a constant value needs to be fixed also.
398 // The current instructions with implicit refs (viz., Call and Return)
399 // have no immediate fields, so the constant always needs to be loaded
402 for (unsigned i=0, N=minstr->getNumImplicitRefs(); i < N; ++i)
403 if (isa<Constant>(minstr->getImplicitRef(i)) ||
404 isa<GlobalValue>(minstr->getImplicitRef(i)))
406 Value* oldVal = minstr->getImplicitRef(i);
407 TmpInstruction* tmpReg =
408 InsertCodeToLoadConstant(F, oldVal, vmInstr, loadConstVec, target);
409 minstr->setImplicitRef(i, tmpReg);