1 //===-- InstrSelectionSupport.cpp -----------------------------------------===//
3 // Target-independent instruction selection code. See SparcInstrSelection.cpp
6 //===----------------------------------------------------------------------===//
8 #include "llvm/CodeGen/InstrSelectionSupport.h"
9 #include "llvm/CodeGen/InstrSelection.h"
10 #include "llvm/CodeGen/MachineInstr.h"
11 #include "llvm/CodeGen/MachineInstrAnnot.h"
12 #include "llvm/CodeGen/MachineCodeForInstruction.h"
13 #include "llvm/CodeGen/MachineCodeForMethod.h"
14 #include "llvm/CodeGen/InstrForest.h"
15 #include "llvm/Target/TargetMachine.h"
16 #include "llvm/Target/MachineRegInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Function.h"
19 #include "llvm/Type.h"
20 #include "llvm/iMemory.h"
23 //*************************** Local Functions ******************************/
26 // Generate code to load the constant into a TmpInstruction (virtual reg) and
27 // returns the virtual register.
29 static TmpInstruction*
30 InsertCodeToLoadConstant(Function *F,
33 vector<MachineInstr*>& loadConstVec,
34 TargetMachine& target)
36 // Create a tmp virtual register to hold the constant.
37 TmpInstruction* tmpReg = new TmpInstruction(opValue);
38 MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
41 target.getInstrInfo().CreateCodeToLoadConst(target, F, opValue, tmpReg,
44 // Record the mapping from the tmp VM instruction to machine instruction.
45 // Do this for all machine instructions that were not mapped to any
46 // other temp values created by
47 // tmpReg->addMachineInstruction(loadConstVec.back());
53 //---------------------------------------------------------------------------
54 // Function GetConstantValueAsUnsignedInt
55 // Function GetConstantValueAsSignedInt
57 // Convenience functions to get the value of an integral constant, for an
58 // appropriate integer or non-integer type that can be held in a signed
59 // or unsigned integer respectively. The type of the argument must be
61 // Signed or unsigned integer
65 // isValidConstant is set to true if a valid constant was found.
66 //---------------------------------------------------------------------------
69 GetConstantValueAsUnsignedInt(const Value *V,
70 bool &isValidConstant)
72 isValidConstant = true;
75 if (const ConstantBool *CB = dyn_cast<ConstantBool>(V))
76 return (int64_t)CB->getValue();
77 else if (const ConstantSInt *CS = dyn_cast<ConstantSInt>(V))
78 return (uint64_t)CS->getValue();
79 else if (const ConstantUInt *CU = dyn_cast<ConstantUInt>(V))
80 return CU->getValue();
82 isValidConstant = false;
87 GetConstantValueAsSignedInt(const Value *V,
88 bool &isValidConstant)
90 uint64_t C = GetConstantValueAsUnsignedInt(V, isValidConstant);
91 if (isValidConstant) {
92 if (V->getType()->isSigned() || C < INT64_MAX) // safe to cast to signed
95 isValidConstant = false;
101 //---------------------------------------------------------------------------
102 // Function: FoldGetElemChain
105 // Fold a chain of GetElementPtr instructions containing only
106 // constant offsets into an equivalent (Pointer, IndexVector) pair.
107 // Returns the pointer Value, and stores the resulting IndexVector
108 // in argument chainIdxVec. This is a helper function for
109 // FoldConstantIndices that does the actual folding.
110 //---------------------------------------------------------------------------
113 // Check for a constant 0.
117 return (idx == ConstantSInt::getNullValue(idx->getType()));
121 FoldGetElemChain(InstrTreeNode* ptrNode, vector<Value*>& chainIdxVec,
122 bool lastInstHasLeadingNonZero)
124 InstructionNode* gepNode = dyn_cast<InstructionNode>(ptrNode);
125 GetElementPtrInst* gepInst =
126 dyn_cast_or_null<GetElementPtrInst>(gepNode ? gepNode->getInstruction() :0);
128 // ptr value is not computed in this tree or ptr value does not come from GEP
133 // Return NULL if we don't fold any instructions in.
134 Value* ptrVal = NULL;
136 // Now chase the chain of getElementInstr instructions, if any.
137 // Check for any non-constant indices and stop there.
138 // Also, stop if the first index of child is a non-zero array index
139 // and the last index of the current node is a non-array index:
140 // in that case, a non-array declared type is being accessed as an array
141 // which is not type-safe, but could be legal.
143 InstructionNode* ptrChild = gepNode;
144 while (ptrChild && (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
145 ptrChild->getOpLabel() == GetElemPtrIdx))
147 // Child is a GetElemPtr instruction
148 gepInst = cast<GetElementPtrInst>(ptrChild->getValue());
149 User::op_iterator OI, firstIdx = gepInst->idx_begin();
150 User::op_iterator lastIdx = gepInst->idx_end();
151 bool allConstantOffsets = true;
153 // The first index of every GEP must be an array index.
154 assert((*firstIdx)->getType() == Type::LongTy &&
155 "INTERNAL ERROR: Structure index for a pointer type!");
157 // If the last instruction had a leading non-zero index, check if the
158 // current one references a sequential (i.e., indexable) type.
159 // If not, the code is not type-safe and we would create an illegal GEP
160 // by folding them, so don't fold any more instructions.
162 if (lastInstHasLeadingNonZero)
163 if (! isa<SequentialType>(gepInst->getType()->getElementType()))
164 break; // cannot fold in any preceding getElementPtr instrs.
166 // Check that all offsets are constant for this instruction
167 for (OI = firstIdx; allConstantOffsets && OI != lastIdx; ++OI)
168 allConstantOffsets = isa<ConstantInt>(*OI);
170 if (allConstantOffsets)
171 { // Get pointer value out of ptrChild.
172 ptrVal = gepInst->getPointerOperand();
174 // Remember if it has leading zero index: it will be discarded later.
175 lastInstHasLeadingNonZero = ! IsZero(*firstIdx);
177 // Insert its index vector at the start, skipping any leading [0]
178 chainIdxVec.insert(chainIdxVec.begin(),
179 firstIdx + !lastInstHasLeadingNonZero, lastIdx);
181 // Mark the folded node so no code is generated for it.
182 ((InstructionNode*) ptrChild)->markFoldedIntoParent();
184 // Get the previous GEP instruction and continue trying to fold
185 ptrChild = dyn_cast<InstructionNode>(ptrChild->leftChild());
187 else // cannot fold this getElementPtr instr. or any preceding ones
191 // If the first getElementPtr instruction had a leading [0], add it back.
192 // Note that this instruction is the *last* one successfully folded above.
193 if (ptrVal && ! lastInstHasLeadingNonZero)
194 chainIdxVec.insert(chainIdxVec.begin(), ConstantSInt::get(Type::LongTy,0));
200 //---------------------------------------------------------------------------
201 // Function: GetGEPInstArgs
204 // Helper function for GetMemInstArgs that handles the final getElementPtr
205 // instruction used by (or same as) the memory operation.
206 // Extracts the indices of the current instruction and tries to fold in
207 // preceding ones if all indices of the current one are constant.
208 //---------------------------------------------------------------------------
211 GetGEPInstArgs(InstructionNode* gepNode,
212 vector<Value*>& idxVec,
213 bool& allConstantIndices)
215 allConstantIndices = true;
216 GetElementPtrInst* gepI = cast<GetElementPtrInst>(gepNode->getInstruction());
218 // Default pointer is the one from the current instruction.
219 Value* ptrVal = gepI->getPointerOperand();
220 InstrTreeNode* ptrChild = gepNode->leftChild();
222 // Extract the index vector of the GEP instructin.
223 // If all indices are constant and first index is zero, try to fold
224 // in preceding GEPs with all constant indices.
225 for (User::op_iterator OI=gepI->idx_begin(), OE=gepI->idx_end();
226 allConstantIndices && OI != OE; ++OI)
227 if (! isa<Constant>(*OI))
228 allConstantIndices = false; // note: this also terminates loop!
230 // If we have only constant indices, fold chains of constant indices
231 // in this and any preceding GetElemPtr instructions.
232 bool foldedGEPs = false;
233 bool leadingNonZeroIdx = gepI && ! IsZero(*gepI->idx_begin());
234 if (allConstantIndices)
235 if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec, leadingNonZeroIdx))
241 // Append the index vector of the current instruction.
242 // Skip the leading [0] index if preceding GEPs were folded into this.
243 idxVec.insert(idxVec.end(),
244 gepI->idx_begin() + (foldedGEPs && !leadingNonZeroIdx),
250 //---------------------------------------------------------------------------
251 // Function: GetMemInstArgs
254 // Get the pointer value and the index vector for a memory operation
255 // (GetElementPtr, Load, or Store). If all indices of the given memory
256 // operation are constant, fold in constant indices in a chain of
257 // preceding GetElementPtr instructions (if any), and return the
258 // pointer value of the first instruction in the chain.
259 // All folded instructions are marked so no code is generated for them.
262 // Returns the pointer Value to use.
263 // Returns the resulting IndexVector in idxVec.
264 // Returns true/false in allConstantIndices if all indices are/aren't const.
265 //---------------------------------------------------------------------------
268 GetMemInstArgs(InstructionNode* memInstrNode,
269 vector<Value*>& idxVec,
270 bool& allConstantIndices)
272 allConstantIndices = false;
273 Instruction* memInst = memInstrNode->getInstruction();
274 assert(idxVec.size() == 0 && "Need empty vector to return indices");
276 // If there is a GetElemPtr instruction to fold in to this instr,
277 // it must be in the left child for Load and GetElemPtr, and in the
278 // right child for Store instructions.
279 InstrTreeNode* ptrChild = (memInst->getOpcode() == Instruction::Store
280 ? memInstrNode->rightChild()
281 : memInstrNode->leftChild());
283 // Default pointer is the one from the current instruction.
284 Value* ptrVal = ptrChild->getValue();
286 // Find the "last" GetElemPtr instruction: this one or the immediate child.
287 // There will be none if this is a load or a store from a scalar pointer.
288 InstructionNode* gepNode = NULL;
289 if (isa<GetElementPtrInst>(memInst))
290 gepNode = memInstrNode;
291 else if (isa<InstructionNode>(ptrChild) && isa<GetElementPtrInst>(ptrVal))
292 { // Child of load/store is a GEP and memInst is its only use.
293 // Use its indices and mark it as folded.
294 gepNode = cast<InstructionNode>(ptrChild);
295 gepNode->markFoldedIntoParent();
298 // If there are no indices, return the current pointer.
299 // Else extract the pointer from the GEP and fold the indices.
300 return (gepNode)? GetGEPInstArgs(gepNode, idxVec, allConstantIndices)
305 //------------------------------------------------------------------------
306 // Function Set2OperandsFromInstr
307 // Function Set3OperandsFromInstr
309 // For the common case of 2- and 3-operand arithmetic/logical instructions,
310 // set the m/c instr. operands directly from the VM instruction's operands.
311 // Check whether the first or second operand is 0 and can use a dedicated "0"
313 // Check whether the second operand should use an immediate field or register.
314 // (First and third operands are never immediates for such instructions.)
317 // canDiscardResult: Specifies that the result operand can be discarded
318 // by using the dedicated "0"
320 // op1position, op2position and resultPosition: Specify in which position
321 // in the machine instruction the 3 operands (arg1, arg2
322 // and result) should go.
324 //------------------------------------------------------------------------
327 Set2OperandsFromInstr(MachineInstr* minstr,
328 InstructionNode* vmInstrNode,
329 const TargetMachine& target,
330 bool canDiscardResult,
334 Set3OperandsFromInstr(minstr, vmInstrNode, target,
335 canDiscardResult, op1Position,
336 /*op2Position*/ -1, resultPosition);
341 Set3OperandsFromInstr(MachineInstr* minstr,
342 InstructionNode* vmInstrNode,
343 const TargetMachine& target,
344 bool canDiscardResult,
349 assert(op1Position >= 0);
350 assert(resultPosition >= 0);
353 minstr->SetMachineOperandVal(op1Position, MachineOperand::MO_VirtualRegister,
354 vmInstrNode->leftChild()->getValue());
356 // operand 2 (if any)
357 if (op2Position >= 0)
358 minstr->SetMachineOperandVal(op2Position, MachineOperand::MO_VirtualRegister,
359 vmInstrNode->rightChild()->getValue());
361 // result operand: if it can be discarded, use a dead register if one exists
362 if (canDiscardResult && target.getRegInfo().getZeroRegNum() >= 0)
363 minstr->SetMachineOperandReg(resultPosition,
364 target.getRegInfo().getZeroRegNum());
366 minstr->SetMachineOperandVal(resultPosition,
367 MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
371 MachineOperand::MachineOperandType
372 ChooseRegOrImmed(int64_t intValue,
374 MachineOpCode opCode,
375 const TargetMachine& target,
377 unsigned int& getMachineRegNum,
378 int64_t& getImmedValue)
380 MachineOperand::MachineOperandType opType=MachineOperand::MO_VirtualRegister;
381 getMachineRegNum = 0;
385 target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
387 opType = isSigned? MachineOperand::MO_SignExtendedImmed
388 : MachineOperand::MO_UnextendedImmed;
389 getImmedValue = intValue;
391 else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
393 opType = MachineOperand::MO_MachineRegister;
394 getMachineRegNum = target.getRegInfo().getZeroRegNum();
401 MachineOperand::MachineOperandType
402 ChooseRegOrImmed(Value* val,
403 MachineOpCode opCode,
404 const TargetMachine& target,
406 unsigned int& getMachineRegNum,
407 int64_t& getImmedValue)
409 getMachineRegNum = 0;
412 // To use reg or immed, constant needs to be integer, bool, or a NULL pointer
413 Constant *CPV = dyn_cast<Constant>(val);
415 (! CPV->getType()->isIntegral() &&
416 ! (isa<PointerType>(CPV->getType()) && CPV->isNullValue())))
417 return MachineOperand::MO_VirtualRegister;
419 // Now get the constant value and check if it fits in the IMMED field.
420 // Take advantage of the fact that the max unsigned value will rarely
421 // fit into any IMMED field and ignore that case (i.e., cast smaller
422 // unsigned constants to signed).
425 if (isa<PointerType>(CPV->getType()))
426 intValue = 0; // We checked above that it is NULL
427 else if (ConstantBool* CB = dyn_cast<ConstantBool>(CPV))
428 intValue = (int64_t) CB->getValue();
429 else if (CPV->getType()->isSigned())
430 intValue = cast<ConstantSInt>(CPV)->getValue();
432 { // get the int value and sign-extend if original was less than 64 bits
433 intValue = (int64_t) cast<ConstantUInt>(CPV)->getValue();
434 switch(CPV->getType()->getPrimitiveID())
436 case Type::UByteTyID: intValue = (int64_t) (int8_t) intValue; break;
437 case Type::UShortTyID: intValue = (int64_t) (short) intValue; break;
438 case Type::UIntTyID: intValue = (int64_t) (int) intValue; break;
443 return ChooseRegOrImmed(intValue, CPV->getType()->isSigned(),
444 opCode, target, canUseImmed,
445 getMachineRegNum, getImmedValue);
449 //---------------------------------------------------------------------------
450 // Function: FixConstantOperandsForInstr
453 // Special handling for constant operands of a machine instruction
454 // -- if the constant is 0, use the hardwired 0 register, if any;
455 // -- if the constant fits in the IMMEDIATE field, use that field;
456 // -- else create instructions to put the constant into a register, either
457 // directly or by loading explicitly from the constant pool.
459 // In the first 2 cases, the operand of `minstr' is modified in place.
460 // Returns a vector of machine instructions generated for operands that
461 // fall under case 3; these must be inserted before `minstr'.
462 //---------------------------------------------------------------------------
464 vector<MachineInstr*>
465 FixConstantOperandsForInstr(Instruction* vmInstr,
466 MachineInstr* minstr,
467 TargetMachine& target)
469 vector<MachineInstr*> loadConstVec;
471 MachineOpCode opCode = minstr->getOpCode();
472 const MachineInstrInfo& instrInfo = target.getInstrInfo();
473 const MachineInstrDescriptor& instrDesc = instrInfo.getDescriptor(opCode);
474 int immedPos = instrInfo.getImmedConstantPos(opCode);
476 Function *F = vmInstr->getParent()->getParent();
478 for (unsigned op=0; op < minstr->getNumOperands(); op++)
480 const MachineOperand& mop = minstr->getOperand(op);
482 // Skip the result position, preallocated machine registers, or operands
483 // that cannot be constants (CC regs or PC-relative displacements)
484 if (instrDesc.resultPos == (int) op ||
485 mop.getOperandType() == MachineOperand::MO_MachineRegister ||
486 mop.getOperandType() == MachineOperand::MO_CCRegister ||
487 mop.getOperandType() == MachineOperand::MO_PCRelativeDisp)
490 bool constantThatMustBeLoaded = false;
491 unsigned int machineRegNum = 0;
492 int64_t immedValue = 0;
493 Value* opValue = NULL;
494 MachineOperand::MachineOperandType opType =
495 MachineOperand::MO_VirtualRegister;
497 // Operand may be a virtual register or a compile-time constant
498 if (mop.getOperandType() == MachineOperand::MO_VirtualRegister)
500 assert(mop.getVRegValue() != NULL);
501 opValue = mop.getVRegValue();
502 if (Constant *opConst = dyn_cast<Constant>(opValue))
504 opType = ChooseRegOrImmed(opConst, opCode, target,
505 (immedPos == (int)op), machineRegNum, immedValue);
506 if (opType == MachineOperand::MO_VirtualRegister)
507 constantThatMustBeLoaded = true;
512 assert(mop.getOperandType() == MachineOperand::MO_SignExtendedImmed ||
513 mop.getOperandType() == MachineOperand::MO_UnextendedImmed);
515 bool isSigned = (mop.getOperandType() ==
516 MachineOperand::MO_SignExtendedImmed);
518 // Bit-selection flags indicate an instruction that is extracting
519 // bits from its operand so ignore this even if it is a big constant.
520 if (mop.opHiBits32() || mop.opLoBits32() ||
521 mop.opHiBits64() || mop.opLoBits64())
524 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
525 opCode, target, (immedPos == (int)op),
526 machineRegNum, immedValue);
528 if (opType == mop.getOperandType())
529 continue; // no change: this is the most common case
531 if (opType == MachineOperand::MO_VirtualRegister)
533 constantThatMustBeLoaded = true;
535 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
536 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
540 if (opType == MachineOperand::MO_MachineRegister)
541 minstr->SetMachineOperandReg(op, machineRegNum);
542 else if (opType == MachineOperand::MO_SignExtendedImmed ||
543 opType == MachineOperand::MO_UnextendedImmed)
544 minstr->SetMachineOperandConst(op, opType, immedValue);
545 else if (constantThatMustBeLoaded ||
546 (opValue && isa<GlobalValue>(opValue)))
547 { // opValue is a constant that must be explicitly loaded into a reg
549 TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue, vmInstr,
550 loadConstVec, target);
551 minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
556 // Also, check for implicit operands used by the machine instruction
557 // (no need to check those defined since they cannot be constants).
559 // -- arguments to a Call
560 // -- return value of a Return
561 // Any such operand that is a constant value needs to be fixed also.
562 // The current instructions with implicit refs (viz., Call and Return)
563 // have no immediate fields, so the constant always needs to be loaded
566 bool isCall = instrInfo.isCall(opCode);
567 unsigned lastCallArgNum = 0; // unused if not a call
568 CallArgsDescriptor* argDesc = NULL; // unused if not a call
570 argDesc = CallArgsDescriptor::get(minstr);
572 for (unsigned i=0, N=minstr->getNumImplicitRefs(); i < N; ++i)
573 if (isa<Constant>(minstr->getImplicitRef(i)) ||
574 isa<GlobalValue>(minstr->getImplicitRef(i)))
576 Value* oldVal = minstr->getImplicitRef(i);
577 TmpInstruction* tmpReg =
578 InsertCodeToLoadConstant(F, oldVal, vmInstr, loadConstVec, target);
579 minstr->setImplicitRef(i, tmpReg);
582 { // find and replace the argument in the CallArgsDescriptor
583 unsigned i=lastCallArgNum;
584 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
586 assert(i < argDesc->getNumArgs() &&
587 "Constant operands to a call *must* be in the arg list");
589 argDesc->getArgInfo(i).replaceArgVal(tmpReg);