1 #include "llvm/CodeGen/LiveRangeInfo.h"
3 LiveRangeInfo::LiveRangeInfo(const Method *const M,
4 const TargetMachine& tm,
5 vector<RegClass *> &RCL)
6 : Meth(M), LiveRangeMap(),
7 TM(tm), RegClassList(RCL),
13 // union two live ranges into one. The 2nd LR is deleted. Used for coalescing.
14 // Note: the caller must make sure that L1 and L2 are distinct and both
15 // LRs don't have suggested colors
17 void LiveRangeInfo::unionAndUpdateLRs(LiveRange *const L1, LiveRange *L2)
20 L1->setUnion( L2 ); // add elements of L2 to L1
21 ValueSet::iterator L2It;
23 for( L2It = L2->begin() ; L2It != L2->end(); ++L2It) {
25 //assert(( L1->getTypeID() == L2->getTypeID()) && "Merge:Different types");
27 L1->add( *L2It ); // add the var in L2 to L1
28 LiveRangeMap[ *L2It ] = L1; // now the elements in L2 should map to L1
32 // Now if LROfDef(L1) has a suggested color, it will remain.
33 // But, if LROfUse(L2) has a suggested color, the new range
34 // must have the same color.
36 if(L2->hasSuggestedColor())
37 L1->setSuggestedColor( L2->getSuggestedColor() );
39 delete ( L2 ); // delete L2 as it is no longer needed
45 void LiveRangeInfo::constructLiveRanges()
49 cerr << "Consturcting Live Ranges ..." << endl;
51 // first find the live ranges for all incoming args of the method since
52 // those LRs start from the start of the method
54 // get the argument list
55 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
56 // get an iterator to arg list
57 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
60 for( ; ArgIt != ArgList.end() ; ++ArgIt) { // for each argument
62 LiveRange * ArgRange = new LiveRange(); // creates a new LR and
63 const Value *const Val = (const Value *) *ArgIt;
67 ArgRange->add( Val ); // add the arg (def) to it
68 LiveRangeMap[ Val ] = ArgRange;
70 // create a temp machine op to find the register class of value
71 //const MachineOperand Op(MachineOperand::MO_VirtualRegister);
73 unsigned rcid = MRI.getRegClassIDOfValue( Val );
74 ArgRange->setRegClass(RegClassList[ rcid ] );
78 cerr << " adding LiveRange for argument ";
79 printValue( (const Value *) *ArgIt); cerr << endl;
83 // Now suggest hardware registers for these method args
84 MRI.suggestRegs4MethodArgs(Meth, *this);
88 // Now find speical LLVM instructions (CALL, RET) and LRs in machine
92 Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
94 for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
96 // Now find all LRs for machine the instructions. A new LR will be created
97 // only for defs in the machine instr since, we assume that all Values are
98 // defined before they are used. However, there can be multiple defs for
99 // the same Value in machine instructions.
101 // get the iterator for machine instructions
102 const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
103 MachineCodeForBasicBlock::const_iterator
104 MInstIterator = MIVec.begin();
106 // iterate over all the machine instructions in BB
107 for( ; MInstIterator != MIVec.end(); MInstIterator++) {
109 const MachineInstr * MInst = *MInstIterator;
111 // Now if the machine instruction is a call/return instruction,
112 // add it to CallRetInstrList for processing its implicit operands
114 if( (TM.getInstrInfo()).isReturn( MInst->getOpCode()) ||
115 (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
116 CallRetInstrList.push_back( MInst );
119 // iterate over MI operands to find defs
120 for( MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done(); ++OpI) {
123 MachineOperand::MachineOperandType OpTyp =
124 OpI.getMachineOperand().getOperandType();
126 if ( OpTyp == MachineOperand::MO_CCRegister) {
127 cerr << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
128 printValue( OpI.getMachineOperand().getVRegValue() );
133 // create a new LR iff this operand is a def
136 const Value *const Def = *OpI;
139 // Only instruction values are accepted for live ranges here
141 if( Def->getValueType() != Value::InstructionVal ) {
142 cerr << "\n**%%Error: Def is not an instruction val. Def=";
143 printValue( Def ); cerr << endl;
148 LiveRange *DefRange = LiveRangeMap[Def];
150 // see LR already there (because of multiple defs)
152 if( !DefRange) { // if it is not in LiveRangeMap
154 DefRange = new LiveRange(); // creates a new live range and
155 DefRange->add( Def ); // add the instruction (def) to it
156 LiveRangeMap[ Def ] = DefRange; // update the map
159 cerr << " creating a LR for def: ";
160 printValue(Def); cerr << endl;
163 // set the register class of the new live range
164 //assert( RegClassList.size() );
165 MachineOperand::MachineOperandType OpTy =
166 OpI.getMachineOperand().getOperandType();
168 bool isCC = ( OpTy == MachineOperand::MO_CCRegister);
169 unsigned rcid = MRI.getRegClassIDOfValue(
170 OpI.getMachineOperand().getVRegValue(), isCC );
173 if(isCC && DEBUG_RA) {
174 cerr << "\a**created a LR for a CC reg:";
175 printValue( OpI.getMachineOperand().getVRegValue() );
178 DefRange->setRegClass( RegClassList[ rcid ] );
182 DefRange->add( Def ); // add the opearand to def range
183 // update the map - Operand points
185 LiveRangeMap[ Def ] = DefRange;
188 cerr << " added to an existing LR for def: ";
189 printValue( Def ); cerr << endl;
195 } // for all opereands in machine instructions
197 } // for all machine instructions in the BB
199 } // for all BBs in method
202 // Now we have to suggest clors for call and return arg live ranges.
203 // Also, if there are implicit defs (e.g., retun value of a call inst)
204 // they must be added to the live range list
206 suggestRegs4CallRets();
209 cerr << "Initial Live Ranges constructed!" << endl;
215 // Suggest colors for call and return args.
216 // Also create new LRs for implicit defs
218 void LiveRangeInfo::suggestRegs4CallRets()
221 CallRetInstrListType::const_iterator It = CallRetInstrList.begin();
223 for( ; It != CallRetInstrList.end(); ++It ) {
225 const MachineInstr *MInst = *It;
226 MachineOpCode OpCode = MInst->getOpCode();
228 if( (TM.getInstrInfo()).isReturn(OpCode) )
229 MRI.suggestReg4RetValue( MInst, *this);
231 else if( (TM.getInstrInfo()).isCall( OpCode ) )
232 MRI.suggestRegs4CallArgs( MInst, *this, RegClassList );
235 assert( 0 && "Non call/ret instr in CallRetInstrList" );
243 void LiveRangeInfo::coalesceLRs()
247 for each BB in method
248 for each machine instruction (inst)
249 for each definition (def) in inst
250 for each operand (op) of inst that is a use
251 if the def and op are of the same register class
252 if the def and op do not interfere //i.e., not simultaneously live
253 if (degree(LR of def) + degree(LR of op)) <= # avail regs
254 if both LRs do not have suggested colors
255 merge2IGNodes(def, op) // i.e., merge 2 LRs
260 cerr << endl << "Coalscing LRs ..." << endl;
262 Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
264 for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
266 // get the iterator for machine instructions
267 const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
268 MachineCodeForBasicBlock::const_iterator
269 MInstIterator = MIVec.begin();
271 // iterate over all the machine instructions in BB
272 for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
274 const MachineInstr * MInst = *MInstIterator;
277 cerr << " *Iterating over machine instr ";
283 // iterate over MI operands to find defs
284 for(MachineInstr::val_op_const_iterator DefI(MInst);!DefI.done();++DefI){
286 if( DefI.isDef() ) { // iff this operand is a def
288 LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
290 RegClass *const RCOfDef = LROfDef->getRegClass();
292 MachineInstr::val_op_const_iterator UseI(MInst);
293 for( ; !UseI.done(); ++UseI){ // for all uses
295 LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
297 if( ! LROfUse ) { // if LR of use is not found
299 //don't warn about labels
300 if (!((*UseI)->getType())->isLabelType() && DEBUG_RA) {
301 cerr<<" !! Warning: No LR for use "; printValue(*UseI);
304 continue; // ignore and continue
307 if( LROfUse == LROfDef) // nothing to merge if they are same
310 RegClass *const RCOfUse = LROfUse->getRegClass();
312 if( RCOfDef == RCOfUse ) { // if the reg classes are the same
314 if( ! RCOfDef->getInterference(LROfDef, LROfUse) ) {
316 unsigned CombinedDegree =
317 LROfDef->getUserIGNode()->getNumOfNeighbors() +
318 LROfUse->getUserIGNode()->getNumOfNeighbors();
320 if( CombinedDegree <= RCOfDef->getNumOfAvailRegs() ) {
322 // if both LRs do not have suggested colors
323 if( ! (LROfDef->hasSuggestedColor() &&
324 LROfUse->hasSuggestedColor() ) ) {
326 RCOfDef->mergeIGNodesOfLRs(LROfDef, LROfUse);
327 unionAndUpdateLRs(LROfDef, LROfUse);
331 } // if combined degree is less than # of regs
333 } // if def and use do not interfere
335 }// if reg classes are the same
343 } // for all machine instructions
348 cerr << endl << "Coalscing Done!" << endl;
356 /*--------------------------- Debug code for printing ---------------*/
359 void LiveRangeInfo::printLiveRanges()
361 LiveRangeMapType::iterator HMI = LiveRangeMap.begin(); // hash map iterator
362 cerr << endl << "Printing Live Ranges from Hash Map:" << endl;
363 for( ; HMI != LiveRangeMap.end() ; HMI ++ ) {
364 if( (*HMI).first && (*HMI).second ) {
365 cerr <<" "; printValue((*HMI).first); cerr << "\t: ";
366 ((*HMI).second)->printSet(); cerr << endl;