1 /* Title: PhyRegAlloc.h -*- C++ -*-
2 Author: Ruchira Sasanka
4 Purpose: This is the main entry point for register allocation.
9 * RegisterClasses: Each RegClass accepts a
10 MachineRegClass which contains machine specific info about that register
11 class. The code in the RegClass is machine independent and they use
12 access functions in the MachineRegClass object passed into it to get
13 machine specific info.
15 * Machine dependent work: All parts of the register coloring algorithm
16 except coloring of an individual node are machine independent.
18 Register allocation must be done as:
20 MethodLiveVarInfo LVI(*MethodI ); // compute LV info
23 TargetMachine &target = ....
26 PhyRegAlloc PRA(*MethodI, target, &LVI); // allocate regs
27 PRA.allocateRegisters();
30 #ifndef PHY_REG_ALLOC_H
31 #define PHY_REG_ALLOC_H
33 #include "llvm/CodeGen/RegClass.h"
34 #include "llvm/CodeGen/LiveRangeInfo.h"
36 class MachineCodeForMethod;
38 class MethodLiveVarInfo;
40 namespace cfg { class LoopInfo; }
42 //----------------------------------------------------------------------------
43 // Class AddedInstrns:
44 // When register allocator inserts new instructions in to the existing
45 // instruction stream, it does NOT directly modify the instruction stream.
46 // Rather, it creates an object of AddedInstrns and stick it in the
47 // AddedInstrMap for an existing instruction. This class contains two vectors
48 // to store such instructions added before and after an existing instruction.
49 //----------------------------------------------------------------------------
54 std::deque<MachineInstr*> InstrnsBefore;// Added insts BEFORE an existing inst
55 std::deque<MachineInstr*> InstrnsAfter; // Added insts AFTER an existing inst
58 typedef std::hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
62 //----------------------------------------------------------------------------
64 // Main class the register allocator. Call allocateRegisters() to allocate
65 // registers for a Method.
66 //----------------------------------------------------------------------------
69 class PhyRegAlloc: public NonCopyable {
71 std::vector<RegClass *> RegClassList; // vector of register classes
72 const TargetMachine &TM; // target machine
73 const Method* Meth; // name of the method we work on
74 MachineCodeForMethod &mcInfo; // descriptor for method's native code
75 MethodLiveVarInfo *const LVI; // LV information for this method
76 // (already computed for BBs)
77 LiveRangeInfo LRI; // LR info (will be computed)
78 const MachineRegInfo &MRI; // Machine Register information
79 const unsigned NumOfRegClasses; // recorded here for efficiency
82 AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
83 cfg::LoopInfo *LoopDepthCalc; // to calculate loop depths
84 ReservedColorListType ResColList; // A set of reserved regs if desired.
88 PhyRegAlloc(Method *M, const TargetMachine& TM, MethodLiveVarInfo *Lvi,
89 cfg::LoopInfo *LoopDepthCalc);
92 // main method called for allocating registers
94 void allocateRegisters();
99 //------- ------------------ private methods---------------------------------
101 void addInterference(const Value *const Def, const LiveVarSet *const LVSet,
102 const bool isCallInst);
104 void addInterferencesForArgs();
105 void createIGNodeListsAndIGs();
106 void buildInterferenceGraphs();
108 void setCallInterferences(const MachineInstr *MInst,
109 const LiveVarSet *const LVSetAft );
111 void move2DelayedInstr(const MachineInstr *OrigMI,
112 const MachineInstr *DelayedMI );
114 void markUnusableSugColors();
115 void allocateStackSpace4SpilledLRs();
117 void insertCode4SpilledLR (const LiveRange *LR,
119 const BasicBlock *BB,
120 const unsigned OpNum);
122 inline void constructLiveRanges() { LRI.constructLiveRanges(); }
124 void colorIncomingArgs();
125 void colorCallRetArgs();
126 void updateMachineCode();
128 void printLabel(const Value *const Val);
129 void printMachineCode();
131 friend class UltraSparcRegInfo;
134 int getUsableUniRegAtMI(RegClass *RC, const int RegType,
135 const MachineInstr *MInst,
136 const LiveVarSet *LVSetBef, MachineInstr *MIBef,
137 MachineInstr *MIAft );
139 int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
140 const LiveVarSet *LVSetBef);
142 void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
143 int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
145 void addInterf4PseudoInstr(const MachineInstr *MInst);