1 //===-- SparcV9CodeEmitter.cpp --------------------------------------------===//
5 //===----------------------------------------------------------------------===//
7 #include "llvm/Constants.h"
8 #include "llvm/Function.h"
9 #include "llvm/GlobalVariable.h"
10 #include "llvm/PassManager.h"
11 #include "llvm/CodeGen/MachineCodeEmitter.h"
12 #include "llvm/CodeGen/MachineConstantPool.h"
13 #include "llvm/CodeGen/MachineFunctionInfo.h"
14 #include "llvm/CodeGen/MachineFunctionPass.h"
15 #include "llvm/CodeGen/MachineInstr.h"
16 #include "llvm/Target/TargetMachine.h"
17 #include "llvm/Target/TargetData.h"
18 #include "Support/Debug.h"
19 #include "Support/hash_set"
20 #include "SparcInternals.h"
21 #include "SparcV9CodeEmitter.h"
23 bool UltraSparc::addPassesToEmitMachineCode(FunctionPassManager &PM,
24 MachineCodeEmitter &MCE) {
25 MachineCodeEmitter *M = &MCE;
26 DEBUG(M = MachineCodeEmitter::createFilePrinterEmitter(MCE));
27 PM.add(new SparcV9CodeEmitter(*this, *M));
28 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
34 SparcV9CodeEmitter &SparcV9;
35 MachineCodeEmitter &MCE;
37 /// LazyCodeGenMap - Keep track of call sites for functions that are to be
40 std::map<uint64_t, Function*> LazyCodeGenMap;
42 /// LazyResolverMap - Keep track of the lazy resolver created for a
43 /// particular function so that we can reuse them if necessary.
45 std::map<Function*, uint64_t> LazyResolverMap;
48 enum CallType { ShortCall, FarCall };
51 /// We need to keep track of whether we used a simple call or a far call
52 /// (many instructions) in sequence. This means we need to keep track of
53 /// what type of stub we generate.
54 static std::map<uint64_t, CallType> LazyCallFlavor;
57 JITResolver(SparcV9CodeEmitter &V9,
58 MachineCodeEmitter &mce) : SparcV9(V9), MCE(mce) {}
59 uint64_t getLazyResolver(Function *F);
60 uint64_t addFunctionReference(uint64_t Address, Function *F);
61 void deleteFunctionReference(uint64_t Address);
62 void addCallFlavor(uint64_t Address, CallType Flavor) {
63 LazyCallFlavor[Address] = Flavor;
66 // Utility functions for accessing data from static callback
67 uint64_t getCurrentPCValue() {
68 return MCE.getCurrentPCValue();
70 unsigned getBinaryCodeForInstr(MachineInstr &MI) {
71 return SparcV9.getBinaryCodeForInstr(MI);
74 inline uint64_t insertFarJumpAtAddr(int64_t Value, uint64_t Addr);
77 uint64_t emitStubForFunction(Function *F);
78 static void CompilationCallback();
79 uint64_t resolveFunctionReference(uint64_t RetAddr);
83 JITResolver *TheJITResolver;
84 std::map<uint64_t, JITResolver::CallType> JITResolver::LazyCallFlavor;
87 /// addFunctionReference - This method is called when we need to emit the
88 /// address of a function that has not yet been emitted, so we don't know the
89 /// address. Instead, we emit a call to the CompilationCallback method, and
90 /// keep track of where we are.
92 uint64_t JITResolver::addFunctionReference(uint64_t Address, Function *F) {
93 LazyCodeGenMap[Address] = F;
94 return (intptr_t)&JITResolver::CompilationCallback;
97 /// deleteFunctionReference - If we are emitting a far call, we already added a
98 /// reference to the function, but it is now incorrect, since the address to the
99 /// JIT resolver is too far away to be a simple call instruction. This is used
100 /// to remove the address from the map.
102 void JITResolver::deleteFunctionReference(uint64_t Address) {
103 std::map<uint64_t, Function*>::iterator I = LazyCodeGenMap.find(Address);
104 assert(I != LazyCodeGenMap.end() && "Not in map!");
105 LazyCodeGenMap.erase(I);
108 uint64_t JITResolver::resolveFunctionReference(uint64_t RetAddr) {
109 std::map<uint64_t, Function*>::iterator I = LazyCodeGenMap.find(RetAddr);
110 assert(I != LazyCodeGenMap.end() && "Not in map!");
111 Function *F = I->second;
112 LazyCodeGenMap.erase(I);
113 return MCE.forceCompilationOf(F);
116 uint64_t JITResolver::getLazyResolver(Function *F) {
117 std::map<Function*, uint64_t>::iterator I = LazyResolverMap.lower_bound(F);
118 if (I != LazyResolverMap.end() && I->first == F) return I->second;
120 //std::cerr << "Getting lazy resolver for : " << ((Value*)F)->getName() << "\n";
122 uint64_t Stub = emitStubForFunction(F);
123 LazyResolverMap.insert(I, std::make_pair(F, Stub));
127 uint64_t JITResolver::insertFarJumpAtAddr(int64_t Target, uint64_t Addr) {
129 static const unsigned i1 = SparcIntRegClass::i1, i2 = SparcIntRegClass::i2,
130 i7 = SparcIntRegClass::i7,
131 o6 = SparcIntRegClass::o6, g0 = SparcIntRegClass::g0,
132 g1 = SparcIntRegClass::g1, g5 = SparcIntRegClass::g5;
134 MachineInstr* BinaryCode[] = {
136 // Get address to branch into %g1, using %g5 as a temporary
138 // sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
139 BuildMI(V9::SETHI, 2).addSImm(Target >> 42).addReg(g5),
140 // or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %g5
141 BuildMI(V9::ORi, 3).addReg(g5).addSImm((Target >> 32) & 0x03ff).addReg(g5),
142 // sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
143 BuildMI(V9::SLLXi6, 3).addReg(g5).addSImm(32).addReg(g5),
144 // sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
145 BuildMI(V9::SETHI, 2).addSImm((Target >> 10) & 0x03fffff).addReg(g1),
146 // or %g5, %g1, %g1 ;; get upper word (in %i1) into %g1
147 BuildMI(V9::ORr, 3).addReg(g5).addReg(g1).addReg(g1),
148 // or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
149 BuildMI(V9::ORi, 3).addReg(g1).addSImm(Target & 0x03ff).addReg(g1),
150 // jmpl %g1, %g0, %g0 ;; indirect branch on %g1
151 BuildMI(V9::JMPLRETr, 3).addReg(g1).addReg(g0).addReg(g0),
156 for (unsigned i=0, e=sizeof(BinaryCode)/sizeof(BinaryCode[0]); i!=e; ++i) {
157 *((unsigned*)(intptr_t)Addr) = getBinaryCodeForInstr(*BinaryCode[i]);
158 delete BinaryCode[i];
165 void JITResolver::CompilationCallback() {
166 uint64_t CameFrom = (uint64_t)(intptr_t)__builtin_return_address(0);
167 int64_t Target = (int64_t)TheJITResolver->resolveFunctionReference(CameFrom);
168 DEBUG(std::cerr << "In callback! Addr=0x" << std::hex << CameFrom << "\n");
169 #if defined(sparc) || defined(__sparc__) || defined(__sparcv9)
170 register int64_t returnAddr;
171 __asm__ __volatile__ ("add %%i7, %%g0, %0" : "=r" (returnAddr) : );
172 DEBUG(std::cerr << "Read i7 (return addr) = "
173 << std::hex << returnAddr << ", value: "
174 << std::hex << *(unsigned*)returnAddr << "\n");
177 // Rewrite the call target so that we don't fault every time we execute it.
180 static const unsigned o6 = SparcIntRegClass::o6;
182 // Subtract enough to overwrite up to the 'save' instruction
183 // This depends on whether we made a short call (1 instruction) or the
184 // farCall (long form: 10 instructions, short form: 7 instructions)
185 uint64_t Offset = (LazyCallFlavor[CameFrom] == ShortCall) ? 4 : 28;
186 uint64_t CodeBegin = CameFrom - Offset;
188 // Make sure that what we're about to overwrite is indeed "save"
189 MachineInstr *SV = BuildMI(V9::SAVEi, 3).addReg(o6).addSImm(-192).addReg(o6);
190 unsigned SaveInst = TheJITResolver->getBinaryCodeForInstr(*SV);
192 unsigned CodeInMem = *(unsigned*)(intptr_t)CodeBegin;
193 assert(CodeInMem == SaveInst && "About to overwrite smthg not a save instr!");
194 DEBUG(std::cerr << "Emitting a far jump to 0x" << std::hex << Target << "\n");
195 TheJITResolver->insertFarJumpAtAddr(Target, CodeBegin);
197 // FIXME: if the target function is close enough to fit into the 19bit disp of
198 // BA, we should use this version, as its much cheaper to generate.
200 uint64_t InstAddr = CodeBegin;
202 MachineInstr *MI = BuildMI(V9::BA, 1).addSImm(Target);
203 *((unsigned*)(intptr_t)InstAddr)=TheJITResolver->getBinaryCodeForInstr(*MI);
208 MI = BuildMI(V9::NOP, 0);
209 *((unsigned*)(intptr_t))=TheJITResolver->getBinaryCodeForInstr(*Nop);
213 // Change the return address to reexecute the restore, then the jump
214 // The return address is really %o7, but will disappear after this function
215 // returns, and the register windows are rotated away.
216 #if defined(sparc) || defined(__sparc__) || defined(__sparcv9)
217 __asm__ __volatile__ ("sub %%i7, %0, %%i7" : : "r" (Offset+12));
218 DEBUG(std::cerr << "Callback setting return addr to "
219 << std::hex << (CameFrom-Offset-12) << "\n");
223 /// emitStubForFunction - This method is used by the JIT when it needs to emit
224 /// the address of a function for a function whose code has not yet been
225 /// generated. In order to do this, it generates a stub which jumps to the lazy
226 /// function compiler, which will eventually get fixed to call the function
229 uint64_t JITResolver::emitStubForFunction(Function *F) {
230 MCE.startFunctionStub(*F, 20);
232 DEBUG(std::cerr << "Emitting stub at addr: 0x"
233 << std::hex << MCE.getCurrentPCValue() << "\n");
235 unsigned o6 = SparcIntRegClass::o6, g0 = SparcIntRegClass::g0;
237 // restore %g0, 0, %g0
238 MachineInstr *R = BuildMI(V9::RESTOREi, 3).addMReg(g0).addSImm(0)
239 .addMReg(g0, MOTy::Def);
240 SparcV9.emitWord(SparcV9.getBinaryCodeForInstr(*R));
243 // save %sp, -192, %sp
244 MachineInstr *SV = BuildMI(V9::SAVEi, 3).addReg(o6).addSImm(-192).addReg(o6);
245 SparcV9.emitWord(SparcV9.getBinaryCodeForInstr(*SV));
248 int64_t CurrPC = MCE.getCurrentPCValue();
249 int64_t Addr = (int64_t)addFunctionReference(CurrPC, F);
250 int64_t CallTarget = (Addr-CurrPC) >> 2;
251 //if (CallTarget >= (1 << 29) || CallTarget <= -(1 << 29)) {
252 // Since this is a far call, the actual address of the call is shifted
253 // by the number of instructions it takes to calculate the exact address
254 deleteFunctionReference(CurrPC);
255 SparcV9.emitFarCall(Addr, F);
258 // call CallTarget ;; invoke the callback
259 MachineInstr *Call = BuildMI(V9::CALL, 1).addSImm(CallTarget);
260 SparcV9.emitWord(SparcV9.getBinaryCodeForInstr(*Call));
263 // nop ;; call delay slot
264 MachineInstr *Nop = BuildMI(V9::NOP, 0);
265 SparcV9.emitWord(SparcV9.getBinaryCodeForInstr(*Nop));
268 addCallFlavor(CurrPC, ShortCall);
272 SparcV9.emitWord(0xDEADBEEF); // marker so that we know it's really a stub
273 return (intptr_t)MCE.finishFunctionStub(*F)+4; /* 1 instr past the restore */
277 SparcV9CodeEmitter::SparcV9CodeEmitter(TargetMachine &tm,
278 MachineCodeEmitter &M): TM(tm), MCE(M)
280 TheJITResolver = new JITResolver(*this, M);
283 SparcV9CodeEmitter::~SparcV9CodeEmitter() {
284 delete TheJITResolver;
287 void SparcV9CodeEmitter::emitWord(unsigned Val) {
288 // Output the constant in big endian byte order...
290 for (int i = 3; i >= 0; --i) {
291 byteVal = Val >> 8*i;
292 MCE.emitByte(byteVal & 255);
297 SparcV9CodeEmitter::getRealRegNum(unsigned fakeReg,
299 const TargetRegInfo &RI = TM.getRegInfo();
300 unsigned regClass, regType = RI.getRegType(fakeReg);
301 // At least map fakeReg into its class
302 fakeReg = RI.getClassRegNum(fakeReg, regClass);
305 case UltraSparcRegInfo::IntRegClassID: {
307 static const unsigned IntRegMap[] = {
308 // "o0", "o1", "o2", "o3", "o4", "o5", "o7",
309 8, 9, 10, 11, 12, 13, 15,
310 // "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
311 16, 17, 18, 19, 20, 21, 22, 23,
312 // "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",
313 24, 25, 26, 27, 28, 29, 30, 31,
314 // "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
315 0, 1, 2, 3, 4, 5, 6, 7,
320 return IntRegMap[fakeReg];
323 case UltraSparcRegInfo::FloatRegClassID: {
324 DEBUG(std::cerr << "FP reg: " << fakeReg << "\n");
325 if (regType == UltraSparcRegInfo::FPSingleRegType) {
326 // only numbered 0-31, hence can already fit into 5 bits (and 6)
327 DEBUG(std::cerr << "FP single reg, returning: " << fakeReg << "\n");
328 } else if (regType == UltraSparcRegInfo::FPDoubleRegType) {
329 // FIXME: This assumes that we only have 5-bit register fiels!
330 // From Sparc Manual, page 40.
331 // The bit layout becomes: b[4], b[3], b[2], b[1], b[5]
332 fakeReg |= (fakeReg >> 5) & 1;
334 DEBUG(std::cerr << "FP double reg, returning: " << fakeReg << "\n");
338 case UltraSparcRegInfo::IntCCRegClassID: {
340 static const unsigned IntCCReg[] = { 6, 4, 2 };
342 assert(fakeReg < sizeof(IntCCReg)/sizeof(IntCCReg[0])
343 && "CC register out of bounds for IntCCReg map");
344 DEBUG(std::cerr << "IntCC reg: " << IntCCReg[fakeReg] << "\n");
345 return IntCCReg[fakeReg];
347 case UltraSparcRegInfo::FloatCCRegClassID: {
348 /* These are laid out %fcc0 - %fcc3 => 0 - 3, so are correct */
349 DEBUG(std::cerr << "FP CC reg: " << fakeReg << "\n");
353 assert(0 && "Invalid unified register number in getRegType");
359 // WARNING: if the call used the delay slot to do meaningful work, that's not
360 // being accounted for, and the behavior will be incorrect!!
361 inline void SparcV9CodeEmitter::emitFarCall(uint64_t Target, Function *F) {
362 static const unsigned i1 = SparcIntRegClass::i1, i2 = SparcIntRegClass::i2,
363 i7 = SparcIntRegClass::i7, o6 = SparcIntRegClass::o6,
364 o7 = SparcIntRegClass::o7, g0 = SparcIntRegClass::g0,
365 g1 = SparcIntRegClass::g1, g5 = SparcIntRegClass::g5;
367 MachineInstr* BinaryCode[] = {
369 // Get address to branch into %g1, using %g5 as a temporary
371 // sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
372 BuildMI(V9::SETHI, 2).addSImm(Target >> 42).addReg(g5),
373 // or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
374 BuildMI(V9::ORi, 3).addReg(g5).addSImm((Target >> 32) & 0x03ff).addReg(g5),
375 // sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
376 BuildMI(V9::SLLXi6, 3).addReg(g5).addSImm(32).addReg(g5),
377 // sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
378 BuildMI(V9::SETHI, 2).addSImm((Target >> 10) & 0x03fffff).addReg(g1),
379 // or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
380 BuildMI(V9::ORr, 3).addReg(g5).addReg(g1).addReg(g1),
381 // or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
382 BuildMI(V9::ORi, 3).addReg(g1).addSImm(Target & 0x03ff).addReg(g1),
383 // jmpl %g1, %g0, %o7 ;; indirect call on %g1
384 BuildMI(V9::JMPLRETr, 3).addReg(g1).addReg(g0).addReg(o7),
389 for (unsigned i=0, e=sizeof(BinaryCode)/sizeof(BinaryCode[0]); i!=e; ++i) {
390 // This is where we save the return address in the LazyResolverMap!!
391 if (i == 6 && F != 0) { // Do this right before the JMPL
392 uint64_t CurrPC = MCE.getCurrentPCValue();
393 TheJITResolver->addFunctionReference(CurrPC, F);
394 // Remember that this is a far call, to subtract appropriate offset later
395 TheJITResolver->addCallFlavor(CurrPC, JITResolver::FarCall);
398 emitWord(getBinaryCodeForInstr(*BinaryCode[i]));
399 delete BinaryCode[i];
404 int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI,
405 MachineOperand &MO) {
406 int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
407 // or things that get fixed up later by the JIT.
409 if (MO.isVirtualRegister()) {
410 std::cerr << "ERROR: virtual register found in machine code.\n";
412 } else if (MO.isPCRelativeDisp()) {
413 DEBUG(std::cerr << "PCRelativeDisp: ");
414 Value *V = MO.getVRegValue();
415 if (BasicBlock *BB = dyn_cast<BasicBlock>(V)) {
416 DEBUG(std::cerr << "Saving reference to BB (VReg)\n");
417 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
418 BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
419 } else if (const Constant *C = dyn_cast<Constant>(V)) {
420 if (ConstantMap.find(C) != ConstantMap.end()) {
421 rv = (int64_t)MCE.getConstantPoolEntryAddress(ConstantMap[C]);
422 DEBUG(std::cerr << "const: 0x" << std::hex << rv << "\n");
424 std::cerr << "ERROR: constant not in map:" << MO << "\n";
427 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
428 // same as MO.isGlobalAddress()
429 DEBUG(std::cerr << "GlobalValue: ");
430 // external function calls, etc.?
431 if (Function *F = dyn_cast<Function>(GV)) {
432 DEBUG(std::cerr << "Function: ");
433 if (F->isExternal()) {
434 // Sparc backend broken: this MO should be `ExternalSymbol'
435 rv = (int64_t)MCE.getGlobalValueAddress(F->getName());
437 rv = (int64_t)MCE.getGlobalValueAddress(F);
440 DEBUG(std::cerr << "not yet generated\n");
441 // Function has not yet been code generated!
442 TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(), F);
443 // Delayed resolution...
444 rv = TheJITResolver->getLazyResolver(F);
446 DEBUG(std::cerr << "already generated: 0x" << std::hex << rv << "\n");
449 rv = (int64_t)MCE.getGlobalValueAddress(GV);
451 if (Constant *C = ConstantPointerRef::get(GV)) {
452 if (ConstantMap.find(C) != ConstantMap.end()) {
453 rv = MCE.getConstantPoolEntryAddress(ConstantMap[C]);
455 std::cerr << "Constant: 0x" << std::hex << (intptr_t)C
456 << ", " << *V << " not found in ConstantMap!\n";
461 DEBUG(std::cerr << "Global addr: 0x" << std::hex << rv << "\n");
463 // The real target of the call is Addr = PC + (rv * 4)
464 // So undo that: give the instruction (Addr - PC) / 4
465 if (MI.getOpcode() == V9::CALL) {
466 int64_t CurrPC = MCE.getCurrentPCValue();
467 DEBUG(std::cerr << "rv addr: 0x" << std::hex << rv << "\n"
468 << "curr PC: 0x" << std::hex << CurrPC << "\n");
469 int64_t CallInstTarget = (rv - CurrPC) >> 2;
470 if (CallInstTarget >= (1<<29) || CallInstTarget <= -(1<<29)) {
471 DEBUG(std::cerr << "Making far call!\n");
472 // addresss is out of bounds for the 30-bit call,
473 // make an indirect jump-and-link
475 // this invalidates the instruction so that the call with an incorrect
476 // address will not be emitted
479 // The call fits into 30 bits, so just return the corrected address
482 DEBUG(std::cerr << "returning addr: 0x" << rv << "\n");
485 std::cerr << "ERROR: PC relative disp unhandled:" << MO << "\n";
488 } else if (MO.isPhysicalRegister() ||
489 MO.getType() == MachineOperand::MO_CCRegister)
491 // This is necessary because the Sparc backend doesn't actually lay out
492 // registers in the real fashion -- it skips those that it chooses not to
493 // allocate, i.e. those that are the FP, SP, etc.
494 unsigned fakeReg = MO.getAllocatedRegNum();
495 unsigned realRegByClass = getRealRegNum(fakeReg, MI);
496 DEBUG(std::cerr << MO << ": Reg[" << std::dec << fakeReg << "] => "
497 << realRegByClass << " (LLC: "
498 << TM.getRegInfo().getUnifiedRegName(fakeReg) << ")\n");
500 } else if (MO.isImmediate()) {
501 rv = MO.getImmedValue();
502 DEBUG(std::cerr << "immed: " << rv << "\n");
503 } else if (MO.isGlobalAddress()) {
504 DEBUG(std::cerr << "GlobalAddress: not PC-relative\n");
506 (intptr_t)getGlobalAddress(cast<GlobalValue>(MO.getVRegValue()),
507 MI, MO.isPCRelative());
508 } else if (MO.isMachineBasicBlock()) {
509 // Duplicate code of the above case for VirtualRegister, BasicBlock...
510 // It should really hit this case, but Sparc backend uses VRegs instead
511 DEBUG(std::cerr << "Saving reference to MBB\n");
512 const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
513 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
514 BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
515 } else if (MO.isExternalSymbol()) {
516 // Sparc backend doesn't generate this (yet...)
517 std::cerr << "ERROR: External symbol unhandled: " << MO << "\n";
519 } else if (MO.isFrameIndex()) {
520 // Sparc backend doesn't generate this (yet...)
521 int FrameIndex = MO.getFrameIndex();
522 std::cerr << "ERROR: Frame index unhandled.\n";
524 } else if (MO.isConstantPoolIndex()) {
525 // Sparc backend doesn't generate this (yet...)
526 std::cerr << "ERROR: Constant Pool index unhandled.\n";
529 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
533 // Finally, deal with the various bitfield-extracting functions that
534 // are used in SPARC assembly. (Some of these make no sense in combination
535 // with some of the above; we'll trust that the instruction selector
536 // will not produce nonsense, and not check for valid combinations here.)
537 if (MO.opLoBits32()) { // %lo(val) == %lo() in Sparc ABI doc
539 } else if (MO.opHiBits32()) { // %lm(val) == %hi() in Sparc ABI doc
540 return (rv >> 10) & 0x03fffff;
541 } else if (MO.opLoBits64()) { // %hm(val) == %ulo() in Sparc ABI doc
542 return (rv >> 32) & 0x03ff;
543 } else if (MO.opHiBits64()) { // %hh(val) == %uhi() in Sparc ABI doc
545 } else { // (unadorned) val
550 unsigned SparcV9CodeEmitter::getValueBit(int64_t Val, unsigned bit) {
555 bool SparcV9CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
556 MCE.startFunction(MF);
557 DEBUG(std::cerr << "Starting function " << MF.getFunction()->getName()
558 << ", address: " << "0x" << std::hex
559 << (long)MCE.getCurrentPCValue() << "\n");
561 // The Sparc backend does not use MachineConstantPool;
562 // instead, it has its own constant pool implementation.
563 // We create a new MachineConstantPool here to be compatible with the emitter.
564 MachineConstantPool MCP;
565 const hash_set<const Constant*> &pool = MF.getInfo()->getConstantPoolValues();
566 for (hash_set<const Constant*>::const_iterator I = pool.begin(),
567 E = pool.end(); I != E; ++I)
569 Constant *C = (Constant*)*I;
570 unsigned idx = MCP.getConstantPoolIndex(C);
571 DEBUG(std::cerr << "Constant[" << idx << "] = 0x" << (intptr_t)C << "\n");
572 ConstantMap[C] = idx;
574 MCE.emitConstantPool(&MCP);
576 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
578 MCE.finishFunction(MF);
580 DEBUG(std::cerr << "Finishing fn " << MF.getFunction()->getName() << "\n");
583 // Resolve branches to BasicBlocks for the entire function
584 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
585 long Location = BBLocations[BBRefs[i].first];
586 unsigned *Ref = BBRefs[i].second.first;
587 MachineInstr *MI = BBRefs[i].second.second;
588 DEBUG(std::cerr << "Fixup @ " << std::hex << Ref << " to 0x" << Location
589 << " in instr: " << std::dec << *MI);
590 for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
591 MachineOperand &op = MI->getOperand(ii);
592 if (op.isPCRelativeDisp()) {
593 // the instruction's branch target is made such that it branches to
594 // PC + (branchTarget * 4), so undo that arithmetic here:
595 // Location is the target of the branch
596 // Ref is the location of the instruction, and hence the PC
597 int64_t branchTarget = (Location - (long)Ref) >> 2;
599 bool loBits32=false, hiBits32=false, loBits64=false, hiBits64=false;
600 if (op.opLoBits32()) { loBits32=true; }
601 if (op.opHiBits32()) { hiBits32=true; }
602 if (op.opLoBits64()) { loBits64=true; }
603 if (op.opHiBits64()) { hiBits64=true; }
604 MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed,
606 if (loBits32) { MI->setOperandLo32(ii); }
607 else if (hiBits32) { MI->setOperandHi32(ii); }
608 else if (loBits64) { MI->setOperandLo64(ii); }
609 else if (hiBits64) { MI->setOperandHi64(ii); }
610 DEBUG(std::cerr << "Rewrote BB ref: ");
611 unsigned fixedInstr = SparcV9CodeEmitter::getBinaryCodeForInstr(*MI);
623 void SparcV9CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
624 currBB = MBB.getBasicBlock();
625 BBLocations[currBB] = MCE.getCurrentPCValue();
626 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
627 unsigned binCode = getBinaryCodeForInstr(**I);
628 if (binCode == (1 << 30)) {
629 // this is an invalid call: the addr is out of bounds. that means a code
630 // sequence has already been emitted, and this is a no-op
631 DEBUG(std::cerr << "Call supressed: already emitted far call.\n");
638 void* SparcV9CodeEmitter::getGlobalAddress(GlobalValue *V, MachineInstr &MI,
641 if (isPCRelative) { // must be a call, this is a major hack!
642 // Try looking up the function to see if it is already compiled!
643 if (void *Addr = (void*)(intptr_t)MCE.getGlobalValueAddress(V)) {
644 intptr_t CurByte = MCE.getCurrentPCValue();
645 // The real target of the call is Addr = PC + (target * 4)
646 // CurByte is the PC, Addr we just received
647 return (void*) (((long)Addr - (long)CurByte) >> 2);
649 if (Function *F = dyn_cast<Function>(V)) {
650 // Function has not yet been code generated!
651 TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(),
653 // Delayed resolution...
655 (void*)(intptr_t)TheJITResolver->getLazyResolver(cast<Function>(V));
657 } else if (Constant *C = ConstantPointerRef::get(V)) {
658 if (ConstantMap.find(C) != ConstantMap.end()) {
660 (intptr_t)MCE.getConstantPoolEntryAddress(ConstantMap[C]);
662 std::cerr << "Constant: 0x" << std::hex << &*C << std::dec
663 << ", " << *V << " not found in ConstantMap!\n";
667 std::cerr << "Unhandled global: " << *V << "\n";
672 return (void*)(intptr_t)MCE.getGlobalValueAddress(V);
677 #include "SparcV9CodeEmitter.inc"