2 //***************************************************************************
9 // 10/15/01 - Vikram Adve - Created
10 //**************************************************************************/
13 #include "SparcInternals.h"
14 #include "SparcInstrSelectionSupport.h"
15 #include "llvm/Target/Sparc.h"
16 #include "llvm/CodeGen/InstrSelection.h"
17 #include "llvm/CodeGen/InstrSelectionSupport.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/Method.h"
20 #include "llvm/ConstantVals.h"
21 #include "llvm/DerivedTypes.h"
22 #include "llvm/Type.h"
25 //************************ Internal Functions ******************************/
28 static inline MachineInstr*
29 CreateIntSetInstruction(int64_t C, Value* dest,
30 vector<TmpInstruction*>& tempVec)
33 uint64_t absC = (C >= 0)? C : -C;
34 if (absC > (unsigned int) ~0)
35 { // C does not fit in 32 bits
36 TmpInstruction* tmpReg =
37 new TmpInstruction(Instruction::UserOp1, Type::IntTy, NULL, NULL);
38 tempVec.push_back(tmpReg);
40 minstr = new MachineInstr(SETX);
41 minstr->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, C);
42 minstr->SetMachineOperand(1, MachineOperand::MO_VirtualRegister, tmpReg,
44 minstr->SetMachineOperand(2, MachineOperand::MO_VirtualRegister,dest);
48 minstr = new MachineInstr(SETSW);
49 minstr->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, C);
50 minstr->SetMachineOperand(1, MachineOperand::MO_VirtualRegister, dest);
56 static inline MachineInstr*
57 CreateUIntSetInstruction(uint64_t C, Value* dest,
58 vector<TmpInstruction*>& tempVec)
61 if (C > (unsigned int) ~0)
62 { // C does not fit in 32 bits
63 TmpInstruction* tmpReg =
64 new TmpInstruction(Instruction::UserOp1, Type::IntTy, NULL, NULL);
65 tempVec.push_back(tmpReg);
67 minstr = new MachineInstr(SETX);
68 minstr->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, C);
69 minstr->SetMachineOperand(1, MachineOperand::MO_VirtualRegister, tmpReg,
71 minstr->SetMachineOperand(2, MachineOperand::MO_VirtualRegister,dest);
75 minstr = new MachineInstr(SETUW);
76 minstr->SetMachineOperand(0, MachineOperand::MO_UnextendedImmed, C);
77 minstr->SetMachineOperand(1, MachineOperand::MO_VirtualRegister, dest);
83 //************************* External Classes *******************************/
85 //---------------------------------------------------------------------------
86 // class UltraSparcInstrInfo
89 // Information about individual instructions.
90 // Most information is stored in the SparcMachineInstrDesc array above.
91 // Other information is computed on demand, and most such functions
92 // default to member functions in base class MachineInstrInfo.
93 //---------------------------------------------------------------------------
96 UltraSparcInstrInfo::UltraSparcInstrInfo(const TargetMachine& tgt)
97 : MachineInstrInfo(tgt, SparcMachineInstrDesc,
98 /*descSize = */ NUM_TOTAL_OPCODES,
99 /*numRealOpCodes = */ NUM_REAL_OPCODES)
104 // Create an instruction sequence to put the constant `val' into
105 // the virtual register `dest'. `val' may be a Constant or a
106 // GlobalValue, viz., the constant address of a global variable or function.
107 // The generated instructions are returned in `minstrVec'.
108 // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
111 UltraSparcInstrInfo::CreateCodeToLoadConst(Value* val,
113 vector<MachineInstr*>& minstrVec,
114 vector<TmpInstruction*>& tempVec) const
116 MachineInstr* minstr;
118 assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
119 "I only know about constant values and global addresses");
121 // Use a "set" instruction for known constants that can go in an integer reg.
122 // Use a "load" instruction for all other constants, in particular,
123 // floating point constants and addresses of globals.
125 const Type* valType = val->getType();
127 if (valType->isIntegral() || valType == Type::BoolTy)
129 if (ConstantUInt* uval = dyn_cast<ConstantUInt>(val))
131 uint64_t C = uval->getValue();
132 minstr = CreateUIntSetInstruction(C, dest, tempVec);
136 bool isValidConstant;
137 int64_t C = GetConstantValueAsSignedInt(val, isValidConstant);
138 assert(isValidConstant && "Unrecognized constant");
139 minstr = CreateIntSetInstruction(C, dest, tempVec);
141 minstrVec.push_back(minstr);
145 // Make an instruction sequence to load the constant, viz:
146 // SETX <addr-of-constant>, tmpReg, addrReg
147 // LOAD /*addr*/ addrReg, /*offset*/ 0, dest
148 // Only the SETX is needed if `val' is a GlobalValue, i.e,. it is
149 // itself a constant address. Otherwise, both are needed.
152 int64_t zeroOffset = 0; // to avoid ambiguity with (Value*) 0
154 TmpInstruction* tmpReg =
155 new TmpInstruction(Instruction::UserOp1,
156 PointerType::get(val->getType()), val, NULL);
157 tempVec.push_back(tmpReg);
159 if (isa<Constant>(val))
161 // Create another TmpInstruction for the hidden integer register
162 TmpInstruction* addrReg =
163 new TmpInstruction(Instruction::UserOp1,
164 PointerType::get(val->getType()), val, NULL);
165 tempVec.push_back(addrReg);
171 minstr = new MachineInstr(SETX);
172 minstr->SetMachineOperand(0, MachineOperand::MO_PCRelativeDisp, val);
173 minstr->SetMachineOperand(1, MachineOperand::MO_VirtualRegister, tmpReg,
175 minstr->SetMachineOperand(2, MachineOperand::MO_VirtualRegister,addrVal);
176 minstrVec.push_back(minstr);
178 if (isa<Constant>(val))
180 // addrVal->addMachineInstruction(minstr);
182 minstr = new MachineInstr(ChooseLoadInstruction(val->getType()));
183 minstr->SetMachineOperand(0, MachineOperand::MO_VirtualRegister,
185 minstr->SetMachineOperand(1, MachineOperand::MO_SignExtendedImmed,
187 minstr->SetMachineOperand(2, MachineOperand::MO_VirtualRegister,
189 minstrVec.push_back(minstr);
195 // Create an instruction sequence to copy an integer value `val'
196 // to a floating point value `dest' by copying to memory and back.
197 // val must be an integral type. dest must be a Float or Double.
198 // The generated instructions are returned in `minstrVec'.
199 // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
202 UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(Method* method,
205 vector<MachineInstr*>& minstrVec,
206 vector<TmpInstruction*>& tempVec,
207 TargetMachine& target) const
209 assert((val->getType()->isIntegral() || val->getType()->isPointerType())
210 && "Source type must be integral");
211 assert((dest->getType() ==Type::FloatTy || dest->getType() ==Type::DoubleTy)
212 && "Dest type must be float/double");
214 const MachineFrameInfo& frameInfo = ((UltraSparc&) target).getFrameInfo();
216 MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
217 int offset = mcinfo.allocateLocalVar(target, val);
219 // Store instruction stores `val' to [%fp+offset].
220 // The store and load opCodes are based on the value being copied, and
221 // they use integer and float types that accomodate the
222 // larger of the source type and the destination type:
223 // On SparcV9: int for float, long for double.
225 Type* tmpType = (dest->getType() == Type::FloatTy)? Type::IntTy
227 MachineInstr* store = new MachineInstr(ChooseStoreInstruction(tmpType));
228 store->SetMachineOperand(0, MachineOperand::MO_VirtualRegister, val);
229 store->SetMachineOperand(1, target.getRegInfo().getFramePointer());
230 store->SetMachineOperand(2, MachineOperand::MO_SignExtendedImmed, offset);
231 minstrVec.push_back(store);
233 // Load instruction loads [%fp+offset] to `dest'.
235 MachineInstr* load =new MachineInstr(ChooseLoadInstruction(dest->getType()));
236 load->SetMachineOperand(0, target.getRegInfo().getFramePointer());
237 load->SetMachineOperand(1, MachineOperand::MO_SignExtendedImmed, offset);
238 load->SetMachineOperand(2, MachineOperand::MO_VirtualRegister, dest);
239 minstrVec.push_back(load);
243 // Similarly, create an instruction sequence to copy an FP value
244 // `val' to an integer value `dest' by copying to memory and back.
245 // See the previous function for information about return values.
248 UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(Method* method,
251 vector<MachineInstr*>& minstrVec,
252 vector<TmpInstruction*>& tempVec,
253 TargetMachine& target) const
255 assert((val->getType() ==Type::FloatTy || val->getType() ==Type::DoubleTy)
256 && "Source type must be float/double");
257 assert((dest->getType()->isIntegral() || dest->getType()->isPointerType())
258 && "Dest type must be integral");
260 const MachineFrameInfo& frameInfo = ((UltraSparc&) target).getFrameInfo();
262 MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
263 int offset = mcinfo.allocateLocalVar(target, val);
265 // Store instruction stores `val' to [%fp+offset].
266 // The store and load opCodes are based on the value being copied, and
267 // they use the integer type that matches the source type in size:
268 // On SparcV9: int for float, long for double.
270 Type* tmpType = (val->getType() == Type::FloatTy)? Type::IntTy
272 MachineInstr* store=new MachineInstr(ChooseStoreInstruction(val->getType()));
273 store->SetMachineOperand(0, MachineOperand::MO_VirtualRegister, val);
274 store->SetMachineOperand(1, target.getRegInfo().getFramePointer());
275 store->SetMachineOperand(2, MachineOperand::MO_SignExtendedImmed, offset);
276 minstrVec.push_back(store);
278 // Load instruction loads [%fp+offset] to `dest'.
280 MachineInstr* load = new MachineInstr(ChooseLoadInstruction(tmpType));
281 load->SetMachineOperand(0, target.getRegInfo().getFramePointer());
282 load->SetMachineOperand(1, MachineOperand::MO_SignExtendedImmed, offset);
283 load->SetMachineOperand(2, MachineOperand::MO_VirtualRegister, dest);
284 minstrVec.push_back(load);