2 //***************************************************************************
9 // 10/15/01 - Vikram Adve - Created
10 //**************************************************************************/
13 #include "SparcInternals.h"
14 #include "SparcInstrSelectionSupport.h"
15 #include "llvm/Target/Sparc.h"
16 #include "llvm/CodeGen/InstrSelection.h"
17 #include "llvm/CodeGen/InstrSelectionSupport.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineCodeForMethod.h"
20 #include "llvm/Method.h"
21 #include "llvm/ConstantVals.h"
22 #include "llvm/DerivedTypes.h"
25 //************************ Internal Functions ******************************/
28 static inline MachineInstr*
29 CreateIntSetInstruction(int64_t C, Value* dest,
30 std::vector<TmpInstruction*>& tempVec)
33 uint64_t absC = (C >= 0)? C : -C;
34 if (absC > (unsigned int) ~0)
35 { // C does not fit in 32 bits
36 TmpInstruction* tmpReg = new TmpInstruction(Type::IntTy);
37 tempVec.push_back(tmpReg);
39 minstr = new MachineInstr(SETX);
40 minstr->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed, C);
41 minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, tmpReg,
43 minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,dest);
47 minstr = new MachineInstr(SETSW);
48 minstr->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed, C);
49 minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, dest);
55 static inline MachineInstr*
56 CreateUIntSetInstruction(uint64_t C, Value* dest,
57 std::vector<TmpInstruction*>& tempVec)
60 if (C > (unsigned int) ~0)
61 { // C does not fit in 32 bits
62 TmpInstruction *tmpReg = new TmpInstruction(Type::IntTy);
63 tempVec.push_back(tmpReg);
65 minstr = new MachineInstr(SETX);
66 minstr->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed, C);
67 minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, tmpReg,
69 minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,dest);
73 minstr = new MachineInstr(SETUW);
74 minstr->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed, C);
75 minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, dest);
81 //************************* External Classes *******************************/
83 //---------------------------------------------------------------------------
84 // class UltraSparcInstrInfo
87 // Information about individual instructions.
88 // Most information is stored in the SparcMachineInstrDesc array above.
89 // Other information is computed on demand, and most such functions
90 // default to member functions in base class MachineInstrInfo.
91 //---------------------------------------------------------------------------
94 UltraSparcInstrInfo::UltraSparcInstrInfo(const TargetMachine& tgt)
95 : MachineInstrInfo(tgt, SparcMachineInstrDesc,
96 /*descSize = */ NUM_TOTAL_OPCODES,
97 /*numRealOpCodes = */ NUM_REAL_OPCODES)
102 // Create an instruction sequence to put the constant `val' into
103 // the virtual register `dest'. `val' may be a Constant or a
104 // GlobalValue, viz., the constant address of a global variable or function.
105 // The generated instructions are returned in `minstrVec'.
106 // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
109 UltraSparcInstrInfo::CreateCodeToLoadConst(Method* method,
112 std::vector<MachineInstr*>& minstrVec,
113 std::vector<TmpInstruction*>& tempVec) const
115 MachineInstr* minstr;
117 assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
118 "I only know about constant values and global addresses");
120 // Use a "set" instruction for known constants that can go in an integer reg.
121 // Use a "load" instruction for all other constants, in particular,
122 // floating point constants and addresses of globals.
124 const Type* valType = val->getType();
126 if (valType->isIntegral() || valType == Type::BoolTy)
128 if (ConstantUInt* uval = dyn_cast<ConstantUInt>(val))
130 uint64_t C = uval->getValue();
131 minstr = CreateUIntSetInstruction(C, dest, tempVec);
135 bool isValidConstant;
136 int64_t C = GetConstantValueAsSignedInt(val, isValidConstant);
137 assert(isValidConstant && "Unrecognized constant");
138 minstr = CreateIntSetInstruction(C, dest, tempVec);
140 minstrVec.push_back(minstr);
144 // Make an instruction sequence to load the constant, viz:
145 // SETX <addr-of-constant>, tmpReg, addrReg
146 // LOAD /*addr*/ addrReg, /*offset*/ 0, dest
147 // Only the SETX is needed if `val' is a GlobalValue, i.e,. it is
148 // itself a constant address. Otherwise, both are needed.
151 int64_t zeroOffset = 0; // to avoid ambiguity with (Value*) 0
153 TmpInstruction* tmpReg =
154 new TmpInstruction(PointerType::get(val->getType()), val);
155 tempVec.push_back(tmpReg);
157 if (isa<Constant>(val))
159 // Create another TmpInstruction for the hidden integer register
160 TmpInstruction* addrReg =
161 new TmpInstruction(PointerType::get(val->getType()), val);
162 tempVec.push_back(addrReg);
168 minstr = new MachineInstr(SETX);
169 minstr->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp, val);
170 minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, tmpReg,
172 minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,addrVal);
173 minstrVec.push_back(minstr);
175 if (isa<Constant>(val))
177 // Make sure constant is emitted to constant pool in assembly code.
178 MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
179 mcinfo.addToConstantPool(cast<Constant>(val));
181 // Generate the load instruction
182 minstr = new MachineInstr(ChooseLoadInstruction(val->getType()));
183 minstr->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
185 minstr->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
187 minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,
189 minstrVec.push_back(minstr);
195 // Create an instruction sequence to copy an integer value `val'
196 // to a floating point value `dest' by copying to memory and back.
197 // val must be an integral type. dest must be a Float or Double.
198 // The generated instructions are returned in `minstrVec'.
199 // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
202 UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(Method* method,
205 std::vector<MachineInstr*>& minstrVec,
206 std::vector<TmpInstruction*>& tempVec,
207 TargetMachine& target) const
209 assert((val->getType()->isIntegral() || val->getType()->isPointerType())
210 && "Source type must be integral");
211 assert((dest->getType() ==Type::FloatTy || dest->getType() ==Type::DoubleTy)
212 && "Dest type must be float/double");
214 MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
215 int offset = mcinfo.allocateLocalVar(target, val);
217 // Store instruction stores `val' to [%fp+offset].
218 // The store and load opCodes are based on the value being copied, and
219 // they use integer and float types that accomodate the
220 // larger of the source type and the destination type:
221 // On SparcV9: int for float, long for double.
223 Type* tmpType = (dest->getType() == Type::FloatTy)? Type::IntTy
225 MachineInstr* store = new MachineInstr(ChooseStoreInstruction(tmpType));
226 store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, val);
227 store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
228 store->SetMachineOperandConst(2, MachineOperand::MO_SignExtendedImmed, offset);
229 minstrVec.push_back(store);
231 // Load instruction loads [%fp+offset] to `dest'.
233 MachineInstr* load =new MachineInstr(ChooseLoadInstruction(dest->getType()));
234 load->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
235 load->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,offset);
236 load->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, dest);
237 minstrVec.push_back(load);
241 // Similarly, create an instruction sequence to copy an FP value
242 // `val' to an integer value `dest' by copying to memory and back.
243 // See the previous function for information about return values.
246 UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(Method* method,
249 std::vector<MachineInstr*>& minstrVec,
250 std::vector<TmpInstruction*>& tempVec,
251 TargetMachine& target) const
253 assert((val->getType() ==Type::FloatTy || val->getType() ==Type::DoubleTy)
254 && "Source type must be float/double");
255 assert((dest->getType()->isIntegral() || dest->getType()->isPointerType())
256 && "Dest type must be integral");
258 MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
259 int offset = mcinfo.allocateLocalVar(target, val);
261 // Store instruction stores `val' to [%fp+offset].
262 // The store and load opCodes are based on the value being copied, and
263 // they use the integer type that matches the source type in size:
264 // On SparcV9: int for float, long for double.
266 Type* tmpType = (val->getType() == Type::FloatTy)? Type::IntTy
268 MachineInstr* store=new MachineInstr(ChooseStoreInstruction(val->getType()));
269 store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, val);
270 store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
271 store->SetMachineOperandConst(2,MachineOperand::MO_SignExtendedImmed,offset);
272 minstrVec.push_back(store);
274 // Load instruction loads [%fp+offset] to `dest'.
276 MachineInstr* load = new MachineInstr(ChooseLoadInstruction(tmpType));
277 load->SetMachineOperandReg(0, target.getRegInfo().getFramePointer());
278 load->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed, offset);
279 load->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, dest);
280 minstrVec.push_back(load);