1 //===-- SparcV9Internals.h --------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines stuff that is to be private to the SparcV9 backend, but is
11 // shared among different portions of the backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef SPARCV9INTERNALS_H
16 #define SPARCV9INTERNALS_H
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/Target/TargetMachine.h"
20 #include "llvm/Target/TargetSchedInfo.h"
21 #include "llvm/Target/TargetFrameInfo.h"
22 #include "SparcV9RegInfo.h"
23 #include "llvm/Type.h"
24 #include "SparcV9RegClassInfo.h"
25 #include "Config/sys/types.h"
30 class SparcV9TargetMachine;
33 enum SparcV9InstrSchedClass {
34 SPARC_NONE, /* Instructions with no scheduling restrictions */
35 SPARC_IEUN, /* Integer class that can use IEU0 or IEU1 */
36 SPARC_IEU0, /* Integer class IEU0 */
37 SPARC_IEU1, /* Integer class IEU1 */
38 SPARC_FPM, /* FP Multiply or Divide instructions */
39 SPARC_FPA, /* All other FP instructions */
40 SPARC_CTI, /* Control-transfer instructions */
41 SPARC_LD, /* Load instructions */
42 SPARC_ST, /* Store instructions */
43 SPARC_SINGLE, /* Instructions that must issue by themselves */
45 SPARC_INV, /* This should stay at the end for the next value */
46 SPARC_NUM_SCHED_CLASSES = SPARC_INV
50 //---------------------------------------------------------------------------
51 // enum SparcV9MachineOpCode.
52 // const TargetInstrDescriptor SparcV9MachineInstrDesc[]
55 // Description of UltraSparcV9 machine instructions.
57 //---------------------------------------------------------------------------
60 enum SparcV9MachineOpCode {
61 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
62 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
64 #include "SparcV9Instr.def"
66 // End-of-array marker
68 NUM_REAL_OPCODES = PHI, // number of valid opcodes
69 NUM_TOTAL_OPCODES = INVALID_OPCODE
73 // Array of machine instruction descriptions...
74 extern const TargetInstrDescriptor SparcV9MachineInstrDesc[];
76 //---------------------------------------------------------------------------
77 // class SparcV9SchedInfo
80 // Interface to instruction scheduling information for UltraSPARC.
81 // The parameter values above are based on UltraSPARC IIi.
82 //---------------------------------------------------------------------------
84 class SparcV9SchedInfo: public TargetSchedInfo {
86 SparcV9SchedInfo(const TargetMachine &tgt);
88 virtual void initializeResources();
91 /// createStackSlotsPass - External interface to stack-slots pass that enters 2
92 /// empty slots at the top of each function stack
94 Pass *createStackSlotsPass(const TargetMachine &TM);
96 /// Specializes LLVM code for a target machine.
98 FunctionPass *createPreSelectionPass(const TargetMachine &TM);
100 /// Peephole optimization pass operating on machine code
102 FunctionPass *createPeepholeOptsPass(const TargetMachine &TM);
104 /// Writes out assembly code for the module, one function at a time
106 FunctionPass *createAsmPrinterPass(std::ostream &Out, const TargetMachine &TM);
108 /// getPrologEpilogInsertionPass - Inserts prolog/epilog code.
110 FunctionPass* createPrologEpilogInsertionPass();
112 /// getBytecodeAsmPrinterPass - Emits final LLVM bytecode to assembly file.
114 Pass* createBytecodeAsmPrinterPass(std::ostream &Out);
116 FunctionPass *createSparcV9MachineCodeDestructionPass();
118 } // End llvm namespace