1 //===-- SparcJITInfo.cpp - Implement the JIT interfaces for SparcV9 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the SparcV9 target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "SparcV9JITInfo.h"
16 #include "SparcV9Relocations.h"
17 #include "llvm/CodeGen/MachineCodeEmitter.h"
18 #include "llvm/Config/alloca.h"
19 #include "llvm/Support/Debug.h"
23 /// JITCompilerFunction - This contains the address of the JIT function used to
24 /// compile a function lazily.
25 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
27 /// BUILD_SETHI/BUILD_ORI/BUILD_BA/BUILD_CALL - These macros build sparc machine
28 /// instructions using lots of magic defined by the Sparc ISA.
29 #define BUILD_SETHI(RD, C) (((RD) << 25) | (4 << 22) | (C & ((1 << 22)-1)))
30 #define BUILD_ORI(RS, C, RD) ((2 << 30) | (RD << 25) | (2 << 19) | (RS << 14) |\
31 (1 << 13) | (C & ((1 << 12)-1)))
32 #define BUILD_BA(DISP) ((8 << 25) | (2 << 22) | (DISP & ((1 << 22)-1)))
33 #define BUILD_CALL(OFFSET) ((1 << 30) | (OFFSET & (1 << 30)-1))
35 static void InsertJumpAtAddr(int64_t JumpTarget, unsigned *Addr) {
36 // If the target function is close enough to fit into the 19bit disp of
37 // BA, we should use this version, as it's much cheaper to generate.
38 int64_t BranchTarget = (JumpTarget-(intptr_t)Addr) >> 2;
39 if (BranchTarget < (1 << 19) && BranchTarget > -(1 << 19)) {
41 Addr[0] = BUILD_BA(BranchTarget);
46 enum { G0 = 0, G1 = 1, G5 = 5 };
47 // Get address to branch into %g1, using %g5 as a temporary
49 // sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
50 Addr[0] = BUILD_SETHI(G5, JumpTarget >> 42);
51 // or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
52 Addr[1] = BUILD_ORI(G5, JumpTarget >> 32, G5);
53 // sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
55 // sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
56 Addr[3] = BUILD_SETHI(G1, JumpTarget >> 10);
57 // or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
59 // or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
60 Addr[5] = BUILD_ORI(G1, JumpTarget, G1);
62 // jmpl %g1, %g0, %g0 ;; indirect branch on %g1
69 void SparcV9JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
70 InsertJumpAtAddr((intptr_t)New, (unsigned*)Old);
74 static void SaveRegisters(uint64_t DoubleFP[], uint64_t CC[],
76 #if defined(__sparcv9)
78 __asm__ __volatile__ (// Save condition-code registers
82 : "=m"(CC[0]), "=r"(CC[1]), "=r"(CC[2]));
84 __asm__ __volatile__ (// Save globals g1 and g5
87 : "=m"(Globals[0]), "=m"(Globals[1]));
89 // GCC says: `asm' only allows up to thirty parameters!
90 __asm__ __volatile__ (// Save Single/Double FP registers, part 1
91 "std %%f0, %0;\n\t" "std %%f2, %1;\n\t"
92 "std %%f4, %2;\n\t" "std %%f6, %3;\n\t"
93 "std %%f8, %4;\n\t" "std %%f10, %5;\n\t"
94 "std %%f12, %6;\n\t" "std %%f14, %7;\n\t"
95 "std %%f16, %8;\n\t" "std %%f18, %9;\n\t"
96 "std %%f20, %10;\n\t" "std %%f22, %11;\n\t"
97 "std %%f24, %12;\n\t" "std %%f26, %13;\n\t"
98 "std %%f28, %14;\n\t" "std %%f30, %15;\n\t"
99 : "=m"(DoubleFP[ 0]), "=m"(DoubleFP[ 1]),
100 "=m"(DoubleFP[ 2]), "=m"(DoubleFP[ 3]),
101 "=m"(DoubleFP[ 4]), "=m"(DoubleFP[ 5]),
102 "=m"(DoubleFP[ 6]), "=m"(DoubleFP[ 7]),
103 "=m"(DoubleFP[ 8]), "=m"(DoubleFP[ 9]),
104 "=m"(DoubleFP[10]), "=m"(DoubleFP[11]),
105 "=m"(DoubleFP[12]), "=m"(DoubleFP[13]),
106 "=m"(DoubleFP[14]), "=m"(DoubleFP[15]));
108 __asm__ __volatile__ (// Save Double FP registers, part 2
109 "std %%f32, %0;\n\t" "std %%f34, %1;\n\t"
110 "std %%f36, %2;\n\t" "std %%f38, %3;\n\t"
111 "std %%f40, %4;\n\t" "std %%f42, %5;\n\t"
112 "std %%f44, %6;\n\t" "std %%f46, %7;\n\t"
113 "std %%f48, %8;\n\t" "std %%f50, %9;\n\t"
114 "std %%f52, %10;\n\t" "std %%f54, %11;\n\t"
115 "std %%f56, %12;\n\t" "std %%f58, %13;\n\t"
116 "std %%f60, %14;\n\t" "std %%f62, %15;\n\t"
117 : "=m"(DoubleFP[16]), "=m"(DoubleFP[17]),
118 "=m"(DoubleFP[18]), "=m"(DoubleFP[19]),
119 "=m"(DoubleFP[20]), "=m"(DoubleFP[21]),
120 "=m"(DoubleFP[22]), "=m"(DoubleFP[23]),
121 "=m"(DoubleFP[24]), "=m"(DoubleFP[25]),
122 "=m"(DoubleFP[26]), "=m"(DoubleFP[27]),
123 "=m"(DoubleFP[28]), "=m"(DoubleFP[29]),
124 "=m"(DoubleFP[30]), "=m"(DoubleFP[31]));
126 std::cerr << "ERROR: RUNNING CODE THAT ONLY WORKS ON A SPARCV9 HOST!\n";
131 static void RestoreRegisters(uint64_t DoubleFP[], uint64_t CC[],
132 uint64_t Globals[]) {
133 #if defined(__sparcv9)
135 __asm__ __volatile__ (// Restore condition-code registers
137 "wr %1, 0, %%fprs;\n\t"
138 "wr %2, 0, %%ccr;\n\t"
139 :: "m"(CC[0]), "r"(CC[1]), "r"(CC[2]));
141 __asm__ __volatile__ (// Restore globals g1 and g5
144 :: "m"(Globals[0]), "m"(Globals[1]));
146 // GCC says: `asm' only allows up to thirty parameters!
147 __asm__ __volatile__ (// Restore Single/Double FP registers, part 1
148 "ldd %0, %%f0;\n\t" "ldd %1, %%f2;\n\t"
149 "ldd %2, %%f4;\n\t" "ldd %3, %%f6;\n\t"
150 "ldd %4, %%f8;\n\t" "ldd %5, %%f10;\n\t"
151 "ldd %6, %%f12;\n\t" "ldd %7, %%f14;\n\t"
152 "ldd %8, %%f16;\n\t" "ldd %9, %%f18;\n\t"
153 "ldd %10, %%f20;\n\t" "ldd %11, %%f22;\n\t"
154 "ldd %12, %%f24;\n\t" "ldd %13, %%f26;\n\t"
155 "ldd %14, %%f28;\n\t" "ldd %15, %%f30;\n\t"
156 :: "m"(DoubleFP[0]), "m"(DoubleFP[1]),
157 "m"(DoubleFP[2]), "m"(DoubleFP[3]),
158 "m"(DoubleFP[4]), "m"(DoubleFP[5]),
159 "m"(DoubleFP[6]), "m"(DoubleFP[7]),
160 "m"(DoubleFP[8]), "m"(DoubleFP[9]),
161 "m"(DoubleFP[10]), "m"(DoubleFP[11]),
162 "m"(DoubleFP[12]), "m"(DoubleFP[13]),
163 "m"(DoubleFP[14]), "m"(DoubleFP[15]));
165 __asm__ __volatile__ (// Restore Double FP registers, part 2
166 "ldd %0, %%f32;\n\t" "ldd %1, %%f34;\n\t"
167 "ldd %2, %%f36;\n\t" "ldd %3, %%f38;\n\t"
168 "ldd %4, %%f40;\n\t" "ldd %5, %%f42;\n\t"
169 "ldd %6, %%f44;\n\t" "ldd %7, %%f46;\n\t"
170 "ldd %8, %%f48;\n\t" "ldd %9, %%f50;\n\t"
171 "ldd %10, %%f52;\n\t" "ldd %11, %%f54;\n\t"
172 "ldd %12, %%f56;\n\t" "ldd %13, %%f58;\n\t"
173 "ldd %14, %%f60;\n\t" "ldd %15, %%f62;\n\t"
174 :: "m"(DoubleFP[16]), "m"(DoubleFP[17]),
175 "m"(DoubleFP[18]), "m"(DoubleFP[19]),
176 "m"(DoubleFP[20]), "m"(DoubleFP[21]),
177 "m"(DoubleFP[22]), "m"(DoubleFP[23]),
178 "m"(DoubleFP[24]), "m"(DoubleFP[25]),
179 "m"(DoubleFP[26]), "m"(DoubleFP[27]),
180 "m"(DoubleFP[28]), "m"(DoubleFP[29]),
181 "m"(DoubleFP[30]), "m"(DoubleFP[31]));
183 std::cerr << "ERROR: RUNNING CODE THAT ONLY WORKS ON A SPARCV9 HOST!\n";
189 static void CompilationCallback() {
190 // Local space to save the registers
191 uint64_t DoubleFP[32];
195 SaveRegisters(DoubleFP, CC, Globals);
197 unsigned *CameFrom = (unsigned*)__builtin_return_address(0);
198 unsigned *CameFrom1 = (unsigned*)__builtin_return_address(1);
200 int64_t Target = (intptr_t)JITCompilerFunction(CameFrom);
202 DEBUG(std::cerr << "In callback! Addr=" << (void*)CameFrom << "\n");
204 // If we can rewrite the ORIGINAL caller, we eliminate the whole need for a
205 // trampoline function stub!!
206 unsigned OrigCallInst = *CameFrom1;
207 int64_t OrigTarget = (Target-(intptr_t)CameFrom1) >> 2;
208 if ((OrigCallInst >> 30) == 1 &&
209 (OrigTarget <= (1 << 30) && OrigTarget >= -(1 << 30))) {
210 // The original call instruction was CALL <immed>, which means we can
211 // overwrite it directly, since the offset will fit into 30 bits
212 *CameFrom1 = BUILD_CALL(OrigTarget);
213 //++OverwrittenCalls;
218 // Rewrite the call target so that we don't fault every time we execute it.
220 unsigned OrigStubCallInst = *CameFrom;
222 // Subtract enough to overwrite up to the 'save' instruction
223 // This depends on whether we made a short call (1 instruction) or the
224 // farCall (7 instructions)
225 int Offset = ((OrigStubCallInst >> 30) == 1) ? 1 : 7;
226 unsigned *CodeBegin = CameFrom - Offset;
228 // FIXME: __builtin_frame_address doesn't work if frame pointer elimination
229 // has been performed. Having a variable sized alloca disables frame pointer
230 // elimination currently, even if it's dead. This is a gross hack.
233 // Make sure that what we're about to overwrite is indeed "save".
234 if (*CodeBegin != 0x9DE3BF40) {
235 std::cerr << "About to overwrite smthg not a save instr!";
240 InsertJumpAtAddr(Target, CodeBegin);
242 // Flush the I-Cache: FLUSH clears out a doubleword at a given address
243 // Self-modifying code MUST clear out the I-Cache to be portable
244 #if defined(__sparcv9)
245 for (int i = -Offset*4, e = 32-((int64_t)Offset*4); i < e; i += 8)
246 __asm__ __volatile__ ("flush %%i7 + %0" : : "r" (i));
249 // Change the return address to re-execute the restore, then the jump.
250 DEBUG(std::cerr << "Callback returning to: 0x"
251 << std::hex << (CameFrom-Offset*4-12) << "\n");
252 #if defined(__sparcv9)
253 __asm__ __volatile__ ("sub %%i7, %0, %%i7" : : "r" (Offset*4+12));
256 RestoreRegisters(DoubleFP, CC, Globals);
260 /// emitStubForFunction - This method is used by the JIT when it needs to emit
261 /// the address of a function for a function whose code has not yet been
262 /// generated. In order to do this, it generates a stub which jumps to the lazy
263 /// function compiler, which will eventually get fixed to call the function
266 void *SparcV9JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
267 if (Fn != CompilationCallback) {
268 // If this is just a call to an external function,
269 MCE.startFunctionStub(4*8);
270 unsigned *Stub = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
271 for (unsigned i = 0; i != 8; ++i)
273 InsertJumpAtAddr((intptr_t)Fn, Stub);
274 return MCE.finishFunctionStub(0); // 1 instr past the restore
277 MCE.startFunctionStub(44);
278 MCE.emitWord(0x81e82000); // restore %g0, 0, %g0
279 MCE.emitWord(0x9DE3BF40); // save %sp, -192, %sp
281 int64_t CurrPC = MCE.getCurrentPCValue();
282 int64_t Addr = (intptr_t)Fn;
283 int64_t CallTarget = (Addr-CurrPC) >> 2;
284 if (CallTarget < (1 << 29) && CallTarget > -(1 << 29)) {
286 MCE.emitWord((0x01 << 30) | CallTarget);
288 enum {G5 = 5, G1 = 1 };
289 // Otherwise, we need to emit a sequence of instructions to call a distant
290 // function. We use %g5 as a temporary, and compute the value into %g1
292 // sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
293 MCE.emitWord(BUILD_SETHI(G5, Addr >> 42));
294 // or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
295 MCE.emitWord(BUILD_ORI(G5, Addr >> 32, G5));
296 // sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
297 MCE.emitWord(0x8B297020);
298 // sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
299 MCE.emitWord(BUILD_SETHI(G1, Addr >> 10));
300 // or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
301 MCE.emitWord(0x82114001);
302 // or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
303 MCE.emitWord(BUILD_ORI(G1, Addr, G1));
305 // call %g1 ;; indirect call on %g1
306 MCE.emitWord(0x9FC04000);
309 // nop ;; call delay slot
310 MCE.emitWord(0x1000000);
312 // FIXME: Should have a restore and return!
314 MCE.emitWord(0xDEADBEEF); // marker so that we know it's really a stub
315 return (char*)MCE.finishFunctionStub(0)+4; // 1 instr past the restore
320 TargetJITInfo::LazyResolverFn
321 SparcV9JITInfo::getLazyResolverFunction(JITCompilerFn F) {
322 JITCompilerFunction = F;
323 return CompilationCallback;
326 void SparcV9JITInfo::relocate(void *Function, MachineRelocation *MR,
327 unsigned NumRelocs, unsigned char* GOTBase) {
328 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
329 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
330 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
331 switch ((V9::RelocationType)MR->getRelocationType()) {
332 default: assert(0 && "Unknown relocation type!");
333 case V9::reloc_pcrel_call:
334 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2; // PC relative.
335 assert((ResultPtr < (1 << 29) && ResultPtr > -(1 << 29)) &&
336 "reloc_pcrel_call is out of range!");
337 // The high two bits of the call are always set to 01.
338 *RelocPos = (1 << 30) | (ResultPtr & ((1 << 30)-1)) ;
340 case V9::reloc_sethi_hh:
341 case V9::reloc_sethi_lm:
342 ResultPtr >>= (MR->getRelocationType() == V9::reloc_sethi_hh ? 32 : 0);
344 ResultPtr &= (1 << 22)-1;
345 *RelocPos |= (unsigned)ResultPtr;
347 case V9::reloc_or_hm:
348 case V9::reloc_or_lo:
349 ResultPtr >>= (MR->getRelocationType() == V9::reloc_or_hm ? 32 : 0);
350 ResultPtr &= (1 << 12)-1;
351 *RelocPos |= (unsigned)ResultPtr;