1 //===-- SparcJITInfo.cpp - Implement the JIT interfaces for SparcV9 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the SparcV9 target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "SparcV9JITInfo.h"
16 #include "SparcV9Relocations.h"
17 #include "llvm/CodeGen/MachineCodeEmitter.h"
18 #include "llvm/Config/alloca.h"
19 #include "llvm/Support/Debug.h"
22 /// JITCompilerFunction - This contains the address of the JIT function used to
23 /// compile a function lazily.
24 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
26 /// BUILD_SETHI/BUILD_ORI/BUILD_BA/BUILD_CALL - These macros build sparc machine
27 /// instructions using lots of magic defined by the Sparc ISA.
28 #define BUILD_SETHI(RD, C) (((RD) << 25) | (4 << 22) | (C & ((1 << 22)-1)))
29 #define BUILD_ORI(RS, C, RD) ((2 << 30) | (RD << 25) | (2 << 19) | (RS << 14) |\
30 (1 << 13) | (C & ((1 << 12)-1)))
31 #define BUILD_BA(DISP) ((8 << 25) | (2 << 22) | (DISP & ((1 << 22)-1)))
32 #define BUILD_CALL(OFFSET) ((1 << 30) | (OFFSET & (1 << 30)-1))
34 static void InsertJumpAtAddr(int64_t JumpTarget, unsigned *Addr) {
35 // If the target function is close enough to fit into the 19bit disp of
36 // BA, we should use this version, as it's much cheaper to generate.
37 int64_t BranchTarget = (JumpTarget-(intptr_t)Addr) >> 2;
38 if (BranchTarget < (1 << 19) && BranchTarget > -(1 << 19)) {
40 Addr[0] = BUILD_BA(BranchTarget);
45 enum { G0 = 0, G1 = 1, G5 = 5 };
46 // Get address to branch into %g1, using %g5 as a temporary
48 // sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
49 Addr[0] = BUILD_SETHI(G5, JumpTarget >> 42);
50 // or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
51 Addr[1] = BUILD_ORI(G5, JumpTarget >> 32, G5);
52 // sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
54 // sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
55 Addr[3] = BUILD_SETHI(G1, JumpTarget >> 10);
56 // or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
58 // or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
59 Addr[5] = BUILD_ORI(G1, JumpTarget, G1);
61 // jmpl %g1, %g0, %g0 ;; indirect branch on %g1
68 void SparcV9JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
69 InsertJumpAtAddr((intptr_t)New, (unsigned*)Old);
73 static void SaveRegisters(uint64_t DoubleFP[], uint64_t CC[],
75 #if defined(__sparcv9)
77 __asm__ __volatile__ (// Save condition-code registers
81 : "=m"(CC[0]), "=r"(CC[1]), "=r"(CC[2]));
83 __asm__ __volatile__ (// Save globals g1 and g5
86 : "=m"(Globals[0]), "=m"(Globals[1]));
88 // GCC says: `asm' only allows up to thirty parameters!
89 __asm__ __volatile__ (// Save Single/Double FP registers, part 1
90 "std %%f0, %0;\n\t" "std %%f2, %1;\n\t"
91 "std %%f4, %2;\n\t" "std %%f6, %3;\n\t"
92 "std %%f8, %4;\n\t" "std %%f10, %5;\n\t"
93 "std %%f12, %6;\n\t" "std %%f14, %7;\n\t"
94 "std %%f16, %8;\n\t" "std %%f18, %9;\n\t"
95 "std %%f20, %10;\n\t" "std %%f22, %11;\n\t"
96 "std %%f24, %12;\n\t" "std %%f26, %13;\n\t"
97 "std %%f28, %14;\n\t" "std %%f30, %15;\n\t"
98 : "=m"(DoubleFP[ 0]), "=m"(DoubleFP[ 1]),
99 "=m"(DoubleFP[ 2]), "=m"(DoubleFP[ 3]),
100 "=m"(DoubleFP[ 4]), "=m"(DoubleFP[ 5]),
101 "=m"(DoubleFP[ 6]), "=m"(DoubleFP[ 7]),
102 "=m"(DoubleFP[ 8]), "=m"(DoubleFP[ 9]),
103 "=m"(DoubleFP[10]), "=m"(DoubleFP[11]),
104 "=m"(DoubleFP[12]), "=m"(DoubleFP[13]),
105 "=m"(DoubleFP[14]), "=m"(DoubleFP[15]));
107 __asm__ __volatile__ (// Save Double FP registers, part 2
108 "std %%f32, %0;\n\t" "std %%f34, %1;\n\t"
109 "std %%f36, %2;\n\t" "std %%f38, %3;\n\t"
110 "std %%f40, %4;\n\t" "std %%f42, %5;\n\t"
111 "std %%f44, %6;\n\t" "std %%f46, %7;\n\t"
112 "std %%f48, %8;\n\t" "std %%f50, %9;\n\t"
113 "std %%f52, %10;\n\t" "std %%f54, %11;\n\t"
114 "std %%f56, %12;\n\t" "std %%f58, %13;\n\t"
115 "std %%f60, %14;\n\t" "std %%f62, %15;\n\t"
116 : "=m"(DoubleFP[16]), "=m"(DoubleFP[17]),
117 "=m"(DoubleFP[18]), "=m"(DoubleFP[19]),
118 "=m"(DoubleFP[20]), "=m"(DoubleFP[21]),
119 "=m"(DoubleFP[22]), "=m"(DoubleFP[23]),
120 "=m"(DoubleFP[24]), "=m"(DoubleFP[25]),
121 "=m"(DoubleFP[26]), "=m"(DoubleFP[27]),
122 "=m"(DoubleFP[28]), "=m"(DoubleFP[29]),
123 "=m"(DoubleFP[30]), "=m"(DoubleFP[31]));
125 std::cerr << "ERROR: RUNNING CODE THAT ONLY WORKS ON A SPARCV9 HOST!\n";
130 static void RestoreRegisters(uint64_t DoubleFP[], uint64_t CC[],
131 uint64_t Globals[]) {
132 #if defined(__sparcv9)
134 __asm__ __volatile__ (// Restore condition-code registers
136 "wr %1, 0, %%fprs;\n\t"
137 "wr %2, 0, %%ccr;\n\t"
138 :: "m"(CC[0]), "r"(CC[1]), "r"(CC[2]));
140 __asm__ __volatile__ (// Restore globals g1 and g5
143 :: "m"(Globals[0]), "m"(Globals[1]));
145 // GCC says: `asm' only allows up to thirty parameters!
146 __asm__ __volatile__ (// Restore Single/Double FP registers, part 1
147 "ldd %0, %%f0;\n\t" "ldd %1, %%f2;\n\t"
148 "ldd %2, %%f4;\n\t" "ldd %3, %%f6;\n\t"
149 "ldd %4, %%f8;\n\t" "ldd %5, %%f10;\n\t"
150 "ldd %6, %%f12;\n\t" "ldd %7, %%f14;\n\t"
151 "ldd %8, %%f16;\n\t" "ldd %9, %%f18;\n\t"
152 "ldd %10, %%f20;\n\t" "ldd %11, %%f22;\n\t"
153 "ldd %12, %%f24;\n\t" "ldd %13, %%f26;\n\t"
154 "ldd %14, %%f28;\n\t" "ldd %15, %%f30;\n\t"
155 :: "m"(DoubleFP[0]), "m"(DoubleFP[1]),
156 "m"(DoubleFP[2]), "m"(DoubleFP[3]),
157 "m"(DoubleFP[4]), "m"(DoubleFP[5]),
158 "m"(DoubleFP[6]), "m"(DoubleFP[7]),
159 "m"(DoubleFP[8]), "m"(DoubleFP[9]),
160 "m"(DoubleFP[10]), "m"(DoubleFP[11]),
161 "m"(DoubleFP[12]), "m"(DoubleFP[13]),
162 "m"(DoubleFP[14]), "m"(DoubleFP[15]));
164 __asm__ __volatile__ (// Restore Double FP registers, part 2
165 "ldd %0, %%f32;\n\t" "ldd %1, %%f34;\n\t"
166 "ldd %2, %%f36;\n\t" "ldd %3, %%f38;\n\t"
167 "ldd %4, %%f40;\n\t" "ldd %5, %%f42;\n\t"
168 "ldd %6, %%f44;\n\t" "ldd %7, %%f46;\n\t"
169 "ldd %8, %%f48;\n\t" "ldd %9, %%f50;\n\t"
170 "ldd %10, %%f52;\n\t" "ldd %11, %%f54;\n\t"
171 "ldd %12, %%f56;\n\t" "ldd %13, %%f58;\n\t"
172 "ldd %14, %%f60;\n\t" "ldd %15, %%f62;\n\t"
173 :: "m"(DoubleFP[16]), "m"(DoubleFP[17]),
174 "m"(DoubleFP[18]), "m"(DoubleFP[19]),
175 "m"(DoubleFP[20]), "m"(DoubleFP[21]),
176 "m"(DoubleFP[22]), "m"(DoubleFP[23]),
177 "m"(DoubleFP[24]), "m"(DoubleFP[25]),
178 "m"(DoubleFP[26]), "m"(DoubleFP[27]),
179 "m"(DoubleFP[28]), "m"(DoubleFP[29]),
180 "m"(DoubleFP[30]), "m"(DoubleFP[31]));
182 std::cerr << "ERROR: RUNNING CODE THAT ONLY WORKS ON A SPARCV9 HOST!\n";
188 static void CompilationCallback() {
189 // Local space to save the registers
190 uint64_t DoubleFP[32];
194 SaveRegisters(DoubleFP, CC, Globals);
196 unsigned *CameFrom = (unsigned*)__builtin_return_address(0);
197 unsigned *CameFrom1 = (unsigned*)__builtin_return_address(1);
199 int64_t Target = (intptr_t)JITCompilerFunction(CameFrom);
201 DEBUG(std::cerr << "In callback! Addr=" << (void*)CameFrom << "\n");
203 // If we can rewrite the ORIGINAL caller, we eliminate the whole need for a
204 // trampoline function stub!!
205 unsigned OrigCallInst = *CameFrom1;
206 int64_t OrigTarget = (Target-(intptr_t)CameFrom1) >> 2;
207 if ((OrigCallInst >> 30) == 1 &&
208 (OrigTarget <= (1 << 30) && OrigTarget >= -(1 << 30))) {
209 // The original call instruction was CALL <immed>, which means we can
210 // overwrite it directly, since the offset will fit into 30 bits
211 *CameFrom1 = BUILD_CALL(OrigTarget);
212 //++OverwrittenCalls;
217 // Rewrite the call target so that we don't fault every time we execute it.
219 unsigned OrigStubCallInst = *CameFrom;
221 // Subtract enough to overwrite up to the 'save' instruction
222 // This depends on whether we made a short call (1 instruction) or the
223 // farCall (7 instructions)
224 int Offset = ((OrigStubCallInst >> 30) == 1) ? 1 : 7;
225 unsigned *CodeBegin = CameFrom - Offset;
227 // FIXME: __builtin_frame_address doesn't work if frame pointer elimination
228 // has been performed. Having a variable sized alloca disables frame pointer
229 // elimination currently, even if it's dead. This is a gross hack.
232 // Make sure that what we're about to overwrite is indeed "save".
233 if (*CodeBegin != 0x9DE3BF40) {
234 std::cerr << "About to overwrite smthg not a save instr!";
239 InsertJumpAtAddr(Target, CodeBegin);
241 // Flush the I-Cache: FLUSH clears out a doubleword at a given address
242 // Self-modifying code MUST clear out the I-Cache to be portable
243 #if defined(__sparcv9)
244 for (int i = -Offset*4, e = 32-((int64_t)Offset*4); i < e; i += 8)
245 __asm__ __volatile__ ("flush %%i7 + %0" : : "r" (i));
248 // Change the return address to re-execute the restore, then the jump.
249 DEBUG(std::cerr << "Callback returning to: 0x"
250 << std::hex << (CameFrom-Offset*4-12) << "\n");
251 #if defined(__sparcv9)
252 __asm__ __volatile__ ("sub %%i7, %0, %%i7" : : "r" (Offset*4+12));
255 RestoreRegisters(DoubleFP, CC, Globals);
259 /// emitStubForFunction - This method is used by the JIT when it needs to emit
260 /// the address of a function for a function whose code has not yet been
261 /// generated. In order to do this, it generates a stub which jumps to the lazy
262 /// function compiler, which will eventually get fixed to call the function
265 void *SparcV9JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
266 if (Fn != CompilationCallback) {
267 // If this is just a call to an external function,
268 MCE.startFunctionStub(4*8);
269 unsigned *Stub = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
270 for (unsigned i = 0; i != 8; ++i)
272 InsertJumpAtAddr((intptr_t)Fn, Stub);
273 return MCE.finishFunctionStub(0); // 1 instr past the restore
276 MCE.startFunctionStub(44);
277 MCE.emitWord(0x81e82000); // restore %g0, 0, %g0
278 MCE.emitWord(0x9DE3BF40); // save %sp, -192, %sp
280 int64_t CurrPC = MCE.getCurrentPCValue();
281 int64_t Addr = (intptr_t)Fn;
282 int64_t CallTarget = (Addr-CurrPC) >> 2;
283 if (CallTarget < (1 << 29) && CallTarget > -(1 << 29)) {
285 MCE.emitWord((0x01 << 30) | CallTarget);
287 enum {G5 = 5, G1 = 1 };
288 // Otherwise, we need to emit a sequence of instructions to call a distant
289 // function. We use %g5 as a temporary, and compute the value into %g1
291 // sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
292 MCE.emitWord(BUILD_SETHI(G5, Addr >> 42));
293 // or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
294 MCE.emitWord(BUILD_ORI(G5, Addr >> 32, G5));
295 // sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
296 MCE.emitWord(0x8B297020);
297 // sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
298 MCE.emitWord(BUILD_SETHI(G1, Addr >> 10));
299 // or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
300 MCE.emitWord(0x82114001);
301 // or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
302 MCE.emitWord(BUILD_ORI(G1, Addr, G1));
304 // call %g1 ;; indirect call on %g1
305 MCE.emitWord(0x9FC04000);
308 // nop ;; call delay slot
309 MCE.emitWord(0x1000000);
311 // FIXME: Should have a restore and return!
313 MCE.emitWord(0xDEADBEEF); // marker so that we know it's really a stub
314 return (char*)MCE.finishFunctionStub(0)+4; // 1 instr past the restore
319 TargetJITInfo::LazyResolverFn
320 SparcV9JITInfo::getLazyResolverFunction(JITCompilerFn F) {
321 JITCompilerFunction = F;
322 return CompilationCallback;
325 void SparcV9JITInfo::relocate(void *Function, MachineRelocation *MR,
326 unsigned NumRelocs) {
327 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
328 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
329 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
330 switch ((V9::RelocationType)MR->getRelocationType()) {
331 default: assert(0 && "Unknown relocation type!");
332 case V9::reloc_pcrel_call:
333 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2; // PC relative.
334 assert((ResultPtr < (1 << 29) && ResultPtr > -(1 << 29)) &&
335 "reloc_pcrel_call is out of range!");
336 // The high two bits of the call are always set to 01.
337 *RelocPos = (1 << 30) | (ResultPtr & ((1 << 30)-1)) ;
339 case V9::reloc_sethi_hh:
340 case V9::reloc_sethi_lm:
341 ResultPtr >>= (MR->getRelocationType() == V9::reloc_sethi_hh ? 32 : 0);
343 ResultPtr &= (1 << 22)-1;
344 *RelocPos |= (unsigned)ResultPtr;
346 case V9::reloc_or_hm:
347 case V9::reloc_or_lo:
348 ResultPtr >>= (MR->getRelocationType() == V9::reloc_or_hm ? 32 : 0);
349 ResultPtr &= (1 << 12)-1;
350 *RelocPos |= (unsigned)ResultPtr;