1 //===-- SparcV9PrologEpilogCodeInserter.cpp - Insert Fn Prolog & Epilog ---===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is the SparcV9 target's own PrologEpilogInserter. It creates prolog and
11 // epilog instructions for functions which have not been compiled using "leaf
12 // function optimizations". These instructions include the SAVE and RESTORE
13 // instructions used to rotate the SPARC register windows. Prologs are
14 // attached to the unique function entry, and epilogs are attached to each
17 //===----------------------------------------------------------------------===//
19 #include "SparcV9Internals.h"
20 #include "SparcV9RegClassInfo.h"
21 #include "SparcV9RegisterInfo.h"
22 #include "SparcV9FrameInfo.h"
23 #include "MachineFunctionInfo.h"
24 #include "MachineCodeForInstruction.h"
25 #include "llvm/CodeGen/MachineFunctionPass.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/Pass.h"
28 #include "llvm/Function.h"
29 #include "llvm/DerivedTypes.h"
30 #include "llvm/Intrinsics.h"
35 struct InsertPrologEpilogCode : public MachineFunctionPass {
36 const char *getPassName() const { return "SparcV9 Prolog/Epilog Inserter"; }
38 bool runOnMachineFunction(MachineFunction &F) {
39 if (!F.getInfo<SparcV9FunctionInfo>()->isCompiledAsLeafMethod()) {
46 void InsertPrologCode(MachineFunction &F);
47 void InsertEpilogCode(MachineFunction &F);
50 } // End anonymous namespace
52 static unsigned getStaticStackSize (MachineFunction &MF) {
53 const TargetFrameInfo& frameInfo = *MF.getTarget().getFrameInfo();
54 unsigned staticStackSize = MF.getInfo<SparcV9FunctionInfo>()->getStaticStackSize();
55 if (staticStackSize < (unsigned)SparcV9FrameInfo::MinStackFrameSize)
56 staticStackSize = SparcV9FrameInfo::MinStackFrameSize;
57 if (unsigned padsz = staticStackSize %
58 SparcV9FrameInfo::StackFrameSizeAlignment)
59 staticStackSize += SparcV9FrameInfo::StackFrameSizeAlignment - padsz;
60 return staticStackSize;
63 void InsertPrologEpilogCode::InsertPrologCode(MachineFunction &MF)
65 std::vector<MachineInstr*> mvec;
66 const TargetMachine &TM = MF.getTarget();
67 const TargetFrameInfo& frameInfo = *TM.getFrameInfo();
69 // The second operand is the stack size. If it does not fit in the
70 // immediate field, we have to use a free register to hold the size.
71 // See the comments below for the choice of this register.
72 unsigned staticStackSize = getStaticStackSize (MF);
73 int32_t C = - (int) staticStackSize;
74 int SP = TM.getRegInfo()->getStackPointer();
75 if (TM.getInstrInfo()->constantFitsInImmedField(V9::SAVEi,staticStackSize)) {
76 mvec.push_back(BuildMI(V9::SAVEi, 3).addMReg(SP).addSImm(C)
77 .addMReg(SP, MachineOperand::Def));
79 // We have to put the stack size value into a register before SAVE.
80 // Use register %g1 since it is volatile across calls. Note that the
81 // local (%l) and in (%i) registers cannot be used before the SAVE!
82 // Do this by creating a code sequence equivalent to:
83 // SETSW -(stackSize), %g1
84 int uregNum = TM.getRegInfo()->getUnifiedRegNum(
85 TM.getRegInfo()->getRegClassIDOfType(Type::IntTy),
86 SparcV9IntRegClass::g1);
88 MachineInstr* M = BuildMI(V9::SETHI, 2).addSImm(C)
89 .addMReg(uregNum, MachineOperand::Def);
90 M->getOperand(0).markHi32();
93 M = BuildMI(V9::ORi, 3).addMReg(uregNum).addSImm(C)
94 .addMReg(uregNum, MachineOperand::Def);
95 M->getOperand(1).markLo32();
98 M = BuildMI(V9::SRAi5, 3).addMReg(uregNum).addZImm(0)
99 .addMReg(uregNum, MachineOperand::Def);
102 // Now generate the SAVE using the value in register %g1
103 M = BuildMI(V9::SAVEr,3).addMReg(SP).addMReg(uregNum)
104 .addMReg(SP,MachineOperand::Def);
108 // For varargs function bodies, insert instructions to copy incoming
109 // register arguments for the ... list to the stack.
110 // The first K=6 arguments are always received via int arg regs
111 // (%i0 ... %i5 if K=6) .
112 // By copying the varargs arguments to the stack, va_arg() then can
113 // simply assume that all vararg arguments are in an array on the stack.
114 if (MF.getFunction()->getFunctionType()->isVarArg()) {
115 int numFixedArgs = MF.getFunction()->getFunctionType()->getNumParams();
116 int numArgRegs = TM.getRegInfo()->getNumOfIntArgRegs();
117 if (numFixedArgs < numArgRegs) {
118 const TargetFrameInfo &FI = *TM.getFrameInfo();
119 int firstArgReg = TM.getRegInfo()->getUnifiedRegNum(
120 TM.getRegInfo()->getRegClassIDOfType(Type::IntTy),
121 SparcV9IntRegClass::i0);
122 int fpReg = SparcV9::i6;
124 int firstArgOffset= SparcV9FrameInfo::FirstIncomingArgOffsetFromFP;
125 int nextArgOffset = firstArgOffset + numFixedArgs * argSize;
127 for (int i=numFixedArgs; i < numArgRegs; ++i) {
128 mvec.push_back(BuildMI(V9::STXi, 3).addMReg(firstArgReg+i).
129 addMReg(fpReg).addSImm(nextArgOffset));
130 nextArgOffset += argSize;
135 MF.front().insert(MF.front().begin(), mvec.begin(), mvec.end());
138 void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
140 const TargetMachine &TM = MF.getTarget();
141 const TargetInstrInfo &MII = *TM.getInstrInfo();
143 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
144 MachineBasicBlock &MBB = *I;
145 const BasicBlock &BB = *I->getBasicBlock();
146 const Instruction *TermInst = (Instruction*)BB.getTerminator();
147 if (TermInst->getOpcode() == Instruction::Ret)
149 int ZR = TM.getRegInfo()->getZeroRegNum();
150 MachineInstr *Restore =
151 BuildMI(V9::RESTOREi, 3).addMReg(ZR).addSImm(0)
152 .addMReg(ZR, MachineOperand::Def);
154 MachineCodeForInstruction &termMvec =
155 MachineCodeForInstruction::get(TermInst);
157 // Remove the NOPs in the delay slots of the return instruction
158 unsigned numNOPs = 0;
159 while (termMvec.back()->getOpcode() == V9::NOP)
161 assert( termMvec.back() == &MBB.back());
163 MBB.erase(&MBB.back());
166 assert(termMvec.back() == &MBB.back());
168 // Check that we found the right number of NOPs and have the right
169 // number of instructions to replace them.
170 unsigned ndelays = MII.getNumDelaySlots(termMvec.back()->getOpcode());
171 assert(numNOPs == ndelays && "Missing NOPs in delay slots?");
172 assert(ndelays == 1 && "Cannot use epilog code for delay slots?");
174 // Append the epilog code to the end of the basic block.
175 MBB.push_back(Restore);
180 FunctionPass *createPrologEpilogInsertionPass() {
181 return new InsertPrologEpilogCode();
184 } // End llvm namespace