1 //===-- PrologEpilogCodeInserter.cpp - Insert Prolog & Epilog code for fn -===//
3 // Insert SAVE/RESTORE instructions for the function
5 // Insert prolog code at the unique function entry point.
6 // Insert epilog code at each function exit point.
7 // InsertPrologEpilog invokes these only if the function is not compiled
8 // with the leaf function optimization.
10 //===----------------------------------------------------------------------===//
12 #include "SparcInternals.h"
13 #include "SparcRegClassInfo.h"
14 #include "llvm/CodeGen/MachineCodeForMethod.h"
15 #include "llvm/CodeGen/MachineCodeForInstruction.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/Pass.h"
18 #include "llvm/Function.h"
19 #include "llvm/BasicBlock.h"
20 #include "llvm/Instruction.h"
23 class InsertPrologEpilogCode : public FunctionPass {
24 TargetMachine &Target;
26 InsertPrologEpilogCode(TargetMachine &T) : Target(T) {}
28 const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; }
30 bool runOnFunction(Function &F) {
31 MachineCodeForMethod &mcodeInfo = MachineCodeForMethod::get(&F);
32 if (!mcodeInfo.isCompiledAsLeafMethod()) {
39 void InsertPrologCode(Function &F);
40 void InsertEpilogCode(Function &F);
43 } // End anonymous namespace
45 //------------------------------------------------------------------------
46 // External Function: GetInstructionsForProlog
47 // External Function: GetInstructionsForEpilog
50 // Create prolog and epilog code for procedure entry and exit
51 //------------------------------------------------------------------------
53 void InsertPrologEpilogCode::InsertPrologCode(Function &F)
55 std::vector<MachineInstr*> mvec;
57 const MachineFrameInfo& frameInfo = Target.getFrameInfo();
59 // The second operand is the stack size. If it does not fit in the
60 // immediate field, we have to use a free register to hold the size.
61 // We will assume that local register `l0' is unused since the SAVE
62 // instruction must be the first instruction in each procedure.
64 MachineCodeForMethod& mcInfo = MachineCodeForMethod::get(&F);
65 unsigned int staticStackSize = mcInfo.getStaticStackSize();
67 if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize())
68 staticStackSize = (unsigned) frameInfo.getMinStackFrameSize();
70 if (unsigned padsz = (staticStackSize %
71 (unsigned) frameInfo.getStackFrameSizeAlignment()))
72 staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz;
74 if (Target.getInstrInfo().constantFitsInImmedField(SAVE, staticStackSize))
76 M = new MachineInstr(SAVE);
77 M->SetMachineOperandReg(0, Target.getRegInfo().getStackPointer());
78 M->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
79 - (int) staticStackSize);
80 M->SetMachineOperandReg(2, Target.getRegInfo().getStackPointer());
85 M = new MachineInstr(SETSW);
86 M->SetMachineOperandConst(0, MachineOperand::MO_SignExtendedImmed,
87 - (int) staticStackSize);
88 M->SetMachineOperandReg(1, MachineOperand::MO_MachineRegister,
89 Target.getRegInfo().getUnifiedRegNum(
90 Target.getRegInfo().getRegClassIDOfType(Type::IntTy),
91 SparcIntRegOrder::l0));
94 M = new MachineInstr(SAVE);
95 M->SetMachineOperandReg(0, Target.getRegInfo().getStackPointer());
96 M->SetMachineOperandReg(1, MachineOperand::MO_MachineRegister,
97 Target.getRegInfo().getUnifiedRegNum(
98 Target.getRegInfo().getRegClassIDOfType(Type::IntTy),
99 SparcIntRegOrder::l0));
100 M->SetMachineOperandReg(2, Target.getRegInfo().getStackPointer());
104 MachineCodeForBasicBlock& bbMvec = F.getEntryNode().getMachineInstrVec();
105 bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end());
108 void InsertPrologEpilogCode::InsertEpilogCode(Function &F)
110 for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I) {
111 Instruction *TermInst = (Instruction*)I->getTerminator();
112 if (TermInst->getOpcode() == Instruction::Ret)
114 MachineInstr *Restore = new MachineInstr(RESTORE);
115 Restore->SetMachineOperandReg(0, Target.getRegInfo().getZeroRegNum());
116 Restore->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
118 Restore->SetMachineOperandReg(2, Target.getRegInfo().getZeroRegNum());
120 MachineCodeForBasicBlock& bbMvec = I->getMachineInstrVec();
121 MachineCodeForInstruction &termMvec =
122 MachineCodeForInstruction::get(TermInst);
124 // Remove the NOPs in the delay slots of the return instruction
125 const MachineInstrInfo &mii = Target.getInstrInfo();
126 unsigned numNOPs = 0;
127 while (termMvec.back()->getOpCode() == NOP)
129 assert( termMvec.back() == bbMvec.back());
130 delete bbMvec.pop_back();
134 assert(termMvec.back() == bbMvec.back());
136 // Check that we found the right number of NOPs and have the right
137 // number of instructions to replace them.
138 unsigned ndelays = mii.getNumDelaySlots(termMvec.back()->getOpCode());
139 assert(numNOPs == ndelays && "Missing NOPs in delay slots?");
140 assert(ndelays == 1 && "Cannot use epilog code for delay slots?");
142 // Append the epilog code to the end of the basic block.
143 bbMvec.push_back(Restore);
148 Pass *createPrologEpilogCodeInserter(TargetMachine &TM) {
149 return new InsertPrologEpilogCode(TM);