1 //===-- SparcV9PrologEpilogCodeInserter.cpp - Insert Fn Prolog & Epilog ---===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Insert SAVE/RESTORE instructions for the function
12 // Insert prolog code at the unique function entry point.
13 // Insert epilog code at each function exit point.
14 // InsertPrologEpilog invokes these only if the function is not compiled
15 // with the leaf function optimization.
17 //===----------------------------------------------------------------------===//
19 #include "SparcV9Internals.h"
20 #include "SparcV9RegClassInfo.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineFunctionInfo.h"
23 #include "llvm/CodeGen/MachineCodeForInstruction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/Pass.h"
26 #include "llvm/Function.h"
27 #include "llvm/DerivedTypes.h"
28 #include "llvm/Intrinsics.h"
33 struct InsertPrologEpilogCode : public MachineFunctionPass {
34 const char *getPassName() const { return "SparcV9 Prolog/Epilog Inserter"; }
36 bool runOnMachineFunction(MachineFunction &F) {
37 if (!F.getInfo()->isCompiledAsLeafMethod()) {
44 void InsertPrologCode(MachineFunction &F);
45 void InsertEpilogCode(MachineFunction &F);
48 } // End anonymous namespace
50 //------------------------------------------------------------------------
51 // Create prolog and epilog code for procedure entry and exit
52 //------------------------------------------------------------------------
54 static unsigned getStaticStackSize (MachineFunction &MF) {
55 const TargetFrameInfo& frameInfo = *MF.getTarget().getFrameInfo();
57 unsigned staticStackSize = MF.getInfo()->getStaticStackSize();
59 if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize())
60 staticStackSize = (unsigned) frameInfo.getMinStackFrameSize();
61 if (unsigned padsz = (staticStackSize %
62 (unsigned) frameInfo.getStackFrameSizeAlignment()))
63 staticStackSize += frameInfo.getStackFrameSizeAlignment() - padsz;
65 return staticStackSize;
68 void InsertPrologEpilogCode::InsertPrologCode(MachineFunction &MF)
70 std::vector<MachineInstr*> mvec;
71 const TargetMachine &TM = MF.getTarget();
72 const TargetFrameInfo& frameInfo = *TM.getFrameInfo();
74 // The second operand is the stack size. If it does not fit in the
75 // immediate field, we have to use a free register to hold the size.
76 // See the comments below for the choice of this register.
78 unsigned staticStackSize = getStaticStackSize (MF);
79 int32_t C = - (int) staticStackSize;
80 int SP = TM.getRegInfo()->getStackPointer();
81 if (TM.getInstrInfo()->constantFitsInImmedField(V9::SAVEi,staticStackSize)) {
82 mvec.push_back(BuildMI(V9::SAVEi, 3).addMReg(SP).addSImm(C)
83 .addMReg(SP, MachineOperand::Def));
85 // We have to put the stack size value into a register before SAVE.
86 // Use register %g1 since it is volatile across calls. Note that the
87 // local (%l) and in (%i) registers cannot be used before the SAVE!
88 // Do this by creating a code sequence equivalent to:
89 // SETSW -(stackSize), %g1
90 int uregNum = TM.getRegInfo()->getUnifiedRegNum(
91 TM.getRegInfo()->getRegClassIDOfType(Type::IntTy),
92 SparcV9IntRegClass::g1);
94 MachineInstr* M = BuildMI(V9::SETHI, 2).addSImm(C)
95 .addMReg(uregNum, MachineOperand::Def);
96 M->getOperand(0).markHi32();
99 M = BuildMI(V9::ORi, 3).addMReg(uregNum).addSImm(C)
100 .addMReg(uregNum, MachineOperand::Def);
101 M->getOperand(1).markLo32();
104 M = BuildMI(V9::SRAi5, 3).addMReg(uregNum).addZImm(0)
105 .addMReg(uregNum, MachineOperand::Def);
108 // Now generate the SAVE using the value in register %g1
109 M = BuildMI(V9::SAVEr,3).addMReg(SP).addMReg(uregNum)
110 .addMReg(SP,MachineOperand::Def);
114 // For varargs function bodies, insert instructions to copy incoming
115 // register arguments for the ... list to the stack.
116 // The first K=6 arguments are always received via int arg regs
117 // (%i0 ... %i5 if K=6) .
118 // By copying the varargs arguments to the stack, va_arg() then can
119 // simply assume that all vararg arguments are in an array on the stack.
121 if (MF.getFunction()->getFunctionType()->isVarArg()) {
122 int numFixedArgs = MF.getFunction()->getFunctionType()->getNumParams();
123 int numArgRegs = TM.getRegInfo()->getNumOfIntArgRegs();
124 if (numFixedArgs < numArgRegs) {
125 const TargetFrameInfo &FI = *TM.getFrameInfo();
127 int firstArgReg = TM.getRegInfo()->getUnifiedRegNum(
128 TM.getRegInfo()->getRegClassIDOfType(Type::IntTy),
129 SparcV9IntRegClass::i0);
130 int fpReg = FI.getIncomingArgBaseRegNum();
131 int argSize = FI.getSizeOfEachArgOnStack();
132 int firstArgOffset= FI.getFirstIncomingArgOffset(MF,ignore);
133 int nextArgOffset = firstArgOffset + numFixedArgs * argSize;
135 for (int i=numFixedArgs; i < numArgRegs; ++i) {
136 mvec.push_back(BuildMI(V9::STXi, 3).addMReg(firstArgReg+i).
137 addMReg(fpReg).addSImm(nextArgOffset));
138 nextArgOffset += argSize;
143 MF.front().insert(MF.front().begin(), mvec.begin(), mvec.end());
146 void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
148 const TargetMachine &TM = MF.getTarget();
149 const TargetInstrInfo &MII = *TM.getInstrInfo();
151 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
152 MachineBasicBlock &MBB = *I;
153 const BasicBlock &BB = *I->getBasicBlock();
154 const Instruction *TermInst = (Instruction*)BB.getTerminator();
155 if (TermInst->getOpcode() == Instruction::Ret)
157 int ZR = TM.getRegInfo()->getZeroRegNum();
158 MachineInstr *Restore =
159 BuildMI(V9::RESTOREi, 3).addMReg(ZR).addSImm(0)
160 .addMReg(ZR, MachineOperand::Def);
162 MachineCodeForInstruction &termMvec =
163 MachineCodeForInstruction::get(TermInst);
165 // Remove the NOPs in the delay slots of the return instruction
166 unsigned numNOPs = 0;
167 while (termMvec.back()->getOpcode() == V9::NOP)
169 assert( termMvec.back() == &MBB.back());
171 MBB.erase(&MBB.back());
174 assert(termMvec.back() == &MBB.back());
176 // Check that we found the right number of NOPs and have the right
177 // number of instructions to replace them.
178 unsigned ndelays = MII.getNumDelaySlots(termMvec.back()->getOpcode());
179 assert(numNOPs == ndelays && "Missing NOPs in delay slots?");
180 assert(ndelays == 1 && "Cannot use epilog code for delay slots?");
182 // Append the epilog code to the end of the basic block.
183 MBB.push_back(Restore);
188 FunctionPass *createPrologEpilogInsertionPass() {
189 return new InsertPrologEpilogCode();
192 } // End llvm namespace