1 /* Title: SparcRegClassInfo.h -*- C++ -*-
2 Author: Ruchira Sasanka
4 Purpose: Contains the description of integer register class of Sparc
8 #ifndef SPARC_REG_INFO_CLASS_H
9 #define SPARC_REG_INFO_CLASS_H
11 #include "llvm/Target/MachineRegInfo.h"
12 #include "llvm/CodeGen/IGNode.h"
14 //-----------------------------------------------------------------------------
15 // Integer Register Class
16 //-----------------------------------------------------------------------------
19 // Int register names in same order as enum in class SparcIntRegOrder
21 static string const IntRegNames[] =
23 "o0", "o1", "o2", "o3", "o4", "o5", "o7",
24 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
25 "i0", "i1", "i2", "i3", "i4", "i5", "i7",
26 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
31 class SparcIntRegOrder{
35 enum RegsInPrefOrder // colors possible for a LR (in preferred order)
37 // --- following colors are volatile across function calls
38 // %g0 can't be used for coloring - always 0
40 //%g1-%g5 (g6-7 are reserved for system)
41 o0, o1, o2, o3, o4, o5, o7, // %o0-%o5,
44 // all %0's can get modified by a call
46 // --- following colors are NON-volatile across function calls
48 l0, l1, l2, l3, l4, l5, l6, l7, // %l0-%l7
49 i0, i1, i2, i3, i4, i5, i7, // %i0-%i5: i's need not be preserved
51 // %i6 is the fp - so not allocated
52 // %i7 is the ret address by convention - can be used for others
54 // max # of colors reg coloring can allocate (NumOfAvailRegs)
56 // --- following colors are not available for allocation within this phase
57 // --- but can appear for pre-colored ranges
59 g0, g1, g2, g3, g4, g5, g6, g7, i6, o6
65 // max # of colors reg coloring can allocate
66 static unsigned int const NumOfAvailRegs = g0;
68 static unsigned int const StartOfNonVolatileRegs = l0;
69 static unsigned int const StartOfAllRegs = o0;
70 static unsigned int const NumOfAllRegs = o6 + 1;
73 static const string getRegName(const unsigned reg) {
74 assert( reg < NumOfAllRegs );
75 return IntRegNames[reg];
82 class SparcIntRegClass : public MachineRegClassInfo
86 SparcIntRegClass(unsigned ID)
87 : MachineRegClassInfo(ID,
88 SparcIntRegOrder::NumOfAvailRegs,
89 SparcIntRegOrder::NumOfAllRegs)
92 void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
96 //-----------------------------------------------------------------------------
97 // Float Register Class
98 //-----------------------------------------------------------------------------
100 static string const FloatRegNames[] =
102 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9",
103 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19",
104 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29",
105 "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
106 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49",
107 "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59",
108 "f60", "f61", "f62", "f63"
112 class SparcFloatRegOrder{
116 enum RegsInPrefOrder {
118 f0, f1, f2, f3, f4, f5, f6, f7, f8, f9,
119 f10, f11, f12, f13, f14, f15, f16, f17, f18, f19,
120 f20, f21, f22, f23, f24, f25, f26, f27, f28, f29,
121 f30, f31, f32, f33, f34, f35, f36, f37, f38, f39,
122 f40, f41, f42, f43, f44, f45, f46, f47, f48, f49,
123 f50, f51, f52, f53, f54, f55, f56, f57, f58, f59,
128 // there are 64 regs alltogether but only 32 regs can be allocated at
131 static unsigned int const NumOfAvailRegs = 32;
132 static unsigned int const NumOfAllRegs = 64;
134 static unsigned int const StartOfNonVolatileRegs = f32;
135 static unsigned int const StartOfAllRegs = f0;
138 static const string getRegName(const unsigned reg) {
139 assert( reg < NumOfAllRegs );
140 return FloatRegNames[reg];
149 class SparcFloatRegClass : public MachineRegClassInfo
153 int findFloatColor(const LiveRange *const LR, unsigned Start,
154 unsigned End, bool IsColorUsedArr[] ) const;
158 SparcFloatRegClass(unsigned ID)
159 : MachineRegClassInfo(ID,
160 SparcFloatRegOrder::NumOfAvailRegs,
161 SparcFloatRegOrder::NumOfAllRegs)
164 void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
171 //-----------------------------------------------------------------------------
172 // Int CC Register Class
173 // Only one integer cc register is available
174 //-----------------------------------------------------------------------------
177 class SparcIntCCRegClass : public MachineRegClassInfo
181 SparcIntCCRegClass(unsigned ID)
182 : MachineRegClassInfo(ID,1, 1) { }
184 inline void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const {
185 Node->setColor(0); // only one int cc reg is available
192 //-----------------------------------------------------------------------------
193 // Float CC Register Class
194 // Only 4 Float CC registers are available
195 //-----------------------------------------------------------------------------
198 static string const FloatCCRegNames[] =
200 "fcc0", "fcc1", "fcc2", "fcc3"
204 class SparcFloatCCRegOrder{
208 enum RegsInPrefOrder {
210 fcc0, fcc1, fcc2, fcc3
213 static const string getRegName(const unsigned reg) {
215 return FloatCCRegNames[reg];
222 class SparcFloatCCRegClass : public MachineRegClassInfo
226 SparcFloatCCRegClass(unsigned ID)
227 : MachineRegClassInfo(ID, 4, 4) { }
229 void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const {
231 for(c=0; c < 4 && IsColorUsedArr[c] ; ++c) ; // find color
232 assert( (c < 4) && "Can allocate only 4 float cc registers");