1 /* Title: SparcRegClassInfo.h -*- C++ -*-
2 Author: Ruchira Sasanka
4 Purpose: Contains the description of integer register class of Sparc
8 #ifndef SPARC_REG_INFO_CLASS_H
9 #define SPARC_REG_INFO_CLASS_H
11 #include "llvm/Target/MachineRegInfo.h"
12 #include "llvm/CodeGen/IGNode.h"
14 //-----------------------------------------------------------------------------
15 // Integer Register Class
16 //-----------------------------------------------------------------------------
19 // Int register names in same order as enum in class SparcIntRegOrder
21 static string const IntRegNames[] =
23 "o0", "o1", "o2", "o3", "o4", "o5", "o7",
24 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
25 "i0", "i1", "i2", "i3", "i4", "i5",
27 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
32 class SparcIntRegOrder{
36 enum RegsInPrefOrder // colors possible for a LR (in preferred order)
38 // --- following colors are volatile across function calls
39 // %g0 can't be used for coloring - always 0
41 //%g1-%g5 (g6-7 are reserved for system)
42 o0, o1, o2, o3, o4, o5, o7, // %o0-%o5,
45 // all %0's can get modified by a call
47 // --- following colors are NON-volatile across function calls
49 l0, l1, l2, l3, l4, l5, l6, l7, // %l0-%l7
50 i0, i1, i2, i3, i4, i5, // %i0-%i5: i's need not be preserved
52 // %i6 is the fp - so not allocated
53 // %i7 is the ret address by convention - can be used for others
55 // max # of colors reg coloring can allocate (NumOfAvailRegs)
57 // --- following colors are not available for allocation within this phase
58 // --- but can appear for pre-colored ranges
60 i6, i7, g0, g1, g2, g3, g4, g5, g6, g7, o6
62 //*** NOTE: If we decide to use globals, some of them are volatile
63 //**** see sparc64ABI (change isRegVloatile method below)
68 // max # of colors reg coloring can allocate
69 static unsigned int const NumOfAvailRegs = i6;
71 static unsigned int const StartOfNonVolatileRegs = l0;
72 static unsigned int const StartOfAllRegs = o0;
73 static unsigned int const NumOfAllRegs = o6 + 1;
76 static const string getRegName(const unsigned reg) {
77 assert( reg < NumOfAllRegs );
78 return IntRegNames[reg];
81 static unsigned int getRegNumInCallersWindow(const unsigned reg) {
82 if (reg <= l7 || reg == o6) {
83 assert(0 && "registers o0-o7 and l0-l7 are not visible in caller");
87 return reg - (i0 - o0);
88 assert((reg >= g0 || reg <= g7) && "Unrecognized integer register number");
95 class SparcIntRegClass : public MachineRegClassInfo
99 SparcIntRegClass(unsigned ID)
100 : MachineRegClassInfo(ID,
101 SparcIntRegOrder::NumOfAvailRegs,
102 SparcIntRegOrder::NumOfAllRegs)
105 void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
107 inline bool isRegVolatile(const int Reg) const {
108 return (Reg < (int) SparcIntRegOrder::StartOfNonVolatileRegs);
113 //-----------------------------------------------------------------------------
114 // Float Register Class
115 //-----------------------------------------------------------------------------
117 static string const FloatRegNames[] =
119 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9",
120 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19",
121 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29",
122 "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
123 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49",
124 "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59",
125 "f60", "f61", "f62", "f63"
129 class SparcFloatRegOrder{
133 enum RegsInPrefOrder {
135 f0, f1, f2, f3, f4, f5, f6, f7, f8, f9,
136 f10, f11, f12, f13, f14, f15, f16, f17, f18, f19,
137 f20, f21, f22, f23, f24, f25, f26, f27, f28, f29,
138 f30, f31, f32, f33, f34, f35, f36, f37, f38, f39,
139 f40, f41, f42, f43, f44, f45, f46, f47, f48, f49,
140 f50, f51, f52, f53, f54, f55, f56, f57, f58, f59,
145 // there are 64 regs alltogether but only 32 regs can be allocated at
148 static unsigned int const NumOfAvailRegs = 32;
149 static unsigned int const NumOfAllRegs = 64;
151 static unsigned int const StartOfNonVolatileRegs = f32;
152 static unsigned int const StartOfAllRegs = f0;
155 static const string getRegName(const unsigned reg) {
156 assert( reg < NumOfAllRegs );
157 return FloatRegNames[reg];
166 class SparcFloatRegClass : public MachineRegClassInfo
170 int findFloatColor(const LiveRange *const LR, unsigned Start,
171 unsigned End, bool IsColorUsedArr[] ) const;
175 SparcFloatRegClass(unsigned ID)
176 : MachineRegClassInfo(ID,
177 SparcFloatRegOrder::NumOfAvailRegs,
178 SparcFloatRegOrder::NumOfAllRegs)
181 void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
183 // according to Sparc 64 ABI, all %fp regs are volatile
184 inline bool isRegVolatile(const int Reg) const { return true; }
192 //-----------------------------------------------------------------------------
193 // Int CC Register Class
194 // Only one integer cc register is available
195 //-----------------------------------------------------------------------------
198 class SparcIntCCRegClass : public MachineRegClassInfo
202 SparcIntCCRegClass(unsigned ID)
203 : MachineRegClassInfo(ID,1, 1) { }
205 inline void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const {
206 Node->setColor(0); // only one int cc reg is available
209 // *** TODO: Check this
210 inline bool isRegVolatile(const int Reg) const { return true; }
216 //-----------------------------------------------------------------------------
217 // Float CC Register Class
218 // Only 4 Float CC registers are available
219 //-----------------------------------------------------------------------------
222 static string const FloatCCRegNames[] =
224 "fcc0", "fcc1", "fcc2", "fcc3"
228 class SparcFloatCCRegOrder{
232 enum RegsInPrefOrder {
234 fcc0, fcc1, fcc2, fcc3
237 static const string getRegName(const unsigned reg) {
239 return FloatCCRegNames[reg];
242 // according to Sparc 64 ABI, all %fp regs are volatile
243 inline bool isRegVolatile(const int Reg) const { return true; }
250 class SparcFloatCCRegClass : public MachineRegClassInfo
254 SparcFloatCCRegClass(unsigned ID)
255 : MachineRegClassInfo(ID, 4, 4) { }
257 void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const {
259 for(c=0; c < 4 && IsColorUsedArr[c] ; ++c) ; // find color
260 assert( (c < 4) && "Can allocate only 4 float cc registers");
264 // *** TODO: Check this
265 inline bool isRegVolatile(const int Reg) const { return true; }