1 #include "llvm/Target/Sparc.h"
2 #include "SparcInternals.h"
3 #include "llvm/Method.h"
4 #include "llvm/iTerminators.h"
5 #include "llvm/iOther.h"
6 #include "llvm/CodeGen/InstrScheduling.h"
7 #include "llvm/CodeGen/InstrSelection.h"
9 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
10 #include "llvm/CodeGen/PhyRegAlloc.h"
15 //---------------------------------------------------------------------------
17 //---------------------------------------------------------------------------
19 //---------------------------------------------------------------------------
20 // Finds the return value of a call instruction
21 //---------------------------------------------------------------------------
24 UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
26 unsigned OpCode = CallMI->getOpCode();
27 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
29 if( OpCode == CALL ) {
31 // The one before the last implicit operand is the return value of
33 if( NumOfImpRefs > 1 )
34 if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
35 return CallMI->getImplicitRef(NumOfImpRefs-2);
38 else if( OpCode == JMPLCALL) {
40 // The last implicit operand is the return value of a JMPL in
41 if( NumOfImpRefs > 0 )
42 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
43 return CallMI->getImplicitRef(NumOfImpRefs-1);
46 assert(0 && "OpCode must be CALL/JMPL for a call instr");
52 //---------------------------------------------------------------------------
53 // Finds the return address of a call instruction
54 //---------------------------------------------------------------------------
57 UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
59 unsigned OpCode = CallMI->getOpCode();
63 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
65 assert( NumOfImpRefs && "CALL instr must have at least on ImpRef");
66 // The last implicit operand is the return address of a CALL instr
67 return CallMI->getImplicitRef(NumOfImpRefs-1);
70 else if( OpCode == JMPLCALL ) {
72 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
73 return MO.getVRegValue();
77 assert(0 && "OpCode must be CALL/JMPL for a call instr");
79 assert(0 && "There must be a return addr for a call instr");
86 //---------------------------------------------------------------------------
87 // Finds the # of actual arguments of the call instruction
88 //---------------------------------------------------------------------------
91 UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
93 unsigned OpCode = CallMI->getOpCode();
94 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
97 if( OpCode == CALL ) {
99 switch( NumOfImpRefs ) {
101 case 0: assert(0 && "A CALL inst must have at least one ImpRef (RetAddr)");
106 default: // two or more implicit refs
107 if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
108 NumArgs = NumOfImpRefs - 2; // i.e., NumOfImpRef-2 is the ret val
110 NumArgs = NumOfImpRefs - 1;
114 else if( OpCode == JMPLCALL ) {
116 // The last implicit operand is the return value of a JMPL instr
117 if( NumOfImpRefs > 0 ) {
118 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
119 NumArgs = NumOfImpRefs - 1; // i.e., NumOfImpRef-1 is the ret val
121 NumArgs = NumOfImpRefs;
124 NumArgs = NumOfImpRefs;
127 assert(0 && "OpCode must be CALL/JMPL for a call instr");
129 assert( (NumArgs != -1) && "Internal error in getCallInstNumArgs" );
130 return (unsigned) NumArgs;
136 //---------------------------------------------------------------------------
137 // Suggests a register for the ret address in the RET machine instruction
138 //---------------------------------------------------------------------------
140 void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
141 LiveRangeInfo& LRI) const {
143 assert( (RetMI->getNumOperands() >= 2)
144 && "JMPL/RETURN must have 3 and 2 operands respectively");
146 MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0);
148 MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
151 // Instead of setting the color, we can suggest one. In that case,
152 // we have to test later whether it received the suggested color.
153 // In that case, a LR has to be created at the start of method.
154 // It has to be done as follows (remove the setRegVal above):
157 const Value *RetAddrVal = MO.getVRegValue();
159 assert( RetAddrVal && "LR for ret address must be created at start");
161 LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
162 RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
163 SparcIntRegOrdr::i7) );
170 //---------------------------------------------------------------------------
171 // Suggests a register for the ret address in the JMPL/CALL machine instr
172 //---------------------------------------------------------------------------
173 void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
175 vector<RegClass *> RCList) const {
178 const Value *RetAddrVal = getCallInstRetAddr( CallMI );
180 // RetAddrVal cannot be NULL (asserted in getCallInstRetAddr)
181 // create a new LR for the return address and color it
183 LiveRange * RetAddrLR = new LiveRange();
184 RetAddrLR->add( RetAddrVal );
185 unsigned RegClassID = getRegClassIDOfValue( RetAddrVal );
186 RetAddrLR->setRegClass( RCList[RegClassID] );
187 RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o7));
188 LRI.addLRToMap( RetAddrVal, RetAddrLR);
192 assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
194 // directly set color since the LR of ret address (if there were one)
195 // will not extend after the call instr
197 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
198 MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
207 //---------------------------------------------------------------------------
208 // This method will suggest colors to incoming args to a method.
209 // If the arg is passed on stack due to the lack of regs, NOTHING will be
210 // done - it will be colored (or spilled) as a normal value.
211 //---------------------------------------------------------------------------
213 void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
214 LiveRangeInfo& LRI) const
217 // get the argument list
218 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
219 // get an iterator to arg list
220 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
223 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
226 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
227 assert( LR && "No live range found for method arg");
229 unsigned RegType = getRegType( LR );
232 // if the arg is in int class - allocate a reg for an int arg
233 if( RegType == IntRegType ) {
235 if( argNo < NumOfIntArgRegs) {
236 LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
241 // Do NOTHING as this will be colored as a normal value.
242 if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
246 else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs)
247 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
250 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
251 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
258 //---------------------------------------------------------------------------
260 //---------------------------------------------------------------------------
262 void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
264 AddedInstrns *const FirstAI) const {
266 // get the argument list
267 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
268 // get an iterator to arg list
269 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
275 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
278 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
279 assert( LR && "No live range found for method arg");
282 // if the LR received the suggested color, NOTHING to be done
283 if( LR->hasSuggestedColor() && LR->hasColor() )
284 if( LR->getSuggestedColor() == LR->getColor() )
287 // We are here because the LR did not have a suggested
288 // color or did not receive the suggested color. Now handle
292 unsigned RegType = getRegType( LR );
293 unsigned RegClassID = (LR->getRegClass())->getID();
296 // find whether this argument is coming in a register (if not, on stack)
298 bool isArgInReg = false;
299 unsigned UniArgReg = InvalidRegNum;
301 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
303 UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0 + argNo );
305 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
307 UniArgReg = getUnifiedRegNum( RegClassID,
308 SparcFloatRegOrder::f0 + argNo*2 + 1 ) ;
310 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
312 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
316 if( LR->hasColor() ) {
318 // We are here because the LR did not have a suggested
319 // color or did not receive the suggested color but LR got a register.
320 // Now we have to copy %ix reg (or stack pos of arg)
321 // to the register it was colored with.
323 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
325 // if the arg is coming in a register and goes into a register
327 AdMI = cpReg2RegMI(UniArgReg, UniLRReg, RegType );
330 assert(0 && "TODO: Color an Incoming arg on stack");
332 // Now add the instruction
333 FirstAI->InstrnsBefore.push_back( AdMI );
337 else { // LR is not colored (i.e., spilled)
339 assert(0 && "TODO: Color a spilled arg ");
344 } // for each incoming argument
351 //---------------------------------------------------------------------------
352 // This method is called before graph coloring to suggest colors to the
353 // outgoing call args and the return value of the call.
354 //---------------------------------------------------------------------------
355 void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
357 vector<RegClass *> RCList) const {
359 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
361 suggestReg4CallAddr(CallMI, LRI, RCList);
364 // First color the return value of the call instruction. The return value
365 // will be in %o0 if the value is an integer type, or in %f0 if the
366 // value is a float type.
368 // the return value cannot have a LR in machine instruction since it is
369 // only defined by the call instruction
371 // if type is not void, create a new live range and set its
372 // register class and add to LRI
375 const Value *RetVal = getCallInstRetVal( CallMI );
380 assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
381 "LR for ret Value of call already definded!");
384 // create a new LR for the return value
386 LiveRange * RetValLR = new LiveRange();
387 RetValLR->add( RetVal );
388 unsigned RegClassID = getRegClassIDOfValue( RetVal );
389 RetValLR->setRegClass( RCList[RegClassID] );
390 LRI.addLRToMap( RetVal, RetValLR);
392 // now suggest a register depending on the register class of ret arg
394 if( RegClassID == IntRegClassID )
395 RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
396 else if (RegClassID == FloatRegClassID )
397 RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
398 else assert( 0 && "Unknown reg class for return value of call\n");
403 // Now suggest colors for arguments (operands) of the call instruction.
404 // Colors are suggested only if the arg number is smaller than the
405 // the number of registers allocated for argument passing.
406 // Now, go thru call args - implicit operands of the call MI
408 unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
410 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
412 const Value *CallArg = CallMI->getImplicitRef(i);
414 // get the LR of call operand (parameter)
415 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
417 // not possible to have a null LR since all args (even consts)
418 // must be defined before
421 cerr << " ERROR: In call instr, no LR for arg: " ;
422 printValue(CallArg); cerr << endl;
424 assert(0 && "NO LR for call arg");
428 unsigned RegType = getRegType( LR );
430 // if the arg is in int class - allocate a reg for an int arg
431 if( RegType == IntRegType ) {
433 if( argNo < NumOfIntArgRegs)
434 LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo );
437 // Do NOTHING as this will be colored as a normal value.
438 cerr << " Regr not suggested for int call arg" << endl;
441 else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
442 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
445 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
446 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
449 } // for all call arguments
454 //---------------------------------------------------------------------------
455 // After graph coloring, we have call this method to see whehter the return
456 // value and the call args received the correct colors. If not, we have
457 // to instert copy instructions.
458 //---------------------------------------------------------------------------
461 void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
463 AddedInstrns *const CallAI) const {
465 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
467 // First color the return value of the call.
468 // If there is a LR for the return value, it means this
469 // method returns a value
473 const Value *RetVal = getCallInstRetVal( CallMI );
477 LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
480 cerr << "\nNo LR for:";
481 printValue( RetVal );
483 assert( RetValLR && "ERR:No LR for non-void return value");
487 bool recvSugColor = false;
489 if( RetValLR->hasSuggestedColor() && RetValLR->hasColor() )
490 if( RetValLR->getSuggestedColor() == RetValLR->getColor())
493 // if we didn't receive the suggested color for some reason,
494 // put copy instruction
496 if( !recvSugColor ) {
498 if( RetValLR->hasColor() ) {
500 unsigned RegType = getRegType( RetValLR );
501 unsigned RegClassID = (RetValLR->getRegClass())->getID();
504 UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
505 unsigned UniRetReg = InvalidRegNum;
507 // find where we receive the return value depending on
510 if(RegClassID == IntRegClassID)
511 UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0);
512 else if(RegClassID == FloatRegClassID)
513 UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
516 AdMI = cpReg2RegMI(UniRetReg, UniRetLRReg, RegType );
517 CallAI->InstrnsAfter.push_back( AdMI );
523 assert(0 && "LR of return value is splilled");
527 } // the LR didn't receive the suggested color
529 } // if there a return value
532 // Now color all args of the call instruction
534 unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
536 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
538 const Value *CallArg = CallMI->getImplicitRef(i);
540 // get the LR of call operand (parameter)
541 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
543 unsigned RegType = getRegType( CallArg );
544 unsigned RegClassID = getRegClassIDOfValue( CallArg);
546 // find whether this argument is coming in a register (if not, on stack)
548 bool isArgInReg = false;
549 unsigned UniArgReg = InvalidRegNum;
551 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
553 UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo );
555 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
557 UniArgReg = getUnifiedRegNum(RegClassID,
558 SparcFloatRegOrder::f0 + (argNo*2 + 1) );
560 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
562 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
566 // not possible to have a null LR since all args (even consts)
567 // must be defined before
570 cerr << " ERROR: In call instr, no LR for arg: " ;
571 printValue(CallArg); cerr << endl;
573 assert(0 && "NO LR for call arg");
578 // if the LR received the suggested color, NOTHING to do
580 if( LR->hasSuggestedColor() && LR->hasColor() )
581 if( LR->getSuggestedColor() == LR->getColor() )
585 if( LR->hasColor() ) {
587 // We are here because though the LR is allocated a register, it
588 // was not allocated the suggested register. So, we have to copy %ix reg
589 // (or stack pos of arg) to the register it was colored with
592 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
595 AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
598 assert(0 && "TODO: Push an outgoing arg on stack");
600 // Now add the instruction
601 CallAI->InstrnsBefore.push_back( AdMI );
605 else { // LR is not colored (i.e., spilled)
607 assert(0 && "TODO: Copy a spilled call arg to an output reg ");
611 } // for each parameter in call instruction
615 //---------------------------------------------------------------------------
616 // This method is called for an LLVM return instruction to identify which
617 // values will be returned from this method and to suggest colors.
618 //---------------------------------------------------------------------------
619 void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI,
620 LiveRangeInfo& LRI) const {
622 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
625 suggestReg4RetAddr(RetMI, LRI);
627 // if there is an implicit ref, that has to be the ret value
628 if( RetMI->getNumImplicitRefs() > 0 ) {
630 // The first implicit operand is the return value of a return instr
631 const Value *RetVal = RetMI->getImplicitRef(0);
634 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
637 cerr << "\nNo LR for:";
638 printValue( RetVal );
640 assert( LR && "No LR for return value of non-void method");
644 unsigned RegClassID = (LR->getRegClass())->getID();
646 if( RegClassID == IntRegClassID )
647 LR->setSuggestedColor(SparcIntRegOrder::i0);
649 else if ( RegClassID == FloatRegClassID )
650 LR->setSuggestedColor(SparcFloatRegOrder::f0);
656 //---------------------------------------------------------------------------
658 //---------------------------------------------------------------------------
659 void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI,
661 AddedInstrns *const RetAI) const {
663 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
665 // if there is an implicit ref, that has to be the ret value
666 if( RetMI->getNumImplicitRefs() > 0 ) {
668 // The first implicit operand is the return value of a return instr
669 const Value *RetVal = RetMI->getImplicitRef(0);
672 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
675 cerr << "\nNo LR for:";
676 printValue( RetVal );
678 // assert( LR && "No LR for return value of non-void method");
682 unsigned RegClassID = getRegClassIDOfValue(RetVal);
683 unsigned RegType = getRegType( RetVal );
684 unsigned UniRetReg = InvalidRegNum;
686 if(RegClassID == IntRegClassID)
687 UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 );
688 else if(RegClassID == FloatRegClassID)
689 UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
693 // if the LR received the suggested color, NOTHING to do
695 if( LR->hasSuggestedColor() && LR->hasColor() )
696 if( LR->getSuggestedColor() == LR->getColor() )
699 if( LR->hasColor() ) {
701 // We are here because the LR was allocted a regiter, but NOT
702 // the correct register.
704 // copy the LR of retun value to i0 or f0
706 unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor());
708 if(RegClassID == IntRegClassID)
709 UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0);
710 else if(RegClassID == FloatRegClassID)
711 UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
713 AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType);
717 assert(0 && "TODO: Copy the return value from stack\n");
719 } // if there is a return value
724 //---------------------------------------------------------------------------
725 // Copy from a register to register. Register number must be the unified
727 //---------------------------------------------------------------------------
730 MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
731 const unsigned DestReg,
732 const int RegType) const {
734 assert( ((int)SrcReg != InvalidRegNum) && ((int)DestReg != InvalidRegNum) &&
737 MachineInstr * MI = NULL;
744 MI = new MachineInstr(ADD, 3);
745 MI->SetMachineOperand(0, SrcReg, false);
746 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
747 MI->SetMachineOperand(2, DestReg, true);
750 case FPSingleRegType:
751 MI = new MachineInstr(FMOVS, 2);
752 MI->SetMachineOperand(0, SrcReg, false);
753 MI->SetMachineOperand(1, DestReg, true);
756 case FPDoubleRegType:
757 MI = new MachineInstr(FMOVD, 2);
758 MI->SetMachineOperand(0, SrcReg, false);
759 MI->SetMachineOperand(1, DestReg, true);
763 assert(0 && "Unknow RegType");
770 //---------------------------------------------------------------------------
771 // Copy from a register to memory. Register number must be the unified
773 //---------------------------------------------------------------------------
776 MachineInstr * UltraSparcRegInfo::cpReg2MemMI(const unsigned SrcReg,
777 const unsigned DestPtrReg,
779 const int RegType) const {
782 MachineInstr * MI = NULL;
789 MI = new MachineInstr(STX, 3);
790 MI->SetMachineOperand(0, DestPtrReg, false);
791 MI->SetMachineOperand(1, SrcReg, false);
792 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
793 (int64_t) Offset, false);
796 case FPSingleRegType:
797 MI = new MachineInstr(ST, 3);
798 MI->SetMachineOperand(0, DestPtrReg, false);
799 MI->SetMachineOperand(1, SrcReg, false);
800 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
801 (int64_t) Offset, false);
804 case FPDoubleRegType:
805 MI = new MachineInstr(STD, 3);
806 MI->SetMachineOperand(0, DestPtrReg, false);
807 MI->SetMachineOperand(1, SrcReg, false);
808 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
809 (int64_t) Offset, false);
813 assert(0 && "Unknow RegType");
820 //---------------------------------------------------------------------------
821 // Copy from memory to a reg. Register number must be the unified
823 //---------------------------------------------------------------------------
826 MachineInstr * UltraSparcRegInfo::cpMem2RegMI(const unsigned SrcPtrReg,
828 const unsigned DestReg,
829 const int RegType) const {
831 MachineInstr * MI = NULL;
838 MI = new MachineInstr(LDX, 3);
839 MI->SetMachineOperand(0, SrcPtrReg, false);
840 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
841 (int64_t) Offset, false);
842 MI->SetMachineOperand(2, DestReg, false);
845 case FPSingleRegType:
846 MI = new MachineInstr(LD, 3);
847 MI->SetMachineOperand(0, SrcPtrReg, false);
848 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
849 (int64_t) Offset, false);
850 MI->SetMachineOperand(2, DestReg, false);
854 case FPDoubleRegType:
855 MI = new MachineInstr(LDD, 3);
856 MI->SetMachineOperand(0, SrcPtrReg, false);
857 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
858 (int64_t) Offset, false);
859 MI->SetMachineOperand(2, DestReg, false);
863 assert(0 && "Unknow RegType");
877 //---------------------------------------------------------------------------
878 // Only constant/label values are accepted.
879 // ***This code is temporary ***
880 //---------------------------------------------------------------------------
883 MachineInstr * UltraSparcRegInfo::cpValue2RegMI(Value * Val,
884 const unsigned DestReg,
885 const int RegType) const {
887 assert( ((int)DestReg != InvalidRegNum) && "Invalid Register");
893 MachineOperand::MachineOperandType MOTypeInt =
894 ChooseRegOrImmed(Val, ADD, *UltraSparcInfo, true, MReg, Imm);
897 MachineOperand::MachineOperandType MOType;
899 switch( Val->getValueType() ) {
901 case Value::ConstantVal:
902 case Value::GlobalVariableVal:
903 MOType = MachineOperand:: MO_UnextendedImmed; // TODO**** correct???
906 case Value::BasicBlockVal:
907 case Value::MethodVal:
908 MOType = MachineOperand::MO_PCRelativeDisp;
912 cerr << "Value Type: " << Val->getValueType() << endl;
913 assert(0 && "Unknown val type - Only constants/globals/labels are valid");
918 MachineInstr * MI = NULL;
923 MI = new MachineInstr(ADD);
924 MI->SetMachineOperand(0, MOType, Val, false);
925 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
926 MI->SetMachineOperand(2, DestReg, true);
929 case FPSingleRegType:
930 assert(0 && "FP const move not yet implemented");
931 MI = new MachineInstr(FMOVS);
932 MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
933 MI->SetMachineOperand(1, DestReg, true);
936 case FPDoubleRegType:
937 assert(0 && "FP const move not yet implemented");
938 MI = new MachineInstr(FMOVD);
939 MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
940 MI->SetMachineOperand(1, DestReg, true);
944 assert(0 && "Unknow RegType");
956 //---------------------------------------------------------------------------
957 // Print the register assigned to a LR
958 //---------------------------------------------------------------------------
960 void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
962 unsigned RegClassID = (LR->getRegClass())->getID();
964 cerr << " *Node " << (LR->getUserIGNode())->getIndex();
966 if( ! LR->hasColor() ) {
967 cerr << " - could not find a color" << endl;
971 // if a color is found
973 cerr << " colored with color "<< LR->getColor();
975 if( RegClassID == IntRegClassID ) {
977 cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
980 else if ( RegClassID == FloatRegClassID) {
981 cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
982 if( LR->getTypeID() == Type::DoubleTyID )
983 cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);