1 #include "llvm/Target/Sparc.h"
2 #include "SparcInternals.h"
3 #include "llvm/Method.h"
4 #include "llvm/iTerminators.h"
5 #include "llvm/iOther.h"
6 #include "llvm/CodeGen/InstrScheduling.h"
7 #include "llvm/CodeGen/InstrSelection.h"
9 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
10 #include "llvm/CodeGen/PhyRegAlloc.h"
15 //---------------------------------------------------------------------------
17 //---------------------------------------------------------------------------
19 //---------------------------------------------------------------------------
20 // Finds the return value of a call instruction
21 //---------------------------------------------------------------------------
24 UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
26 unsigned OpCode = CallMI->getOpCode();
27 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
29 if( OpCode == CALL ) {
31 // The one before the last implicit operand is the return value of
33 if( NumOfImpRefs > 1 )
34 if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
35 return CallMI->getImplicitRef(NumOfImpRefs-2);
38 else if( OpCode == JMPLCALL) {
40 // The last implicit operand is the return value of a JMPL in
41 if( NumOfImpRefs > 0 )
42 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
43 return CallMI->getImplicitRef(NumOfImpRefs-1);
46 assert(0 && "OpCode must be CALL/JMPL for a call instr");
52 //---------------------------------------------------------------------------
53 // Finds the return address of a call instruction
54 //---------------------------------------------------------------------------
57 UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
59 unsigned OpCode = CallMI->getOpCode();
63 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
65 assert( NumOfImpRefs && "CALL instr must have at least on ImpRef");
66 // The last implicit operand is the return address of a CALL instr
67 return CallMI->getImplicitRef(NumOfImpRefs-1);
70 else if( OpCode == JMPLCALL ) {
72 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
73 return MO.getVRegValue();
77 assert(0 && "OpCode must be CALL/JMPL for a call instr");
79 assert(0 && "There must be a return addr for a call instr");
86 //---------------------------------------------------------------------------
87 // Finds the # of actual arguments of the call instruction
88 //---------------------------------------------------------------------------
91 UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
93 unsigned OpCode = CallMI->getOpCode();
94 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
97 if( OpCode == CALL ) {
99 switch( NumOfImpRefs ) {
101 case 0: assert(0 && "A CALL inst must have at least one ImpRef (RetAddr)");
106 default: // two or more implicit refs
107 if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
108 NumArgs = NumOfImpRefs - 2; // i.e., NumOfImpRef-2 is the ret val
110 NumArgs = NumOfImpRefs - 1;
114 else if( OpCode == JMPLCALL ) {
116 // The last implicit operand is the return value of a JMPL instr
117 if( NumOfImpRefs > 0 ) {
118 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
119 NumArgs = NumOfImpRefs - 1; // i.e., NumOfImpRef-1 is the ret val
121 NumArgs = NumOfImpRefs;
124 NumArgs = NumOfImpRefs;
127 assert(0 && "OpCode must be CALL/JMPL for a call instr");
129 assert( (NumArgs != -1) && "Internal error in getCallInstNumArgs" );
130 return (unsigned) NumArgs;
136 //---------------------------------------------------------------------------
137 // Suggests a register for the ret address in the RET machine instruction
138 //---------------------------------------------------------------------------
140 void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
141 LiveRangeInfo& LRI) const {
143 assert( (RetMI->getNumOperands() >= 2)
144 && "JMPL/RETURN must have 3 and 2 operands respectively");
146 MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0);
148 MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
151 // Instead of setting the color, we can suggest one. In that case,
152 // we have to test later whether it received the suggested color.
153 // In that case, a LR has to be created at the start of method.
154 // It has to be done as follows (remove the setRegVal above):
157 const Value *RetAddrVal = MO.getVRegValue();
159 assert( RetAddrVal && "LR for ret address must be created at start");
161 LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
162 RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
163 SparcIntRegOrdr::i7) );
170 //---------------------------------------------------------------------------
171 // Suggests a register for the ret address in the JMPL/CALL machine instr
172 //---------------------------------------------------------------------------
173 void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
175 vector<RegClass *> RCList) const {
178 const Value *RetAddrVal = getCallInstRetAddr( CallMI );
180 // RetAddrVal cannot be NULL (asserted in getCallInstRetAddr)
181 // create a new LR for the return address and color it
183 LiveRange * RetAddrLR = new LiveRange();
184 RetAddrLR->add( RetAddrVal );
185 unsigned RegClassID = getRegClassIDOfValue( RetAddrVal );
186 RetAddrLR->setRegClass( RCList[RegClassID] );
187 RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o7));
188 LRI.addLRToMap( RetAddrVal, RetAddrLR);
192 assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
194 // directly set color since the LR of ret address (if there were one)
195 // will not extend after the call instr
197 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
198 MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
207 //---------------------------------------------------------------------------
208 // This method will suggest colors to incoming args to a method.
209 // If the arg is passed on stack due to the lack of regs, NOTHING will be
210 // done - it will be colored (or spilled) as a normal value.
211 //---------------------------------------------------------------------------
213 void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
214 LiveRangeInfo& LRI) const
217 // get the argument list
218 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
219 // get an iterator to arg list
220 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
223 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
226 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
227 assert( LR && "No live range found for method arg");
229 unsigned RegType = getRegType( LR );
232 // if the arg is in int class - allocate a reg for an int arg
233 if( RegType == IntRegType ) {
235 if( argNo < NumOfIntArgRegs) {
236 LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
241 // Do NOTHING as this will be colored as a normal value.
242 if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
246 else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs)
247 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
250 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
251 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
258 //---------------------------------------------------------------------------
260 //---------------------------------------------------------------------------
262 void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
264 AddedInstrns *const FirstAI) const {
266 // get the argument list
267 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
268 // get an iterator to arg list
269 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
275 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
278 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
279 assert( LR && "No live range found for method arg");
282 unsigned RegType = getRegType( LR );
283 unsigned RegClassID = (LR->getRegClass())->getID();
286 // find whether this argument is coming in a register (if not, on stack)
288 bool isArgInReg = false;
289 unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
291 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
293 UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 + argNo );
295 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
297 UniArgReg = getUnifiedRegNum( RegClassID,
298 SparcFloatRegOrder::f0 + argNo*2 + 1 ) ;
300 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
302 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
306 if( LR->hasColor() ) {
308 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
310 // if LR received the correct color, nothing to do
311 if( UniLRReg == UniArgReg )
314 // We are here because the LR did not have a suggested
315 // color or did not receive the suggested color but LR got a register.
316 // Now we have to copy %ix reg (or stack pos of arg)
317 // to the register it was colored with.
319 // if the arg is coming in UniArgReg register MUST go into
320 // the UniLRReg register
322 AdMI = cpReg2RegMI( UniArgReg, UniLRReg, RegType );
325 assert(0 && "TODO: Color an Incoming arg on stack");
327 // Now add the instruction
328 FirstAI->InstrnsBefore.push_back( AdMI );
332 else { // LR is not colored (i.e., spilled)
334 assert(0 && "TODO: Color a spilled arg ");
339 } // for each incoming argument
346 //---------------------------------------------------------------------------
347 // This method is called before graph coloring to suggest colors to the
348 // outgoing call args and the return value of the call.
349 //---------------------------------------------------------------------------
350 void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
352 vector<RegClass *> RCList) const {
354 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
356 suggestReg4CallAddr(CallMI, LRI, RCList);
359 // First color the return value of the call instruction. The return value
360 // will be in %o0 if the value is an integer type, or in %f0 if the
361 // value is a float type.
363 // the return value cannot have a LR in machine instruction since it is
364 // only defined by the call instruction
366 // if type is not void, create a new live range and set its
367 // register class and add to LRI
370 const Value *RetVal = getCallInstRetVal( CallMI );
375 assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
376 "LR for ret Value of call already definded!");
379 // create a new LR for the return value
381 LiveRange * RetValLR = new LiveRange();
382 RetValLR->add( RetVal );
383 unsigned RegClassID = getRegClassIDOfValue( RetVal );
384 RetValLR->setRegClass( RCList[RegClassID] );
385 LRI.addLRToMap( RetVal, RetValLR);
387 // now suggest a register depending on the register class of ret arg
389 if( RegClassID == IntRegClassID )
390 RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
391 else if (RegClassID == FloatRegClassID )
392 RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
393 else assert( 0 && "Unknown reg class for return value of call\n");
398 // Now suggest colors for arguments (operands) of the call instruction.
399 // Colors are suggested only if the arg number is smaller than the
400 // the number of registers allocated for argument passing.
401 // Now, go thru call args - implicit operands of the call MI
403 unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
405 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
407 const Value *CallArg = CallMI->getImplicitRef(i);
409 // get the LR of call operand (parameter)
410 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
412 // not possible to have a null LR since all args (even consts)
413 // must be defined before
416 cerr << " ERROR: In call instr, no LR for arg: " ;
417 printValue(CallArg); cerr << endl;
419 assert(0 && "NO LR for call arg");
423 unsigned RegType = getRegType( LR );
425 // if the arg is in int class - allocate a reg for an int arg
426 if( RegType == IntRegType ) {
428 if( argNo < NumOfIntArgRegs)
429 LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo );
432 // Do NOTHING as this will be colored as a normal value.
433 cerr << " Regr not suggested for int call arg" << endl;
436 else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
437 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
440 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
441 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
444 } // for all call arguments
449 //---------------------------------------------------------------------------
450 // After graph coloring, we have call this method to see whehter the return
451 // value and the call args received the correct colors. If not, we have
452 // to instert copy instructions.
453 //---------------------------------------------------------------------------
456 void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
458 AddedInstrns *const CallAI) const {
460 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
462 // First color the return value of the call.
463 // If there is a LR for the return value, it means this
464 // method returns a value
468 const Value *RetVal = getCallInstRetVal( CallMI );
472 LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
475 cerr << "\nNo LR for:";
476 printValue( RetVal );
478 assert( RetValLR && "ERR:No LR for non-void return value");
482 unsigned RegClassID = (RetValLR->getRegClass())->getID();
483 bool recvCorrectColor = false;
485 unsigned CorrectCol; // correct color for ret value
486 if(RegClassID == IntRegClassID)
487 CorrectCol = SparcIntRegOrder::o0;
488 else if(RegClassID == FloatRegClassID)
489 CorrectCol = SparcFloatRegOrder::f0;
491 assert( 0 && "Unknown RegClass");
494 // if the LR received the correct color, NOTHING to do
496 if( RetValLR->hasColor() )
497 if( RetValLR->getColor() == CorrectCol )
498 recvCorrectColor = true;
501 // if we didn't receive the correct color for some reason,
502 // put copy instruction
504 if( !recvCorrectColor ) {
506 if( RetValLR->hasColor() ) {
508 unsigned RegType = getRegType( RetValLR );
511 UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
513 // the reg that LR must be colored with
514 unsigned UniRetReg = getUnifiedRegNum( RegClassID, CorrectCol);
516 // the return value is coming in UniRetReg but has to go into
519 AdMI = cpReg2RegMI( UniRetReg, UniRetLRReg, RegType );
520 CallAI->InstrnsAfter.push_back( AdMI );
526 assert(0 && "LR of return value is splilled");
530 } // the LR didn't receive the suggested color
532 } // if there a return value
535 // Now color all args of the call instruction
537 unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
539 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
541 const Value *CallArg = CallMI->getImplicitRef(i);
543 // get the LR of call operand (parameter)
544 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
546 unsigned RegType = getRegType( CallArg );
547 unsigned RegClassID = getRegClassIDOfValue( CallArg);
549 // find whether this argument is coming in a register (if not, on stack)
551 bool isArgInReg = false;
552 unsigned UniArgReg = InvalidRegNum; // reg that LR must be colored with
554 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
556 UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo );
558 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
560 UniArgReg = getUnifiedRegNum(RegClassID,
561 SparcFloatRegOrder::f0 + (argNo*2 + 1) );
563 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
565 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
569 // not possible to have a null LR since all args (even consts)
570 // must be defined before
573 cerr << " ERROR: In call instr, no LR for arg: " ;
574 printValue(CallArg); cerr << endl;
576 assert(0 && "NO LR for call arg");
581 // if the LR received the suggested color, NOTHING to do
584 if( LR->hasColor() ) {
587 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
589 // if LR received the correct color, nothing to do
590 if( UniLRReg == UniArgReg )
593 // We are here because though the LR is allocated a register, it
594 // was not allocated the suggested register. So, we have to copy %ix reg
595 // (or stack pos of arg) to the register it was colored with
597 // the LR is colored with UniLRReg but has to go into UniArgReg
598 // to pass it as an argument
601 AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
604 assert(0 && "TODO: Push an outgoing arg on stack");
606 // Now add the instruction
607 CallAI->InstrnsBefore.push_back( AdMI );
611 else { // LR is not colored (i.e., spilled)
613 assert(0 && "TODO: Copy a spilled call arg to an output reg ");
617 } // for each parameter in call instruction
621 //---------------------------------------------------------------------------
622 // This method is called for an LLVM return instruction to identify which
623 // values will be returned from this method and to suggest colors.
624 //---------------------------------------------------------------------------
625 void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI,
626 LiveRangeInfo& LRI) const {
628 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
630 suggestReg4RetAddr(RetMI, LRI);
632 // if there is an implicit ref, that has to be the ret value
633 if( RetMI->getNumImplicitRefs() > 0 ) {
635 // The first implicit operand is the return value of a return instr
636 const Value *RetVal = RetMI->getImplicitRef(0);
639 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
642 cerr << "\nNo LR for:";
643 printValue( RetVal );
645 assert( LR && "No LR for return value of non-void method");
649 unsigned RegClassID = (LR->getRegClass())->getID();
651 if( RegClassID == IntRegClassID )
652 LR->setSuggestedColor(SparcIntRegOrder::i0);
654 else if ( RegClassID == FloatRegClassID )
655 LR->setSuggestedColor(SparcFloatRegOrder::f0);
661 //---------------------------------------------------------------------------
663 //---------------------------------------------------------------------------
664 void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI,
666 AddedInstrns *const RetAI) const {
668 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
670 // if there is an implicit ref, that has to be the ret value
671 if( RetMI->getNumImplicitRefs() > 0 ) {
673 // The first implicit operand is the return value of a return instr
674 const Value *RetVal = RetMI->getImplicitRef(0);
677 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
680 cerr << "\nNo LR for:";
681 printValue( RetVal );
683 // assert( LR && "No LR for return value of non-void method");
687 unsigned RegClassID = getRegClassIDOfValue(RetVal);
688 unsigned RegType = getRegType( RetVal );
692 if(RegClassID == IntRegClassID)
693 CorrectCol = SparcIntRegOrder::i0;
694 else if(RegClassID == FloatRegClassID)
695 CorrectCol = SparcFloatRegOrder::f0;
697 assert( 0 && "Unknown RegClass");
700 // if the LR received the correct color, NOTHING to do
703 if( LR->getColor() == CorrectCol )
706 unsigned UniRetReg = getUnifiedRegNum( RegClassID, CorrectCol );
708 if( LR->hasColor() ) {
710 // We are here because the LR was allocted a regiter
711 // It may be the suggested register or not
713 // copy the LR of retun value to i0 or f0
715 unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor());
717 // the LR received UniLRReg but must be colored with UniRetReg
718 // to pass as the return value
720 AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType);
721 RetAI->InstrnsBefore.push_back( AdMI );
724 assert(0 && "TODO: Copy the return value from stack\n");
726 } // if there is a return value
731 //---------------------------------------------------------------------------
732 // Copy from a register to register. Register number must be the unified
734 //---------------------------------------------------------------------------
737 MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
738 const unsigned DestReg,
739 const int RegType) const {
741 assert( ((int)SrcReg != InvalidRegNum) && ((int)DestReg != InvalidRegNum) &&
744 MachineInstr * MI = NULL;
751 MI = new MachineInstr(ADD, 3);
752 MI->SetMachineOperand(0, SrcReg, false);
753 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
754 MI->SetMachineOperand(2, DestReg, true);
757 case FPSingleRegType:
758 MI = new MachineInstr(FMOVS, 2);
759 MI->SetMachineOperand(0, SrcReg, false);
760 MI->SetMachineOperand(1, DestReg, true);
763 case FPDoubleRegType:
764 MI = new MachineInstr(FMOVD, 2);
765 MI->SetMachineOperand(0, SrcReg, false);
766 MI->SetMachineOperand(1, DestReg, true);
770 assert(0 && "Unknow RegType");
777 //---------------------------------------------------------------------------
778 // Copy from a register to memory (i.e., Store). Register number must
779 // be the unified register number
780 //---------------------------------------------------------------------------
783 MachineInstr * UltraSparcRegInfo::cpReg2MemMI(const unsigned SrcReg,
784 const unsigned DestPtrReg,
786 const int RegType) const {
789 MachineInstr * MI = NULL;
796 MI = new MachineInstr(STX, 3);
797 MI->SetMachineOperand(0, SrcReg, false);
798 MI->SetMachineOperand(1, DestPtrReg, false);
799 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
800 (int64_t) Offset, false);
803 case FPSingleRegType:
804 MI = new MachineInstr(ST, 3);
805 MI->SetMachineOperand(0, SrcReg, false);
806 MI->SetMachineOperand(1, DestPtrReg, false);
807 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
808 (int64_t) Offset, false);
811 case FPDoubleRegType:
812 MI = new MachineInstr(STD, 3);
813 MI->SetMachineOperand(0, SrcReg, false);
814 MI->SetMachineOperand(1, DestPtrReg, false);
815 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
816 (int64_t) Offset, false);
820 assert(0 && "Unknow RegType");
827 //---------------------------------------------------------------------------
828 // Copy from memory to a reg (i.e., Load) Register number must be the unified
830 //---------------------------------------------------------------------------
833 MachineInstr * UltraSparcRegInfo::cpMem2RegMI(const unsigned SrcPtrReg,
835 const unsigned DestReg,
836 const int RegType) const {
838 MachineInstr * MI = NULL;
845 MI = new MachineInstr(LDX, 3);
846 MI->SetMachineOperand(0, SrcPtrReg, false);
847 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
848 (int64_t) Offset, false);
849 MI->SetMachineOperand(2, DestReg, false);
852 case FPSingleRegType:
853 MI = new MachineInstr(LD, 3);
854 MI->SetMachineOperand(0, SrcPtrReg, false);
855 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
856 (int64_t) Offset, false);
857 MI->SetMachineOperand(2, DestReg, false);
861 case FPDoubleRegType:
862 MI = new MachineInstr(LDD, 3);
863 MI->SetMachineOperand(0, SrcPtrReg, false);
864 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
865 (int64_t) Offset, false);
866 MI->SetMachineOperand(2, DestReg, false);
870 assert(0 && "Unknow RegType");
884 //---------------------------------------------------------------------------
885 // Only constant/label values are accepted.
886 // ***This code is temporary ***
887 //---------------------------------------------------------------------------
890 MachineInstr * UltraSparcRegInfo::cpValue2RegMI(Value * Val,
891 const unsigned DestReg,
892 const int RegType) const {
894 assert( ((int)DestReg != InvalidRegNum) && "Invalid Register");
900 MachineOperand::MachineOperandType MOTypeInt =
901 ChooseRegOrImmed(Val, ADD, *UltraSparcInfo, true, MReg, Imm);
904 MachineOperand::MachineOperandType MOType;
906 switch( Val->getValueType() ) {
908 case Value::ConstantVal:
909 case Value::GlobalVariableVal:
910 MOType = MachineOperand:: MO_UnextendedImmed; // TODO**** correct???
913 case Value::BasicBlockVal:
914 case Value::MethodVal:
915 MOType = MachineOperand::MO_PCRelativeDisp;
919 cerr << "Value Type: " << Val->getValueType() << endl;
920 assert(0 && "Unknown val type - Only constants/globals/labels are valid");
925 MachineInstr * MI = NULL;
930 MI = new MachineInstr(ADD);
931 MI->SetMachineOperand(0, MOType, Val, false);
932 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
933 MI->SetMachineOperand(2, DestReg, true);
936 case FPSingleRegType:
937 assert(0 && "FP const move not yet implemented");
938 MI = new MachineInstr(FMOVS);
939 MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
940 MI->SetMachineOperand(1, DestReg, true);
943 case FPDoubleRegType:
944 assert(0 && "FP const move not yet implemented");
945 MI = new MachineInstr(FMOVD);
946 MI->SetMachineOperand(0, MachineOperand::MO_SignExtendedImmed, Val, false);
947 MI->SetMachineOperand(1, DestReg, true);
951 assert(0 && "Unknow RegType");
963 //---------------------------------------------------------------------------
964 // Print the register assigned to a LR
965 //---------------------------------------------------------------------------
967 void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
969 unsigned RegClassID = (LR->getRegClass())->getID();
971 cerr << " *Node " << (LR->getUserIGNode())->getIndex();
973 if( ! LR->hasColor() ) {
974 cerr << " - could not find a color" << endl;
978 // if a color is found
980 cerr << " colored with color "<< LR->getColor();
982 if( RegClassID == IntRegClassID ) {
984 cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
987 else if ( RegClassID == FloatRegClassID) {
988 cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
989 if( LR->getTypeID() == Type::DoubleTyID )
990 cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);