1 #include "llvm/Target/Sparc.h"
2 #include "SparcInternals.h"
3 #include "llvm/Method.h"
4 #include "llvm/iTerminators.h"
5 #include "llvm/iOther.h"
6 #include "llvm/CodeGen/InstrScheduling.h"
7 #include "llvm/CodeGen/InstrSelection.h"
9 #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
10 #include "llvm/CodeGen/PhyRegAlloc.h"
15 //---------------------------------------------------------------------------
17 //---------------------------------------------------------------------------
19 //---------------------------------------------------------------------------
20 // Finds the return value of a call instruction
21 //---------------------------------------------------------------------------
24 UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
26 unsigned OpCode = CallMI->getOpCode();
27 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
29 if( OpCode == CALL ) {
31 // The one before the last implicit operand is the return value of
33 if( NumOfImpRefs > 1 )
34 if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
35 return CallMI->getImplicitRef(NumOfImpRefs-2);
38 else if( OpCode == JMPLCALL) {
40 // The last implicit operand is the return value of a JMPL in
41 if( NumOfImpRefs > 0 )
42 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
43 return CallMI->getImplicitRef(NumOfImpRefs-1);
46 assert(0 && "OpCode must be CALL/JMPL for a call instr");
52 //---------------------------------------------------------------------------
53 // Finds the return address of a call instruction
54 //---------------------------------------------------------------------------
57 UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
59 unsigned OpCode = CallMI->getOpCode();
63 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
65 assert( NumOfImpRefs && "CALL instr must have at least on ImpRef");
66 // The last implicit operand is the return address of a CALL instr
67 return CallMI->getImplicitRef(NumOfImpRefs-1);
70 else if( OpCode == JMPLCALL ) {
72 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
73 return MO.getVRegValue();
77 assert(0 && "OpCode must be CALL/JMPL for a call instr");
79 assert(0 && "There must be a return addr for a call instr");
86 //---------------------------------------------------------------------------
87 // Finds the # of actual arguments of the call instruction
88 //---------------------------------------------------------------------------
91 UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
93 unsigned OpCode = CallMI->getOpCode();
94 unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
97 if( OpCode == CALL ) {
99 switch( NumOfImpRefs ) {
101 case 0: assert(0 && "A CALL inst must have at least one ImpRef (RetAddr)");
106 default: // two or more implicit refs
107 if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
108 NumArgs = NumOfImpRefs - 2; // i.e., NumOfImpRef-2 is the ret val
110 NumArgs = NumOfImpRefs - 1;
114 else if( OpCode == JMPLCALL ) {
116 // The last implicit operand is the return value of a JMPL instr
117 if( NumOfImpRefs > 0 ) {
118 if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
119 NumArgs = NumOfImpRefs - 1; // i.e., NumOfImpRef-1 is the ret val
121 NumArgs = NumOfImpRefs;
124 NumArgs = NumOfImpRefs;
127 assert(0 && "OpCode must be CALL/JMPL for a call instr");
129 assert( (NumArgs != -1) && "Internal error in getCallInstNumArgs" );
130 return (unsigned) NumArgs;
136 //---------------------------------------------------------------------------
137 // Suggests a register for the ret address in the RET machine instruction
138 //---------------------------------------------------------------------------
140 void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
141 LiveRangeInfo& LRI) const {
143 assert( (RetMI->getNumOperands() >= 2)
144 && "JMPL/RETURN must have 3 and 2 operands respectively");
146 MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0);
148 MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
151 // Instead of setting the color, we can suggest one. In that case,
152 // we have to test later whether it received the suggested color.
153 // In that case, a LR has to be created at the start of method.
154 // It has to be done as follows (remove the setRegVal above):
157 const Value *RetAddrVal = MO.getVRegValue();
159 assert( RetAddrVal && "LR for ret address must be created at start");
161 LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
162 RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
163 SparcIntRegOrdr::i7) );
170 //---------------------------------------------------------------------------
171 // Suggests a register for the ret address in the JMPL/CALL machine instr
172 //---------------------------------------------------------------------------
173 void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
175 vector<RegClass *> RCList) const {
178 const Value *RetAddrVal = getCallInstRetAddr( CallMI );
180 // RetAddrVal cannot be NULL (asserted in getCallInstRetAddr)
181 // create a new LR for the return address and color it
183 LiveRange * RetAddrLR = new LiveRange();
184 RetAddrLR->add( RetAddrVal );
185 unsigned RegClassID = getRegClassIDOfValue( RetAddrVal );
186 RetAddrLR->setRegClass( RCList[RegClassID] );
187 RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o7));
188 LRI.addLRToMap( RetAddrVal, RetAddrLR);
192 assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
194 // directly set color since the LR of ret address (if there were one)
195 // will not extend after the call instr
197 MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
198 MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
207 //---------------------------------------------------------------------------
208 // This method will suggest colors to incoming args to a method.
209 // If the arg is passed on stack due to the lack of regs, NOTHING will be
210 // done - it will be colored (or spilled) as a normal value.
211 //---------------------------------------------------------------------------
213 void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
214 LiveRangeInfo& LRI) const
217 // get the argument list
218 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
219 // get an iterator to arg list
220 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
223 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
226 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
227 assert( LR && "No live range found for method arg");
229 unsigned RegType = getRegType( LR );
232 // if the arg is in int class - allocate a reg for an int arg
233 if( RegType == IntRegType ) {
235 if( argNo < NumOfIntArgRegs) {
236 LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
241 // Do NOTHING as this will be colored as a normal value.
242 if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
246 else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs)
247 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
250 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
251 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
258 //---------------------------------------------------------------------------
260 //---------------------------------------------------------------------------
262 void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
264 AddedInstrns *const FirstAI) const {
266 // get the argument list
267 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
268 // get an iterator to arg list
269 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
275 for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
278 LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
279 assert( LR && "No live range found for method arg");
282 unsigned RegType = getRegType( LR );
283 unsigned RegClassID = (LR->getRegClass())->getID();
286 // find whether this argument is coming in a register (if not, on stack)
288 bool isArgInReg = false;
289 unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
291 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
293 UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 + argNo );
295 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
297 UniArgReg = getUnifiedRegNum( RegClassID,
298 SparcFloatRegOrder::f0 + argNo*2 + 1 ) ;
300 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
302 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
306 if( LR->hasColor() ) {
308 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
310 // if LR received the correct color, nothing to do
311 if( UniLRReg == UniArgReg )
314 // We are here because the LR did not have a suggested
315 // color or did not receive the suggested color but LR got a register.
316 // Now we have to copy %ix reg (or stack pos of arg)
317 // to the register it was colored with.
319 // if the arg is coming in UniArgReg register MUST go into
320 // the UniLRReg register
322 AdMI = cpReg2RegMI( UniArgReg, UniLRReg, RegType );
326 // Now the arg is coming on stack. Since the LR recieved a register,
327 // we just have to load the arg on stack into that register
328 int ArgStakOffFromFP =
329 UltraSparcFrameInfo::FirstIncomingArgOffsetFromFP +
330 argNo * SizeOfOperandOnStack;
332 AdMI = cpMem2RegMI(getFramePointer(), ArgStakOffFromFP,
336 FirstAI->InstrnsBefore.push_back( AdMI );
338 } // if LR received a color
342 // Now, the LR did not receive a color. But it has a stack offset for
345 // So, if the arg is coming in UniArgReg register, we can just move
346 // that on to the stack pos of LR
351 MachineInstr *AdIBef =
352 cpReg2MemMI(UniArgReg, getFramePointer(),
353 LR->getSpillOffFromFP(), RegType );
355 FirstAI->InstrnsBefore.push_back( AdMI );
360 // Now the arg is coming on stack. Since the LR did NOT
361 // recieved a register as well, it is allocated a stack position. We
362 // can simply change the stack poistion of the LR. We can do this,
363 // since this method is called before any other method that makes
364 // uses of the stack pos of the LR (e.g., updateMachineInstr)
366 int ArgStakOffFromFP =
367 UltraSparcFrameInfo::FirstIncomingArgOffsetFromFP +
368 argNo * SizeOfOperandOnStack;
370 LR->modifySpillOffFromFP( ArgStakOffFromFP );
375 } // for each incoming argument
382 //---------------------------------------------------------------------------
383 // This method is called before graph coloring to suggest colors to the
384 // outgoing call args and the return value of the call.
385 //---------------------------------------------------------------------------
386 void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
388 vector<RegClass *> RCList) const {
390 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
392 suggestReg4CallAddr(CallMI, LRI, RCList);
395 // First color the return value of the call instruction. The return value
396 // will be in %o0 if the value is an integer type, or in %f0 if the
397 // value is a float type.
399 // the return value cannot have a LR in machine instruction since it is
400 // only defined by the call instruction
402 // if type is not void, create a new live range and set its
403 // register class and add to LRI
406 const Value *RetVal = getCallInstRetVal( CallMI );
411 assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
412 "LR for ret Value of call already definded!");
415 // create a new LR for the return value
417 LiveRange * RetValLR = new LiveRange();
418 RetValLR->add( RetVal );
419 unsigned RegClassID = getRegClassIDOfValue( RetVal );
420 RetValLR->setRegClass( RCList[RegClassID] );
421 LRI.addLRToMap( RetVal, RetValLR);
423 // now suggest a register depending on the register class of ret arg
425 if( RegClassID == IntRegClassID )
426 RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
427 else if (RegClassID == FloatRegClassID )
428 RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
429 else assert( 0 && "Unknown reg class for return value of call\n");
434 // Now suggest colors for arguments (operands) of the call instruction.
435 // Colors are suggested only if the arg number is smaller than the
436 // the number of registers allocated for argument passing.
437 // Now, go thru call args - implicit operands of the call MI
439 unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
441 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
443 const Value *CallArg = CallMI->getImplicitRef(i);
445 // get the LR of call operand (parameter)
446 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
448 // not possible to have a null LR since all args (even consts)
449 // must be defined before
452 cerr << " ERROR: In call instr, no LR for arg: " ;
453 printValue(CallArg); cerr << endl;
455 assert(0 && "NO LR for call arg");
459 unsigned RegType = getRegType( LR );
461 // if the arg is in int class - allocate a reg for an int arg
462 if( RegType == IntRegType ) {
464 if( argNo < NumOfIntArgRegs)
465 LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo );
468 // Do NOTHING as this will be colored as a normal value.
469 cerr << " Regr not suggested for int call arg" << endl;
472 else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
473 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
476 else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
477 LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
480 } // for all call arguments
485 //---------------------------------------------------------------------------
486 // After graph coloring, we have call this method to see whehter the return
487 // value and the call args received the correct colors. If not, we have
488 // to instert copy instructions.
489 //---------------------------------------------------------------------------
491 void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
493 AddedInstrns *const CallAI,
494 PhyRegAlloc &PRA) const {
496 assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
498 // First color the return value of the call.
499 // If there is a LR for the return value, it means this
500 // method returns a value
504 const Value *RetVal = getCallInstRetVal( CallMI );
508 LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
511 cerr << "\nNo LR for:";
512 printValue( RetVal );
514 assert( RetValLR && "ERR:No LR for non-void return value");
518 unsigned RegClassID = (RetValLR->getRegClass())->getID();
519 bool recvCorrectColor = false;
521 unsigned CorrectCol; // correct color for ret value
522 if(RegClassID == IntRegClassID)
523 CorrectCol = SparcIntRegOrder::o0;
524 else if(RegClassID == FloatRegClassID)
525 CorrectCol = SparcFloatRegOrder::f0;
527 assert( 0 && "Unknown RegClass");
531 // if the LR received the correct color, NOTHING to do
533 if( RetValLR->hasColor() )
534 if( RetValLR->getColor() == CorrectCol )
535 recvCorrectColor = true;
538 // if we didn't receive the correct color for some reason,
539 // put copy instruction
541 if( !recvCorrectColor ) {
543 unsigned RegType = getRegType( RetValLR );
545 // the reg that LR must be colored with
546 unsigned UniRetReg = getUnifiedRegNum( RegClassID, CorrectCol);
548 if( RetValLR->hasColor() ) {
551 UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
553 // the return value is coming in UniRetReg but has to go into
556 AdMI = cpReg2RegMI( UniRetReg, UniRetLRReg, RegType );
561 // if the LR did NOT receive a color, we have to move the return
562 // value coming in UniRetReg to the stack pos of spilled LR
564 AdMI = cpReg2MemMI(UniRetReg, getFramePointer(),
565 RetValLR->getSpillOffFromFP(), RegType );
568 CallAI->InstrnsAfter.push_back( AdMI );
570 } // the LR didn't receive the suggested color
572 } // if there a return value
575 // Now color all args of the call instruction
577 unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
579 for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
581 const Value *CallArg = CallMI->getImplicitRef(i);
583 // get the LR of call operand (parameter)
584 LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
586 unsigned RegType = getRegType( CallArg );
587 unsigned RegClassID = getRegClassIDOfValue( CallArg);
589 // find whether this argument is coming in a register (if not, on stack)
591 bool isArgInReg = false;
592 unsigned UniArgReg = InvalidRegNum; // reg that LR must be colored with
594 if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
596 UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo );
598 else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
600 UniArgReg = getUnifiedRegNum(RegClassID,
601 SparcFloatRegOrder::f0 + (argNo*2 + 1) );
603 else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
605 UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
609 // not possible to have a null LR since all args (even consts)
610 // must be defined before
613 cerr << " ERROR: In call instr, no LR for arg: " ;
614 printValue(CallArg); cerr << endl;
616 assert(0 && "NO LR for call arg");
621 // if the LR received the suggested color, NOTHING to do
624 if( LR->hasColor() ) {
627 unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
629 // if LR received the correct color, nothing to do
630 if( UniLRReg == UniArgReg )
633 // We are here because though the LR is allocated a register, it
634 // was not allocated the suggested register. So, we have to copy %ix reg
635 // (or stack pos of arg) to the register it was colored with
637 // the LR is colored with UniLRReg but has to go into UniArgReg
638 // to pass it as an argument
641 AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
644 // Now, we have to pass the arg on stack. Since LR received a register
645 // we just have to move that register to the stack position where
646 // the argument must be passed
648 int ArgStakOffFromSP =
649 UltraSparcFrameInfo::FirstOutgoingArgOffsetFromSP +
650 argNo * SizeOfOperandOnStack;
652 AdMI = cpReg2MemMI(UniLRReg, getStackPointer(), ArgStakOffFromSP,
656 CallAI->InstrnsBefore.push_back( AdMI ); // Now add the instruction
659 else { // LR is not colored (i.e., spilled)
663 // Now the LR did NOT recieve a register but has a stack poistion.
664 // Since, the outgoing arg goes in a register we just have to insert
665 // a load instruction to load the LR to outgoing register
668 AdMI = cpMem2RegMI(getStackPointer(), LR->getSpillOffFromFP(),
669 UniArgReg, RegType );
671 CallAI->InstrnsBefore.push_back( AdMI ); // Now add the instruction
675 // Now, we have to pass the arg on stack. Since LR also did NOT
676 // receive a register we have to move an argument in memory to
677 // outgoing parameter on stack.
679 // Optoimize: Optimize when reverse pointers in MahineInstr are
681 // call PRA.getUnusedRegAtMI(....) to get an unused reg. Only if this
682 // fails, then use the following code. Currently, we cannot call the
683 // above method since we cannot find LVSetBefore without the BB
685 int TReg = PRA.getRegNotUsedByThisInst( LR->getRegClass(), CallMI );
686 int TmpOff = PRA.getStackOffsets().getNewTmpPosOffFromFP();
687 int ArgStakOffFromSP =
688 UltraSparcFrameInfo::FirstOutgoingArgOffsetFromSP +
689 argNo * SizeOfOperandOnStack;
691 MachineInstr *Ad1, *Ad2, *Ad3, *Ad4;
694 // (1) Save TReg on stack
695 // (2) Load LR value into TReg from stack pos of LR
696 // (3) Store Treg on outgoing Arg pos on stack
697 // (4) Load the old value of TReg from stack to TReg (restore it)
699 Ad1 = cpReg2MemMI(TReg, getFramePointer(), TmpOff, RegType );
700 Ad2 = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
702 Ad3 = cpReg2MemMI(TReg, getStackPointer(), ArgStakOffFromSP, RegType );
703 Ad4 = cpMem2RegMI(getFramePointer(), TmpOff, TReg, RegType );
705 CallAI->InstrnsBefore.push_back( Ad1 );
706 CallAI->InstrnsBefore.push_back( Ad2 );
707 CallAI->InstrnsBefore.push_back( Ad3 );
708 CallAI->InstrnsBefore.push_back( Ad4 );
713 } // for each parameter in call instruction
717 //---------------------------------------------------------------------------
718 // This method is called for an LLVM return instruction to identify which
719 // values will be returned from this method and to suggest colors.
720 //---------------------------------------------------------------------------
721 void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI,
722 LiveRangeInfo& LRI) const {
724 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
726 suggestReg4RetAddr(RetMI, LRI);
728 // if there is an implicit ref, that has to be the ret value
729 if( RetMI->getNumImplicitRefs() > 0 ) {
731 // The first implicit operand is the return value of a return instr
732 const Value *RetVal = RetMI->getImplicitRef(0);
735 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
738 cerr << "\nNo LR for:";
739 printValue( RetVal );
741 assert( LR && "No LR for return value of non-void method");
745 unsigned RegClassID = (LR->getRegClass())->getID();
747 if( RegClassID == IntRegClassID )
748 LR->setSuggestedColor(SparcIntRegOrder::i0);
750 else if ( RegClassID == FloatRegClassID )
751 LR->setSuggestedColor(SparcFloatRegOrder::f0);
759 //---------------------------------------------------------------------------
760 // Colors the return value of a method to %i0 or %f0, if possible. If it is
761 // not possilbe to directly color the LR, insert a copy instruction to move
762 // the LR to %i0 or %f0. When the LR is spilled, instead of the copy, we
763 // have to put a load instruction.
764 //---------------------------------------------------------------------------
765 void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI,
767 AddedInstrns *const RetAI) const {
769 assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
771 // if there is an implicit ref, that has to be the ret value
772 if( RetMI->getNumImplicitRefs() > 0 ) {
774 // The first implicit operand is the return value of a return instr
775 const Value *RetVal = RetMI->getImplicitRef(0);
778 LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
781 cerr << "\nNo LR for:";
782 printValue( RetVal );
784 // assert( LR && "No LR for return value of non-void method");
788 unsigned RegClassID = getRegClassIDOfValue(RetVal);
789 unsigned RegType = getRegType( RetVal );
792 if(RegClassID == IntRegClassID)
793 CorrectCol = SparcIntRegOrder::i0;
794 else if(RegClassID == FloatRegClassID)
795 CorrectCol = SparcFloatRegOrder::f0;
797 assert( 0 && "Unknown RegClass");
801 // if the LR received the correct color, NOTHING to do
804 if( LR->getColor() == CorrectCol )
807 unsigned UniRetReg = getUnifiedRegNum( RegClassID, CorrectCol );
809 if( LR->hasColor() ) {
811 // We are here because the LR was allocted a regiter
812 // It may be the suggested register or not
814 // copy the LR of retun value to i0 or f0
816 unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor());
818 // the LR received UniLRReg but must be colored with UniRetReg
819 // to pass as the return value
821 AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType);
822 RetAI->InstrnsBefore.push_back( AdMI );
824 else { // if the LR is spilled
826 AdMI = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
828 RetAI->InstrnsBefore.push_back( AdMI );
829 cout << "\nCopied the return value from stack";
832 } // if there is a return value
837 //---------------------------------------------------------------------------
838 // Copy from a register to register. Register number must be the unified
840 //---------------------------------------------------------------------------
843 MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
844 const unsigned DestReg,
845 const int RegType) const {
847 assert( ((int)SrcReg != InvalidRegNum) && ((int)DestReg != InvalidRegNum) &&
850 MachineInstr * MI = NULL;
857 MI = new MachineInstr(ADD, 3);
858 MI->SetMachineOperand(0, SrcReg, false);
859 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
860 MI->SetMachineOperand(2, DestReg, true);
863 case FPSingleRegType:
864 MI = new MachineInstr(FMOVS, 2);
865 MI->SetMachineOperand(0, SrcReg, false);
866 MI->SetMachineOperand(1, DestReg, true);
869 case FPDoubleRegType:
870 MI = new MachineInstr(FMOVD, 2);
871 MI->SetMachineOperand(0, SrcReg, false);
872 MI->SetMachineOperand(1, DestReg, true);
876 assert(0 && "Unknow RegType");
883 //---------------------------------------------------------------------------
884 // Copy from a register to memory (i.e., Store). Register number must
885 // be the unified register number
886 //---------------------------------------------------------------------------
889 MachineInstr * UltraSparcRegInfo::cpReg2MemMI(const unsigned SrcReg,
890 const unsigned DestPtrReg,
892 const int RegType) const {
895 MachineInstr * MI = NULL;
901 MI = new MachineInstr(STX, 3);
902 MI->SetMachineOperand(0, SrcReg, false);
903 MI->SetMachineOperand(1, DestPtrReg, false);
904 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
905 (int64_t) Offset, false);
908 case FPSingleRegType:
909 MI = new MachineInstr(ST, 3);
910 MI->SetMachineOperand(0, SrcReg, false);
911 MI->SetMachineOperand(1, DestPtrReg, false);
912 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
913 (int64_t) Offset, false);
916 case FPDoubleRegType:
917 MI = new MachineInstr(STD, 3);
918 MI->SetMachineOperand(0, SrcReg, false);
919 MI->SetMachineOperand(1, DestPtrReg, false);
920 MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
921 (int64_t) Offset, false);
925 assert( 0 && "Cannot directly store %ccr to memory");
928 assert(0 && "Unknow RegType in cpReg2MemMI");
935 //---------------------------------------------------------------------------
936 // Copy from memory to a reg (i.e., Load) Register number must be the unified
938 //---------------------------------------------------------------------------
941 MachineInstr * UltraSparcRegInfo::cpMem2RegMI(const unsigned SrcPtrReg,
943 const unsigned DestReg,
944 const int RegType) const {
946 MachineInstr * MI = NULL;
952 MI = new MachineInstr(LDX, 3);
953 MI->SetMachineOperand(0, SrcPtrReg, false);
954 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
955 (int64_t) Offset, false);
956 MI->SetMachineOperand(2, DestReg, false);
959 case FPSingleRegType:
960 MI = new MachineInstr(LD, 3);
961 MI->SetMachineOperand(0, SrcPtrReg, false);
962 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
963 (int64_t) Offset, false);
964 MI->SetMachineOperand(2, DestReg, false);
968 case FPDoubleRegType:
969 MI = new MachineInstr(LDD, 3);
970 MI->SetMachineOperand(0, SrcPtrReg, false);
971 MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
972 (int64_t) Offset, false);
973 MI->SetMachineOperand(2, DestReg, false);
977 assert( 0 && "Cannot directly load into %ccr from memory");
980 assert(0 && "Unknow RegType in cpMem2RegMI");
989 // Following method is Not needed now
991 MachineInstr* UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const {
993 MachineInstr * MI = NULL;
995 MI = new MachineInstr(ADD, 3);
996 MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false);
997 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
998 MI->SetMachineOperand(2, MachineOperand:: MO_VirtualRegister, Dest, true);
1007 //----------------------------------------------------------------------------
1008 // This method inserts caller saving/restoring instructons before/after
1009 // a call machine instruction.
1010 //----------------------------------------------------------------------------
1013 void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
1014 const BasicBlock *BB,
1015 PhyRegAlloc &PRA) const {
1016 // assert( (getInstrInfo()).isCall( MInst->getOpCode() ) );
1019 PRA.StackOffsets.resetTmpPos();
1021 hash_set<unsigned> PushedRegSet;
1023 // Now find the LR of the return value of the call
1024 // The last *implicit operand* is the return value of a call
1025 // Insert it to to he PushedRegSet since we must not save that register
1026 // and restore it after the call.
1027 // We do this because, we look at the LV set *after* the instruction
1028 // to determine, which LRs must be saved across calls. The return value
1029 // of the call is live in this set - but we must not save/restore it.
1032 const Value *RetVal = getCallInstRetVal( MInst );
1036 LiveRange *RetValLR = PRA.LRI.getLiveRangeForValue( RetVal );
1037 assert( RetValLR && "No LR for RetValue of call");
1039 PushedRegSet.insert(
1040 getUnifiedRegNum((RetValLR->getRegClass())->getID(),
1041 RetValLR->getColor() ) );
1045 const LiveVarSet *LVSetAft = PRA.LVI->getLiveVarSetAfterMInst(MInst, BB);
1047 LiveVarSet::const_iterator LIt = LVSetAft->begin();
1049 // for each live var in live variable set after machine inst
1050 for( ; LIt != LVSetAft->end(); ++LIt) {
1052 // get the live range corresponding to live var
1053 LiveRange *const LR = PRA.LRI.getLiveRangeForValue(*LIt );
1055 // LR can be null if it is a const since a const
1056 // doesn't have a dominating def - see Assumptions above
1059 if( LR->hasColor() ) {
1061 unsigned RCID = (LR->getRegClass())->getID();
1062 unsigned Color = LR->getColor();
1064 if ( isRegVolatile(RCID, Color) ) {
1066 // if the value is in both LV sets (i.e., live before and after
1067 // the call machine instruction)
1069 unsigned Reg = getUnifiedRegNum(RCID, Color);
1071 if( PushedRegSet.find(Reg) == PushedRegSet.end() ) {
1073 // if we haven't already pushed that register
1075 unsigned RegType = getRegType( LR );
1077 // Now get two instructions - to push on stack and pop from stack
1078 // and add them to InstrnsBefore and InstrnsAfter of the
1081 int StackOff = PRA.StackOffsets. getNewTmpPosOffFromFP();
1084 MachineInstr *AdIBefCC, *AdIAftCC, *AdICpCC;
1085 MachineInstr *AdIBef, *AdIAft;
1088 //---- Insert code for pushing the reg on stack ----------
1090 if( RegType == IntCCRegType ) {
1092 // Handle IntCCRegType specially since we cannot directly
1093 // push %ccr on to the stack
1095 const LiveVarSet *LVSetBef =
1096 PRA.LVI->getLiveVarSetBeforeMInst(MInst, BB);
1098 // get a free INTEGER register
1100 PRA.getUsableRegAtMI(LR->getRegClass(), IntRegType, MInst,
1101 LVSetBef, AdIBefCC, AdIAftCC);
1103 // insert the instructions in reverse order since we are
1104 // adding them to the front of InstrnsBefore
1107 (PRA.AddedInstrMap[MInst]->InstrnsBefore).push_front(AdIAftCC);
1109 AdICpCC = cpCCR2IntMI(FreeIntReg);
1110 (PRA.AddedInstrMap[MInst]->InstrnsBefore).push_front(AdICpCC);
1113 (PRA.AddedInstrMap[MInst]->InstrnsBefore).push_front(AdIBefCC);
1115 cerr << "\n!! Inserted caller saving (push) inst for %ccr:";
1116 if(AdIBefCC) cerr << "\t" << *(AdIBefCC);
1117 cerr << "\t" << *AdICpCC;
1118 if(AdIAftCC) cerr << "\t" << *(AdIAftCC);
1121 // for any other register type, just add the push inst
1122 AdIBef = cpReg2MemMI(Reg, getStackPointer(), StackOff, RegType );
1123 ((PRA.AddedInstrMap[MInst])->InstrnsBefore).push_front(AdIBef);
1127 //---- Insert code for popping the reg from the stack ----------
1129 if( RegType == IntCCRegType ) {
1131 // Handle IntCCRegType specially since we cannot directly
1132 // pop %ccr on from the stack
1134 // get a free INT register
1136 PRA.getUsableRegAtMI(LR->getRegClass(), IntRegType, MInst,
1137 LVSetAft, AdIBefCC, AdIAftCC);
1140 (PRA.AddedInstrMap[MInst]->InstrnsAfter).push_back(AdIBefCC);
1142 AdICpCC = cpInt2CCRMI(FreeIntReg);
1143 (PRA.AddedInstrMap[MInst]->InstrnsAfter).push_back(AdICpCC);
1146 (PRA.AddedInstrMap[MInst]->InstrnsAfter).push_back(AdIAftCC);
1148 cerr << "\n!! Inserted caller saving (pop) inst for %ccr:";
1149 if(AdIBefCC) cerr << "\t" << *(AdIBefCC);
1150 cerr << "\t" << *AdICpCC;
1151 if(AdIAftCC) cerr << "\t" << *(AdIAftCC);
1154 // for any other register type, just add the pop inst
1155 AdIAft = cpMem2RegMI(getStackPointer(), StackOff, Reg, RegType );
1156 ((PRA.AddedInstrMap[MInst])->InstrnsAfter).push_back(AdIAft);
1159 PushedRegSet.insert( Reg );
1162 cerr << "\nFor call inst:" << *MInst;
1163 cerr << "\n -inserted caller saving instrs:\n\t ";
1164 if( RegType == IntCCRegType )
1165 cerr << *AdIBefCC << "\n\t" << *AdIAftCC ;
1167 cerr << *AdIBef << "\n\t" << *AdIAft ;
1169 } // if not already pushed
1171 } // if LR has a volatile color
1173 } // if LR has color
1175 } // if there is a LR for Var
1177 } // for each value in the LV set after instruction
1181 //---------------------------------------------------------------------------
1182 // Copies %ccr into an integer register. IntReg is the UNIFIED register
1184 //---------------------------------------------------------------------------
1186 MachineInstr * UltraSparcRegInfo::cpCCR2IntMI(const unsigned IntReg) const {
1187 MachineInstr * MI = NULL;
1189 MI = new MachineInstr(RDCCR, 2);
1190 MI->SetMachineOperand(0, SparcIntCCRegOrder::ccr, false);
1191 MI->SetMachineOperand(1, IntReg, true);
1196 //---------------------------------------------------------------------------
1197 // Copies an integer register into %ccr. IntReg is the UNIFIED register
1199 //---------------------------------------------------------------------------
1201 MachineInstr * UltraSparcRegInfo::cpInt2CCRMI(const unsigned IntReg) const {
1202 MachineInstr * MI = NULL;
1204 MI = new MachineInstr(WRCCR, 3);
1205 MI->SetMachineOperand(0, IntReg, false);
1206 MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
1207 MI->SetMachineOperand(2, SparcIntCCRegOrder::ccr, true);
1215 //---------------------------------------------------------------------------
1216 // Print the register assigned to a LR
1217 //---------------------------------------------------------------------------
1219 void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
1221 unsigned RegClassID = (LR->getRegClass())->getID();
1223 cerr << " *Node " << (LR->getUserIGNode())->getIndex();
1225 if( ! LR->hasColor() ) {
1226 cerr << " - could not find a color" << endl;
1230 // if a color is found
1232 cerr << " colored with color "<< LR->getColor();
1234 if( RegClassID == IntRegClassID ) {
1236 cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
1237 cerr << "]" << endl;
1239 else if ( RegClassID == FloatRegClassID) {
1240 cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
1241 if( LR->getTypeID() == Type::DoubleTyID )
1242 cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);
1243 cerr << "]" << endl;