1 //===-- SparcV9TargetMachine.cpp - SparcV9 Target Machine Implementation --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Primary interface to machine description for the UltraSPARC. Primarily just
11 // initializes machine-dependent parameters in class TargetMachine, and creates
12 // machine-dependent subclasses for classes such as TargetInstrInfo.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/Function.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Assembly/PrintModulePass.h"
19 #include "llvm/CodeGen/InstrScheduling.h"
20 #include "llvm/CodeGen/IntrinsicLowering.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetMachineRegistry.h"
25 #include "llvm/Transforms/Scalar.h"
26 #include "MappingInfo.h"
27 #include "MachineFunctionInfo.h"
28 #include "MachineCodeForInstruction.h"
29 #include "SparcV9Internals.h"
30 #include "SparcV9TargetMachine.h"
31 #include "SparcV9BurgISel.h"
32 #include "Support/CommandLine.h"
35 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
36 // Build the MachineInstruction Description Array...
37 const TargetInstrDescriptor llvm::SparcV9MachineInstrDesc[] = {
38 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
39 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
40 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
41 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
42 ImplicitRegUseList, ImplicitRegUseList },
43 #include "SparcV9Instr.def"
46 //---------------------------------------------------------------------------
47 // Command line options to control choice of code generation passes.
48 //---------------------------------------------------------------------------
51 cl::opt<bool> DisableSched("disable-sched",
52 cl::desc("Disable local scheduling pass"));
54 cl::opt<bool> DisablePeephole("disable-peephole",
55 cl::desc("Disable peephole optimization pass"));
57 cl::opt<bool> EmitMappingInfo("enable-maps",
58 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
60 cl::opt<bool> DisableStrip("disable-strip",
61 cl::desc("Do not strip the LLVM bytecode in executable"));
63 // Register the target.
64 RegisterTarget<SparcV9TargetMachine> X("sparcv9", " SPARC V9");
67 unsigned SparcV9TargetMachine::getJITMatchQuality() {
68 #if defined(sparc) || defined(__sparc__) || defined(__sparcv9)
75 unsigned SparcV9TargetMachine::getModuleMatchQuality(const Module &M) {
76 if (M.getEndianness() == Module::BigEndian &&
77 M.getPointerSize() == Module::Pointer64)
78 return 10; // Direct match
79 else if (M.getEndianness() != Module::AnyEndianness ||
80 M.getPointerSize() != Module::AnyPointerSize)
81 return 0; // Match for some other target
83 return getJITMatchQuality()/2;
86 //===---------------------------------------------------------------------===//
87 // Code generation/destruction passes
88 //===---------------------------------------------------------------------===//
91 class ConstructMachineFunction : public FunctionPass {
92 TargetMachine &Target;
94 ConstructMachineFunction(TargetMachine &T) : Target(T) {}
96 const char *getPassName() const {
97 return "ConstructMachineFunction";
100 bool runOnFunction(Function &F) {
101 MachineFunction::construct(&F, Target).getInfo<SparcV9FunctionInfo>()->CalculateArgSize();
106 struct DestroyMachineFunction : public FunctionPass {
107 const char *getPassName() const { return "DestroyMachineFunction"; }
109 static void freeMachineCode(Instruction &I) {
110 MachineCodeForInstruction::destroy(&I);
113 bool runOnFunction(Function &F) {
114 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
115 for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E; ++I)
116 MachineCodeForInstruction::get(I).dropAllReferences();
118 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
119 for_each(FI->begin(), FI->end(), freeMachineCode);
121 MachineFunction::destruct(&F);
126 FunctionPass *createMachineCodeConstructionPass(TargetMachine &Target) {
127 return new ConstructMachineFunction(Target);
131 FunctionPass *llvm::createSparcV9MachineCodeDestructionPass() {
132 return new DestroyMachineFunction();
136 SparcV9TargetMachine::SparcV9TargetMachine(const Module &M,
137 IntrinsicLowering *il)
138 : TargetMachine("UltraSparcV9-Native", il, false),
145 /// addPassesToEmitAssembly - This method controls the entire code generation
146 /// process for the ultra sparc.
149 SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
151 // FIXME: Implement efficient support for garbage collection intrinsics.
152 PM.add(createLowerGCPass());
154 // Replace malloc and free instructions with library calls.
155 PM.add(createLowerAllocationsPass());
157 // FIXME: implement the switch instruction in the instruction selector.
158 PM.add(createLowerSwitchPass());
160 // FIXME: implement the invoke/unwind instructions!
161 PM.add(createLowerInvokePass());
163 // decompose multi-dimensional array references into single-dim refs
164 PM.add(createDecomposeMultiDimRefsPass());
166 // Lower LLVM code to the form expected by the SPARCv9 instruction selector.
167 PM.add(createPreSelectionPass(*this));
168 PM.add(createLowerSelectPass());
170 // Run basic LLVM dataflow optimizations, to clean up after pre-selection.
171 PM.add(createReassociatePass());
172 PM.add(createLICMPass());
173 PM.add(createGCSEPass());
175 // If the user's trying to read the generated code, they'll need to see the
176 // transformed input.
177 if (PrintMachineCode)
178 PM.add(new PrintModulePass());
180 // Construct and initialize the MachineFunction object for this fn.
181 PM.add(createMachineCodeConstructionPass(*this));
183 // Insert empty stackslots in the stack frame of each function
184 // so %fp+offset-8 and %fp+offset-16 are empty slots now!
185 PM.add(createStackSlotsPass(*this));
187 PM.add(createSparcV9BurgInstSelector(*this));
190 PM.add(createInstructionSchedulingWithSSAPass(*this));
192 if (PrintMachineCode)
193 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
195 PM.add(getRegisterAllocator(*this));
197 if (PrintMachineCode)
198 PM.add(createMachineFunctionPrinterPass(&std::cerr, "After reg alloc:\n"));
200 PM.add(createPrologEpilogInsertionPass());
202 if (!DisablePeephole)
203 PM.add(createPeepholeOptsPass(*this));
205 if (PrintMachineCode)
206 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));
208 if (EmitMappingInfo) {
209 PM.add(createInternalGlobalMapperPass());
210 PM.add(getMappingInfoAsmPrinterPass(Out));
213 // Output assembly language to the .s file. Assembly emission is split into
214 // two parts: Function output and Global value output. This is because
215 // function output is pipelined with all of the rest of code generation stuff,
216 // allowing machine code representations for functions to be free'd after the
217 // function has been emitted.
218 PM.add(createAsmPrinterPass(Out, *this));
220 // Free machine-code IR which is no longer needed:
221 PM.add(createSparcV9MachineCodeDestructionPass());
223 // Emit bytecode to the assembly file into its special section next
224 if (EmitMappingInfo) {
225 // Strip all of the symbols from the bytecode so that it will be smaller...
227 PM.add(createSymbolStrippingPass());
228 PM.add(createBytecodeAsmPrinterPass(Out));
234 /// addPassesToJITCompile - This method controls the JIT method of code
235 /// generation for the UltraSparcV9.
237 void SparcV9JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
238 // FIXME: Implement efficient support for garbage collection intrinsics.
239 PM.add(createLowerGCPass());
241 // Replace malloc and free instructions with library calls.
242 PM.add(createLowerAllocationsPass());
244 // FIXME: implement the switch instruction in the instruction selector.
245 PM.add(createLowerSwitchPass());
247 // FIXME: implement the invoke/unwind instructions!
248 PM.add(createLowerInvokePass());
250 // decompose multi-dimensional array references into single-dim refs
251 PM.add(createDecomposeMultiDimRefsPass());
253 // Lower LLVM code to the form expected by the SPARCv9 instruction selector.
254 PM.add(createPreSelectionPass(TM));
255 PM.add(createLowerSelectPass());
257 // Run basic LLVM dataflow optimizations, to clean up after pre-selection.
258 PM.add(createReassociatePass());
259 // FIXME: these passes crash the FunctionPassManager when being added...
260 //PM.add(createLICMPass());
261 //PM.add(createGCSEPass());
263 // If the user's trying to read the generated code, they'll need to see the
264 // transformed input.
265 if (PrintMachineCode)
266 PM.add(new PrintFunctionPass());
268 // Construct and initialize the MachineFunction object for this fn.
269 PM.add(createMachineCodeConstructionPass(TM));
271 PM.add(createSparcV9BurgInstSelector(TM));
273 if (PrintMachineCode)
274 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
276 PM.add(getRegisterAllocator(TM));
278 if (PrintMachineCode)
279 PM.add(createMachineFunctionPrinterPass(&std::cerr, "After reg alloc:\n"));
281 PM.add(createPrologEpilogInsertionPass());
283 if (!DisablePeephole)
284 PM.add(createPeepholeOptsPass(TM));
286 if (PrintMachineCode)
287 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));