1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Primary interface to machine description for the UltraSPARC. Primarily just
11 // initializes machine-dependent parameters in class TargetMachine, and creates
12 // machine-dependent subclasses for classes such as TargetInstrInfo.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/Function.h"
17 #include "llvm/IntrinsicLowering.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Assembly/PrintModulePass.h"
20 #include "llvm/CodeGen/InstrSelection.h"
21 #include "llvm/CodeGen/InstrScheduling.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFunctionInfo.h"
24 #include "llvm/CodeGen/MachineCodeForInstruction.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/Target/TargetMachineImpls.h"
27 #include "llvm/Transforms/Scalar.h"
28 #include "MappingInfo.h"
29 #include "SparcInternals.h"
30 #include "SparcTargetMachine.h"
31 #include "Support/CommandLine.h"
35 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
36 // Build the MachineInstruction Description Array...
37 const TargetInstrDescriptor llvm::SparcMachineInstrDesc[] = {
38 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
39 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
40 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
41 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
42 ImplicitRegUseList, ImplicitRegUseList },
43 #include "SparcInstr.def"
46 //---------------------------------------------------------------------------
47 // Command line options to control choice of code generation passes.
48 //---------------------------------------------------------------------------
51 cl::opt<bool> DisableSched("disable-sched",
52 cl::desc("Disable local scheduling pass"));
54 cl::opt<bool> DisablePeephole("disable-peephole",
55 cl::desc("Disable peephole optimization pass"));
57 cl::opt<bool> EmitMappingInfo("enable-maps",
58 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
60 cl::opt<bool> DisableStrip("disable-strip",
61 cl::desc("Do not strip the LLVM bytecode in executable"));
63 cl::opt<bool> DumpInput("dump-input",
64 cl::desc("Print bytecode before code generation"),
68 //===---------------------------------------------------------------------===//
69 // Code generation/destruction passes
70 //===---------------------------------------------------------------------===//
73 class ConstructMachineFunction : public FunctionPass {
74 TargetMachine &Target;
76 ConstructMachineFunction(TargetMachine &T) : Target(T) {}
78 const char *getPassName() const {
79 return "ConstructMachineFunction";
82 bool runOnFunction(Function &F) {
83 MachineFunction::construct(&F, Target).getInfo()->CalculateArgSize();
88 struct DestroyMachineFunction : public FunctionPass {
89 const char *getPassName() const { return "FreeMachineFunction"; }
91 static void freeMachineCode(Instruction &I) {
92 MachineCodeForInstruction::destroy(&I);
95 bool runOnFunction(Function &F) {
96 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
97 for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E; ++I)
98 MachineCodeForInstruction::get(I).dropAllReferences();
100 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
101 for_each(FI->begin(), FI->end(), freeMachineCode);
103 MachineFunction::destruct(&F);
108 FunctionPass *createMachineCodeConstructionPass(TargetMachine &Target) {
109 return new ConstructMachineFunction(Target);
113 FunctionPass *llvm::createSparcMachineCodeDestructionPass() {
114 return new DestroyMachineFunction();
118 SparcTargetMachine::SparcTargetMachine(IntrinsicLowering *il)
119 : TargetMachine("UltraSparc-Native", false),
120 IL(il ? il : new DefaultIntrinsicLowering()),
125 jitInfo(*this, *IL) {
128 SparcTargetMachine::~SparcTargetMachine() {
132 // addPassesToEmitAssembly - This method controls the entire code generation
133 // process for the ultra sparc.
136 SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
138 // The following 3 passes used to be inserted specially by llc.
139 // Replace malloc and free instructions with library calls.
140 PM.add(createLowerAllocationsPass());
142 // Strip all of the symbols from the bytecode so that it will be smaller...
144 PM.add(createSymbolStrippingPass());
146 // FIXME: implement the switch instruction in the instruction selector.
147 PM.add(createLowerSwitchPass());
149 // FIXME: implement the invoke/unwind instructions!
150 PM.add(createLowerInvokePass());
152 // decompose multi-dimensional array references into single-dim refs
153 PM.add(createDecomposeMultiDimRefsPass());
155 // Construct and initialize the MachineFunction object for this fn.
156 PM.add(createMachineCodeConstructionPass(*this));
158 //Insert empty stackslots in the stack frame of each function
159 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
160 PM.add(createStackSlotsPass(*this));
162 // Specialize LLVM code for this target machine
163 PM.add(createPreSelectionPass(*this));
164 // Run basic dataflow optimizations on LLVM code
165 PM.add(createReassociatePass());
166 PM.add(createLICMPass());
167 PM.add(createGCSEPass());
169 // If LLVM dumping after transformations is requested, add it to the pipeline
171 PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
174 PM.add(createInstructionSelectionPass(*this, *IL));
177 PM.add(createInstructionSchedulingWithSSAPass(*this));
179 PM.add(getRegisterAllocator(*this));
181 PM.add(createPrologEpilogInsertionPass());
183 if (!DisablePeephole)
184 PM.add(createPeepholeOptsPass(*this));
187 PM.add(getMappingInfoAsmPrinterPass(Out));
189 // Output assembly language to the .s file. Assembly emission is split into
190 // two parts: Function output and Global value output. This is because
191 // function output is pipelined with all of the rest of code generation stuff,
192 // allowing machine code representations for functions to be free'd after the
193 // function has been emitted.
195 PM.add(createAsmPrinterPass(Out, *this));
196 PM.add(createSparcMachineCodeDestructionPass()); // Free mem no longer needed
198 // Emit bytecode to the assembly file into its special section next
200 PM.add(createBytecodeAsmPrinterPass(Out));
205 // addPassesToJITCompile - This method controls the JIT method of code
206 // generation for the UltraSparc.
208 void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
209 const TargetData &TD = TM.getTargetData();
211 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
212 TD.getPointerAlignment(), TD.getDoubleAlignment()));
214 // Replace malloc and free instructions with library calls.
215 // Do this after tracing until lli implements these lib calls.
216 // For now, it will emulate malloc and free internally.
217 PM.add(createLowerAllocationsPass());
219 // FIXME: implement the switch instruction in the instruction selector.
220 PM.add(createLowerSwitchPass());
222 // FIXME: implement the invoke/unwind instructions!
223 PM.add(createLowerInvokePass());
225 // decompose multi-dimensional array references into single-dim refs
226 PM.add(createDecomposeMultiDimRefsPass());
228 // Construct and initialize the MachineFunction object for this fn.
229 PM.add(createMachineCodeConstructionPass(TM));
231 // Specialize LLVM code for this target machine and then
232 // run basic dataflow optimizations on LLVM code.
233 PM.add(createPreSelectionPass(TM));
234 // Run basic dataflow optimizations on LLVM code
235 PM.add(createReassociatePass());
237 // FIXME: these passes crash the FunctionPassManager when being added...
238 //PM.add(createLICMPass());
239 //PM.add(createGCSEPass());
241 PM.add(createInstructionSelectionPass(TM, IL));
243 PM.add(getRegisterAllocator(TM));
244 PM.add(createPrologEpilogInsertionPass());
246 if (!DisablePeephole)
247 PM.add(createPeepholeOptsPass(TM));
250 //----------------------------------------------------------------------------
251 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
252 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
253 //----------------------------------------------------------------------------
255 TargetMachine *llvm::allocateSparcTargetMachine(const Module &M,
256 IntrinsicLowering *IL) {
257 return new SparcTargetMachine(IL);