1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // This file contains the code for the Sparc Target that does not fit in any of
4 // the other files in this directory.
6 //===----------------------------------------------------------------------===//
8 #include "SparcInternals.h"
9 #include "llvm/Target/TargetMachineImpls.h"
10 #include "llvm/Function.h"
11 #include "llvm/PassManager.h"
12 #include "llvm/Transforms/Scalar.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/MachineFunctionInfo.h"
15 #include "llvm/CodeGen/PreSelection.h"
16 #include "llvm/CodeGen/StackSlots.h"
17 #include "llvm/CodeGen/PeepholeOpts.h"
18 #include "llvm/CodeGen/InstrSelection.h"
19 #include "llvm/CodeGen/InstrScheduling.h"
20 #include "llvm/CodeGen/RegisterAllocation.h"
21 #include "llvm/CodeGen/MachineCodeForInstruction.h"
22 #include "llvm/Reoptimizer/Mapping/MappingInfo.h"
23 #include "Support/CommandLine.h"
24 #include "llvm/Assembly/PrintModulePass.h"
26 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
27 // Build the MachineInstruction Description Array...
28 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
29 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
30 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
31 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
32 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
33 ImplicitRegUseList, ImplicitRegUseList },
34 #include "SparcInstr.def"
37 //---------------------------------------------------------------------------
38 // Command line options to control choice of code generation passes.
39 //---------------------------------------------------------------------------
41 static cl::opt<bool> DisablePreOpt("disable-preopt",
42 cl::desc("Disable optimizations prior to instruction selection"));
44 static cl::opt<bool> DisableSched("disable-sched",
45 cl::desc("Disable local scheduling pass"));
47 static cl::opt<bool> DisablePeephole("disable-peephole",
48 cl::desc("Disable peephole optimization pass"));
50 static cl::opt<bool> EmitMappingInfo("emitmaps",
51 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
53 static cl::opt<bool> DisableStrip("disable-strip",
54 cl::desc("Do not strip the LLVM bytecode included in executable"));
56 static cl::opt<bool> DumpInput("dump-input",
57 cl::desc("Print bytecode before native code generation"),
60 //----------------------------------------------------------------------------
61 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
62 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
63 //----------------------------------------------------------------------------
65 TargetMachine *allocateSparcTargetMachine(unsigned Configuration) {
66 return new UltraSparc();
69 //---------------------------------------------------------------------------
70 // class UltraSparcFrameInfo
72 // Interface to stack frame layout info for the UltraSPARC.
73 // Starting offsets for each area of the stack frame are aligned at
74 // a multiple of getStackFrameSizeAlignment().
75 //---------------------------------------------------------------------------
78 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
81 pos = false; // static stack area grows downwards
82 return StaticAreaOffsetFromFP;
86 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
89 // ensure no more auto vars are added
90 mcInfo.getInfo()->freezeAutomaticVarsArea();
92 pos = false; // static stack area grows downwards
93 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
94 return StaticAreaOffsetFromFP - autoVarsSize;
98 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
101 MachineFunctionInfo *MFI = mcInfo.getInfo();
102 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
103 MFI->freezeSpillsArea(); // ensure no more spill slots are added
105 pos = false; // static stack area grows downwards
106 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
107 unsigned spillAreaSize = MFI->getRegSpillsSize();
108 int offset = autoVarsSize + spillAreaSize;
109 return StaticAreaOffsetFromFP - offset;
113 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
116 // Dynamic stack area grows downwards starting at top of opt-args area.
117 // The opt-args, required-args, and register-save areas are empty except
118 // during calls and traps, so they are shifted downwards on each
119 // dynamic-size alloca.
121 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
122 if (int extra = optArgsSize % getStackFrameSizeAlignment())
123 optArgsSize += (getStackFrameSizeAlignment() - extra);
124 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
125 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
129 //---------------------------------------------------------------------------
130 // class UltraSparcMachine
133 // Primary interface to machine description for the UltraSPARC.
134 // Primarily just initializes machine-dependent parameters in
135 // class TargetMachine, and creates machine-dependent subclasses
136 // for classes such as TargetInstrInfo.
138 //---------------------------------------------------------------------------
140 UltraSparc::UltraSparc()
141 : TargetMachine("UltraSparc-Native", false),
150 // addPassesToEmitAssembly - This method controls the entire code generation
151 // process for the ultra sparc.
153 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
155 // The following 3 passes used to be inserted specially by llc.
156 // Replace malloc and free instructions with library calls.
157 PM.add(createLowerAllocationsPass());
159 // Strip all of the symbols from the bytecode so that it will be smaller...
161 PM.add(createSymbolStrippingPass());
163 // FIXME: implement the switch instruction in the instruction selector.
164 PM.add(createLowerSwitchPass());
166 // decompose multi-dimensional array references into single-dim refs
167 PM.add(createDecomposeMultiDimRefsPass());
169 // Construct and initialize the MachineFunction object for this fn.
170 PM.add(createMachineCodeConstructionPass(*this));
172 //Insert empty stackslots in the stack frame of each function
173 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
174 PM.add(createStackSlotsPass(*this));
176 if (!DisablePreOpt) {
177 // Specialize LLVM code for this target machine
178 PM.add(createPreSelectionPass(*this));
179 // Run basic dataflow optimizations on LLVM code
180 PM.add(createReassociatePass());
181 PM.add(createLICMPass());
182 PM.add(createGCSEPass());
185 // If LLVM dumping after transformations is requested, add it to the pipeline
187 PM.add(new PrintFunctionPass("Input code to instsr. selection:\n",
190 PM.add(createInstructionSelectionPass(*this));
193 PM.add(createInstructionSchedulingWithSSAPass(*this));
195 PM.add(getRegisterAllocator(*this));
197 PM.add(getPrologEpilogInsertionPass());
199 if (!DisablePeephole)
200 PM.add(createPeepholeOptsPass(*this));
203 PM.add(getMappingInfoCollector(Out));
205 // Output assembly language to the .s file. Assembly emission is split into
206 // two parts: Function output and Global value output. This is because
207 // function output is pipelined with all of the rest of code generation stuff,
208 // allowing machine code representations for functions to be free'd after the
209 // function has been emitted.
211 PM.add(getFunctionAsmPrinterPass(Out));
212 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
214 // Emit Module level assembly after all of the functions have been processed.
215 PM.add(getModuleAsmPrinterPass(Out));
217 // Emit bytecode to the assembly file into its special section next
218 if (EmitMappingInfo) {
219 PM.add(getEmitBytecodeToAsmPass(Out));
220 PM.add(getFunctionInfo(Out));
226 // addPassesToJITCompile - This method controls the JIT method of code
227 // generation for the UltraSparc.
229 bool UltraSparc::addPassesToJITCompile(PassManager &PM) {
230 const TargetData &TD = getTargetData();
232 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
233 TD.getPointerAlignment(), TD.getDoubleAlignment()));
235 // Replace malloc and free instructions with library calls.
236 // Do this after tracing until lli implements these lib calls.
237 // For now, it will emulate malloc and free internally.
238 PM.add(createLowerAllocationsPass());
240 // FIXME: implement the switch instruction in the instruction selector.
241 PM.add(createLowerSwitchPass());
243 // decompose multi-dimensional array references into single-dim refs
244 PM.add(createDecomposeMultiDimRefsPass());
246 // Construct and initialize the MachineFunction object for this fn.
247 PM.add(createMachineCodeConstructionPass(*this));
249 PM.add(createInstructionSelectionPass(*this));
251 // new pass: convert Value* in MachineOperand to an unsigned register
252 // this brings it in line with what the X86 JIT's RegisterAllocator expects
253 //PM.add(createAddRegNumToValuesPass());
255 PM.add(getRegisterAllocator(*this));
256 PM.add(getPrologEpilogInsertionPass());
258 if (!DisablePeephole)
259 PM.add(createPeepholeOptsPass(*this));
261 return false; // success!