1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // This file contains the code for the Sparc Target that does not fit in any of
4 // the other files in this directory.
6 //===----------------------------------------------------------------------===//
8 #include "SparcInternals.h"
9 #include "MappingInfo.h"
10 #include "llvm/Function.h"
11 #include "llvm/PassManager.h"
12 #include "llvm/Assembly/PrintModulePass.h"
13 #include "llvm/Transforms/Scalar.h"
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/CodeGen/MachineFunctionInfo.h"
16 #include "llvm/CodeGen/InstrSelection.h"
17 #include "llvm/CodeGen/InstrScheduling.h"
18 #include "llvm/CodeGen/RegisterAllocation.h"
19 #include "llvm/CodeGen/MachineCodeForInstruction.h"
20 #include "llvm/Target/TargetMachineImpls.h"
21 #include "Support/CommandLine.h"
23 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
24 // Build the MachineInstruction Description Array...
25 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
26 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
27 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
28 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
29 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
30 ImplicitRegUseList, ImplicitRegUseList },
31 #include "SparcInstr.def"
34 //---------------------------------------------------------------------------
35 // Command line options to control choice of code generation passes.
36 //---------------------------------------------------------------------------
38 static cl::opt<bool> DisablePreOpt("disable-preopt",
39 cl::desc("Disable optimizations prior to instruction selection"));
41 static cl::opt<bool> DisableSched("disable-sched",
42 cl::desc("Disable local scheduling pass"));
44 static cl::opt<bool> DisablePeephole("disable-peephole",
45 cl::desc("Disable peephole optimization pass"));
47 static cl::opt<bool> EmitMappingInfo("enable-maps",
48 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
50 static cl::opt<bool> DisableStrip("disable-strip",
51 cl::desc("Do not strip the LLVM bytecode included in executable"));
53 static cl::opt<bool> DumpInput("dump-input",
54 cl::desc("Print bytecode before native code generation"),
57 //----------------------------------------------------------------------------
58 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
59 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
60 //----------------------------------------------------------------------------
62 TargetMachine *allocateSparcTargetMachine(const Module &M) {
63 return new UltraSparc();
66 //---------------------------------------------------------------------------
67 // class UltraSparcFrameInfo
69 // Interface to stack frame layout info for the UltraSPARC.
70 // Starting offsets for each area of the stack frame are aligned at
71 // a multiple of getStackFrameSizeAlignment().
72 //---------------------------------------------------------------------------
75 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
78 pos = false; // static stack area grows downwards
79 return StaticAreaOffsetFromFP;
83 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
86 // ensure no more auto vars are added
87 mcInfo.getInfo()->freezeAutomaticVarsArea();
89 pos = false; // static stack area grows downwards
90 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
91 return StaticAreaOffsetFromFP - autoVarsSize;
95 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
98 MachineFunctionInfo *MFI = mcInfo.getInfo();
99 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
100 MFI->freezeSpillsArea(); // ensure no more spill slots are added
102 pos = false; // static stack area grows downwards
103 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
104 unsigned spillAreaSize = MFI->getRegSpillsSize();
105 int offset = autoVarsSize + spillAreaSize;
106 return StaticAreaOffsetFromFP - offset;
110 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
113 // Dynamic stack area grows downwards starting at top of opt-args area.
114 // The opt-args, required-args, and register-save areas are empty except
115 // during calls and traps, so they are shifted downwards on each
116 // dynamic-size alloca.
118 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
119 if (int extra = optArgsSize % getStackFrameSizeAlignment())
120 optArgsSize += (getStackFrameSizeAlignment() - extra);
121 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
122 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
126 //---------------------------------------------------------------------------
127 // class UltraSparcMachine
130 // Primary interface to machine description for the UltraSPARC.
131 // Primarily just initializes machine-dependent parameters in
132 // class TargetMachine, and creates machine-dependent subclasses
133 // for classes such as TargetInstrInfo.
135 //---------------------------------------------------------------------------
137 UltraSparc::UltraSparc()
138 : TargetMachine("UltraSparc-Native", false),
147 // addPassesToEmitAssembly - This method controls the entire code generation
148 // process for the ultra sparc.
150 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
152 // The following 3 passes used to be inserted specially by llc.
153 // Replace malloc and free instructions with library calls.
154 PM.add(createLowerAllocationsPass());
156 // Strip all of the symbols from the bytecode so that it will be smaller...
158 PM.add(createSymbolStrippingPass());
160 // FIXME: implement the switch instruction in the instruction selector.
161 PM.add(createLowerSwitchPass());
163 // decompose multi-dimensional array references into single-dim refs
164 PM.add(createDecomposeMultiDimRefsPass());
166 // Construct and initialize the MachineFunction object for this fn.
167 PM.add(createMachineCodeConstructionPass(*this));
169 //Insert empty stackslots in the stack frame of each function
170 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
171 PM.add(createStackSlotsPass(*this));
173 if (!DisablePreOpt) {
174 // Specialize LLVM code for this target machine
175 PM.add(createPreSelectionPass(*this));
176 // Run basic dataflow optimizations on LLVM code
177 PM.add(createReassociatePass());
178 PM.add(createLICMPass());
179 PM.add(createGCSEPass());
182 // If LLVM dumping after transformations is requested, add it to the pipeline
184 PM.add(new PrintFunctionPass("Input code to instsr. selection:\n",
187 PM.add(createInstructionSelectionPass(*this));
190 PM.add(createInstructionSchedulingWithSSAPass(*this));
192 PM.add(getRegisterAllocator(*this));
194 PM.add(getPrologEpilogInsertionPass());
196 if (!DisablePeephole)
197 PM.add(createPeepholeOptsPass(*this));
200 PM.add(getMappingInfoCollector(Out));
202 // Output assembly language to the .s file. Assembly emission is split into
203 // two parts: Function output and Global value output. This is because
204 // function output is pipelined with all of the rest of code generation stuff,
205 // allowing machine code representations for functions to be free'd after the
206 // function has been emitted.
208 PM.add(getFunctionAsmPrinterPass(Out));
209 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
211 // Emit Module level assembly after all of the functions have been processed.
212 PM.add(getModuleAsmPrinterPass(Out));
214 // Emit bytecode to the assembly file into its special section next
215 if (EmitMappingInfo) {
216 PM.add(getEmitBytecodeToAsmPass(Out));
217 PM.add(getFunctionInfo(Out));
223 // addPassesToJITCompile - This method controls the JIT method of code
224 // generation for the UltraSparc.
226 bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
227 const TargetData &TD = getTargetData();
229 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
230 TD.getPointerAlignment(), TD.getDoubleAlignment()));
232 // Replace malloc and free instructions with library calls.
233 // Do this after tracing until lli implements these lib calls.
234 // For now, it will emulate malloc and free internally.
235 PM.add(createLowerAllocationsPass());
237 // FIXME: implement the switch instruction in the instruction selector.
238 PM.add(createLowerSwitchPass());
240 // decompose multi-dimensional array references into single-dim refs
241 PM.add(createDecomposeMultiDimRefsPass());
243 // Construct and initialize the MachineFunction object for this fn.
244 PM.add(createMachineCodeConstructionPass(*this));
246 PM.add(createInstructionSelectionPass(*this));
248 // new pass: convert Value* in MachineOperand to an unsigned register
249 // this brings it in line with what the X86 JIT's RegisterAllocator expects
250 //PM.add(createAddRegNumToValuesPass());
252 PM.add(getRegisterAllocator(*this));
253 PM.add(getPrologEpilogInsertionPass());
255 if (!DisablePeephole)
256 PM.add(createPeepholeOptsPass(*this));
258 return false; // success!