1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the code for the Sparc Target that does not fit in any of
11 // the other files in this directory.
13 //===----------------------------------------------------------------------===//
15 #include "SparcInternals.h"
16 #include "MappingInfo.h"
17 #include "llvm/Function.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Assembly/PrintModulePass.h"
20 #include "llvm/Transforms/Scalar.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineFunctionInfo.h"
23 #include "llvm/CodeGen/InstrSelection.h"
24 #include "llvm/CodeGen/InstrScheduling.h"
25 #include "llvm/CodeGen/MachineCodeForInstruction.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/Target/TargetMachineImpls.h"
28 #include "Support/CommandLine.h"
30 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
31 // Build the MachineInstruction Description Array...
32 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
33 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
34 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
35 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
36 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
37 ImplicitRegUseList, ImplicitRegUseList },
38 #include "SparcInstr.def"
41 //---------------------------------------------------------------------------
42 // Command line options to control choice of code generation passes.
43 //---------------------------------------------------------------------------
45 static cl::opt<bool> DisableSched("disable-sched",
46 cl::desc("Disable local scheduling pass"));
48 static cl::opt<bool> DisablePeephole("disable-peephole",
49 cl::desc("Disable peephole optimization pass"));
51 static cl::opt<bool> EmitMappingInfo("enable-maps",
52 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
54 static cl::opt<bool> DisableStrip("disable-strip",
55 cl::desc("Do not strip the LLVM bytecode included in executable"));
57 static cl::opt<bool> DumpInput("dump-input",
58 cl::desc("Print bytecode before native code generation"),
61 //----------------------------------------------------------------------------
62 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
63 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
64 //----------------------------------------------------------------------------
66 TargetMachine *allocateSparcTargetMachine(const Module &M) {
67 return new UltraSparc();
70 //---------------------------------------------------------------------------
71 // class UltraSparcFrameInfo
73 // Interface to stack frame layout info for the UltraSPARC.
74 // Starting offsets for each area of the stack frame are aligned at
75 // a multiple of getStackFrameSizeAlignment().
76 //---------------------------------------------------------------------------
79 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
82 pos = false; // static stack area grows downwards
83 return StaticAreaOffsetFromFP;
87 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
90 // ensure no more auto vars are added
91 mcInfo.getInfo()->freezeAutomaticVarsArea();
93 pos = false; // static stack area grows downwards
94 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
95 return StaticAreaOffsetFromFP - autoVarsSize;
99 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
102 MachineFunctionInfo *MFI = mcInfo.getInfo();
103 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
104 MFI->freezeSpillsArea(); // ensure no more spill slots are added
106 pos = false; // static stack area grows downwards
107 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
108 unsigned spillAreaSize = MFI->getRegSpillsSize();
109 int offset = autoVarsSize + spillAreaSize;
110 return StaticAreaOffsetFromFP - offset;
114 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
117 // Dynamic stack area grows downwards starting at top of opt-args area.
118 // The opt-args, required-args, and register-save areas are empty except
119 // during calls and traps, so they are shifted downwards on each
120 // dynamic-size alloca.
122 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
123 if (int extra = optArgsSize % getStackFrameSizeAlignment())
124 optArgsSize += (getStackFrameSizeAlignment() - extra);
125 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
126 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
130 //---------------------------------------------------------------------------
131 // class UltraSparcMachine
134 // Primary interface to machine description for the UltraSPARC.
135 // Primarily just initializes machine-dependent parameters in
136 // class TargetMachine, and creates machine-dependent subclasses
137 // for classes such as TargetInstrInfo.
139 //---------------------------------------------------------------------------
141 UltraSparc::UltraSparc()
142 : TargetMachine("UltraSparc-Native", false),
149 // addPassesToEmitAssembly - This method controls the entire code generation
150 // process for the ultra sparc.
152 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
154 // The following 3 passes used to be inserted specially by llc.
155 // Replace malloc and free instructions with library calls.
156 PM.add(createLowerAllocationsPass());
158 // Strip all of the symbols from the bytecode so that it will be smaller...
160 PM.add(createSymbolStrippingPass());
162 // FIXME: implement the switch instruction in the instruction selector.
163 PM.add(createLowerSwitchPass());
165 // FIXME: implement the invoke/unwind instructions!
166 PM.add(createLowerInvokePass());
168 // decompose multi-dimensional array references into single-dim refs
169 PM.add(createDecomposeMultiDimRefsPass());
171 // Construct and initialize the MachineFunction object for this fn.
172 PM.add(createMachineCodeConstructionPass(*this));
174 //Insert empty stackslots in the stack frame of each function
175 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
176 PM.add(createStackSlotsPass(*this));
178 // Specialize LLVM code for this target machine
179 PM.add(createPreSelectionPass(*this));
180 // Run basic dataflow optimizations on LLVM code
181 PM.add(createReassociatePass());
182 PM.add(createLICMPass());
183 PM.add(createGCSEPass());
185 // If LLVM dumping after transformations is requested, add it to the pipeline
187 PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
190 PM.add(createInstructionSelectionPass(*this));
193 PM.add(createInstructionSchedulingWithSSAPass(*this));
195 PM.add(getRegisterAllocator(*this));
197 PM.add(getPrologEpilogInsertionPass());
199 if (!DisablePeephole)
200 PM.add(createPeepholeOptsPass(*this));
203 PM.add(getMappingInfoAsmPrinterPass(Out));
205 // Output assembly language to the .s file. Assembly emission is split into
206 // two parts: Function output and Global value output. This is because
207 // function output is pipelined with all of the rest of code generation stuff,
208 // allowing machine code representations for functions to be free'd after the
209 // function has been emitted.
211 PM.add(getFunctionAsmPrinterPass(Out));
212 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
214 // Emit Module level assembly after all of the functions have been processed.
215 PM.add(getModuleAsmPrinterPass(Out));
217 // Emit bytecode to the assembly file into its special section next
219 PM.add(getBytecodeAsmPrinterPass(Out));
224 // addPassesToJITCompile - This method controls the JIT method of code
225 // generation for the UltraSparc.
227 bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
228 const TargetData &TD = getTargetData();
230 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
231 TD.getPointerAlignment(), TD.getDoubleAlignment()));
233 // Replace malloc and free instructions with library calls.
234 // Do this after tracing until lli implements these lib calls.
235 // For now, it will emulate malloc and free internally.
236 PM.add(createLowerAllocationsPass());
238 // FIXME: implement the switch instruction in the instruction selector.
239 PM.add(createLowerSwitchPass());
241 // FIXME: implement the invoke/unwind instructions!
242 PM.add(createLowerInvokePass());
244 // decompose multi-dimensional array references into single-dim refs
245 PM.add(createDecomposeMultiDimRefsPass());
247 // Construct and initialize the MachineFunction object for this fn.
248 PM.add(createMachineCodeConstructionPass(*this));
250 // Specialize LLVM code for this target machine and then
251 // run basic dataflow optimizations on LLVM code.
252 PM.add(createPreSelectionPass(*this));
253 // Run basic dataflow optimizations on LLVM code
254 PM.add(createReassociatePass());
256 // FIXME: these passes crash the FunctionPassManager when being added...
257 //PM.add(createLICMPass());
258 //PM.add(createGCSEPass());
260 PM.add(createInstructionSelectionPass(*this));
262 PM.add(getRegisterAllocator(*this));
263 PM.add(getPrologEpilogInsertionPass());
265 if (!DisablePeephole)
266 PM.add(createPeepholeOptsPass(*this));
268 return false; // success!