1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // This file contains the code for the Sparc Target that does not fit in any of
4 // the other files in this directory.
6 //===----------------------------------------------------------------------===//
8 #include "SparcInternals.h"
9 #include "MappingInfo.h"
10 #include "llvm/Function.h"
11 #include "llvm/PassManager.h"
12 #include "llvm/Assembly/PrintModulePass.h"
13 #include "llvm/Transforms/Scalar.h"
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/CodeGen/MachineFunctionInfo.h"
16 #include "llvm/CodeGen/PreSelection.h"
17 #include "llvm/CodeGen/PeepholeOpts.h"
18 #include "llvm/CodeGen/InstrSelection.h"
19 #include "llvm/CodeGen/InstrScheduling.h"
20 #include "llvm/CodeGen/RegisterAllocation.h"
21 #include "llvm/CodeGen/MachineCodeForInstruction.h"
22 #include "llvm/Target/TargetMachineImpls.h"
23 #include "Support/CommandLine.h"
25 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
26 // Build the MachineInstruction Description Array...
27 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
28 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
29 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
30 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
31 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
32 ImplicitRegUseList, ImplicitRegUseList },
33 #include "SparcInstr.def"
36 //---------------------------------------------------------------------------
37 // Command line options to control choice of code generation passes.
38 //---------------------------------------------------------------------------
40 static cl::opt<bool> DisablePreOpt("disable-preopt",
41 cl::desc("Disable optimizations prior to instruction selection"));
43 static cl::opt<bool> DisableSched("disable-sched",
44 cl::desc("Disable local scheduling pass"));
46 static cl::opt<bool> DisablePeephole("disable-peephole",
47 cl::desc("Disable peephole optimization pass"));
49 static cl::opt<bool> EmitMappingInfo("enable-maps",
50 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
52 static cl::opt<bool> DisableStrip("disable-strip",
53 cl::desc("Do not strip the LLVM bytecode included in executable"));
55 static cl::opt<bool> DumpInput("dump-input",
56 cl::desc("Print bytecode before native code generation"),
59 //----------------------------------------------------------------------------
60 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
61 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
62 //----------------------------------------------------------------------------
64 TargetMachine *allocateSparcTargetMachine(unsigned Configuration) {
65 return new UltraSparc();
68 //---------------------------------------------------------------------------
69 // class UltraSparcFrameInfo
71 // Interface to stack frame layout info for the UltraSPARC.
72 // Starting offsets for each area of the stack frame are aligned at
73 // a multiple of getStackFrameSizeAlignment().
74 //---------------------------------------------------------------------------
77 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
80 pos = false; // static stack area grows downwards
81 return StaticAreaOffsetFromFP;
85 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
88 // ensure no more auto vars are added
89 mcInfo.getInfo()->freezeAutomaticVarsArea();
91 pos = false; // static stack area grows downwards
92 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
93 return StaticAreaOffsetFromFP - autoVarsSize;
97 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
100 MachineFunctionInfo *MFI = mcInfo.getInfo();
101 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
102 MFI->freezeSpillsArea(); // ensure no more spill slots are added
104 pos = false; // static stack area grows downwards
105 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
106 unsigned spillAreaSize = MFI->getRegSpillsSize();
107 int offset = autoVarsSize + spillAreaSize;
108 return StaticAreaOffsetFromFP - offset;
112 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
115 // Dynamic stack area grows downwards starting at top of opt-args area.
116 // The opt-args, required-args, and register-save areas are empty except
117 // during calls and traps, so they are shifted downwards on each
118 // dynamic-size alloca.
120 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
121 if (int extra = optArgsSize % getStackFrameSizeAlignment())
122 optArgsSize += (getStackFrameSizeAlignment() - extra);
123 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
124 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
128 //---------------------------------------------------------------------------
129 // class UltraSparcMachine
132 // Primary interface to machine description for the UltraSPARC.
133 // Primarily just initializes machine-dependent parameters in
134 // class TargetMachine, and creates machine-dependent subclasses
135 // for classes such as TargetInstrInfo.
137 //---------------------------------------------------------------------------
139 UltraSparc::UltraSparc()
140 : TargetMachine("UltraSparc-Native", false),
149 // addPassesToEmitAssembly - This method controls the entire code generation
150 // process for the ultra sparc.
152 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
154 // The following 3 passes used to be inserted specially by llc.
155 // Replace malloc and free instructions with library calls.
156 PM.add(createLowerAllocationsPass());
158 // Strip all of the symbols from the bytecode so that it will be smaller...
160 PM.add(createSymbolStrippingPass());
162 // FIXME: implement the switch instruction in the instruction selector.
163 PM.add(createLowerSwitchPass());
165 // decompose multi-dimensional array references into single-dim refs
166 PM.add(createDecomposeMultiDimRefsPass());
168 // Construct and initialize the MachineFunction object for this fn.
169 PM.add(createMachineCodeConstructionPass(*this));
171 //Insert empty stackslots in the stack frame of each function
172 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
173 PM.add(createStackSlotsPass(*this));
175 if (!DisablePreOpt) {
176 // Specialize LLVM code for this target machine
177 PM.add(createPreSelectionPass(*this));
178 // Run basic dataflow optimizations on LLVM code
179 PM.add(createReassociatePass());
180 PM.add(createLICMPass());
181 PM.add(createGCSEPass());
184 // If LLVM dumping after transformations is requested, add it to the pipeline
186 PM.add(new PrintFunctionPass("Input code to instsr. selection:\n",
189 PM.add(createInstructionSelectionPass(*this));
192 PM.add(createInstructionSchedulingWithSSAPass(*this));
194 PM.add(getRegisterAllocator(*this));
196 PM.add(getPrologEpilogInsertionPass());
198 if (!DisablePeephole)
199 PM.add(createPeepholeOptsPass(*this));
202 PM.add(getMappingInfoCollector(Out));
204 // Output assembly language to the .s file. Assembly emission is split into
205 // two parts: Function output and Global value output. This is because
206 // function output is pipelined with all of the rest of code generation stuff,
207 // allowing machine code representations for functions to be free'd after the
208 // function has been emitted.
210 PM.add(getFunctionAsmPrinterPass(Out));
211 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
213 // Emit Module level assembly after all of the functions have been processed.
214 PM.add(getModuleAsmPrinterPass(Out));
216 // Emit bytecode to the assembly file into its special section next
217 if (EmitMappingInfo) {
218 PM.add(getEmitBytecodeToAsmPass(Out));
219 PM.add(getFunctionInfo(Out));
225 // addPassesToJITCompile - This method controls the JIT method of code
226 // generation for the UltraSparc.
228 bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
229 const TargetData &TD = getTargetData();
231 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
232 TD.getPointerAlignment(), TD.getDoubleAlignment()));
234 // Replace malloc and free instructions with library calls.
235 // Do this after tracing until lli implements these lib calls.
236 // For now, it will emulate malloc and free internally.
237 PM.add(createLowerAllocationsPass());
239 // FIXME: implement the switch instruction in the instruction selector.
240 PM.add(createLowerSwitchPass());
242 // decompose multi-dimensional array references into single-dim refs
243 PM.add(createDecomposeMultiDimRefsPass());
245 // Construct and initialize the MachineFunction object for this fn.
246 PM.add(createMachineCodeConstructionPass(*this));
248 PM.add(createInstructionSelectionPass(*this));
250 // new pass: convert Value* in MachineOperand to an unsigned register
251 // this brings it in line with what the X86 JIT's RegisterAllocator expects
252 //PM.add(createAddRegNumToValuesPass());
254 PM.add(getRegisterAllocator(*this));
255 PM.add(getPrologEpilogInsertionPass());
257 if (!DisablePeephole)
258 PM.add(createPeepholeOptsPass(*this));
260 return false; // success!