1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // This file contains the code for the Sparc Target that does not fit in any of
4 // the other files in this directory.
6 //===----------------------------------------------------------------------===//
8 #include "SparcInternals.h"
9 #include "llvm/Target/TargetMachineImpls.h"
10 #include "llvm/Function.h"
11 #include "llvm/PassManager.h"
12 #include "llvm/Transforms/Scalar.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/MachineFunctionInfo.h"
15 #include "llvm/CodeGen/PreSelection.h"
16 #include "llvm/CodeGen/StackSlots.h"
17 #include "llvm/CodeGen/PeepholeOpts.h"
18 #include "llvm/CodeGen/InstrSelection.h"
19 #include "llvm/CodeGen/InstrScheduling.h"
20 #include "llvm/CodeGen/RegisterAllocation.h"
21 #include "llvm/CodeGen/MachineCodeForInstruction.h"
22 #include "llvm/Reoptimizer/Mapping/MappingInfo.h"
23 #include "llvm/Reoptimizer/Mapping/FInfo.h"
24 #include "Support/CommandLine.h"
27 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
28 // Build the MachineInstruction Description Array...
29 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
30 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
31 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
32 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
33 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
34 ImplicitRegUseList, ImplicitRegUseList },
35 #include "SparcInstr.def"
38 //---------------------------------------------------------------------------
39 // Command line options to control choice of code generation passes.
40 //---------------------------------------------------------------------------
42 static cl::opt<bool> DisablePreSelect("nopreselect",
43 cl::desc("Disable preselection pass"));
45 static cl::opt<bool> DisableSched("nosched",
46 cl::desc("Disable local scheduling pass"));
48 static cl::opt<bool> DisablePeephole("nopeephole",
49 cl::desc("Disable peephole optimization pass"));
51 //----------------------------------------------------------------------------
52 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
53 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
54 //----------------------------------------------------------------------------
56 TargetMachine *allocateSparcTargetMachine(unsigned Configuration) {
57 return new UltraSparc();
60 //---------------------------------------------------------------------------
61 // class UltraSparcFrameInfo
63 // Interface to stack frame layout info for the UltraSPARC.
64 // Starting offsets for each area of the stack frame are aligned at
65 // a multiple of getStackFrameSizeAlignment().
66 //---------------------------------------------------------------------------
69 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
72 pos = false; // static stack area grows downwards
73 return StaticAreaOffsetFromFP;
77 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
80 // ensure no more auto vars are added
81 mcInfo.getInfo()->freezeAutomaticVarsArea();
83 pos = false; // static stack area grows downwards
84 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
85 return StaticAreaOffsetFromFP - autoVarsSize;
89 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
92 MachineFunctionInfo *MFI = mcInfo.getInfo();
93 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
94 MFI->freezeSpillsArea(); // ensure no more spill slots are added
96 pos = false; // static stack area grows downwards
97 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
98 unsigned spillAreaSize = MFI->getRegSpillsSize();
99 int offset = autoVarsSize + spillAreaSize;
100 return StaticAreaOffsetFromFP - offset;
104 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
107 // Dynamic stack area grows downwards starting at top of opt-args area.
108 // The opt-args, required-args, and register-save areas are empty except
109 // during calls and traps, so they are shifted downwards on each
110 // dynamic-size alloca.
112 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
113 if (int extra = optArgsSize % getStackFrameSizeAlignment())
114 optArgsSize += (getStackFrameSizeAlignment() - extra);
115 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
116 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
120 //---------------------------------------------------------------------------
121 // class UltraSparcMachine
124 // Primary interface to machine description for the UltraSPARC.
125 // Primarily just initializes machine-dependent parameters in
126 // class TargetMachine, and creates machine-dependent subclasses
127 // for classes such as TargetInstrInfo.
129 //---------------------------------------------------------------------------
131 UltraSparc::UltraSparc()
132 : TargetMachine("UltraSparc-Native", false),
141 // addPassesToEmitAssembly - This method controls the entire code generation
142 // process for the ultra sparc.
144 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
146 // FIXME: implement the switch instruction in the instruction selector.
147 PM.add(createLowerSwitchPass());
149 // Construct and initialize the MachineFunction object for this fn.
150 PM.add(createMachineCodeConstructionPass(*this));
152 //Insert empty stackslots in the stack frame of each function
153 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
154 PM.add(createStackSlotsPass(*this));
156 // Specialize LLVM code for this target machine and then
157 // run basic dataflow optimizations on LLVM code.
158 if (!DisablePreSelect) {
159 PM.add(createPreSelectionPass(*this));
160 PM.add(createReassociatePass());
161 PM.add(createLICMPass());
162 PM.add(createGCSEPass());
165 PM.add(createInstructionSelectionPass(*this));
168 PM.add(createInstructionSchedulingWithSSAPass(*this));
170 PM.add(getRegisterAllocator(*this));
172 PM.add(getPrologEpilogInsertionPass());
174 if (!DisablePeephole)
175 PM.add(createPeepholeOptsPass(*this));
177 PM.add(MappingInfoForFunction(Out));
179 // Output assembly language to the .s file. Assembly emission is split into
180 // two parts: Function output and Global value output. This is because
181 // function output is pipelined with all of the rest of code generation stuff,
182 // allowing machine code representations for functions to be free'd after the
183 // function has been emitted.
185 PM.add(getFunctionAsmPrinterPass(Out));
186 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
188 // Emit Module level assembly after all of the functions have been processed.
189 PM.add(getModuleAsmPrinterPass(Out));
191 // Emit bytecode to the assembly file into its special section next
192 PM.add(getEmitBytecodeToAsmPass(Out));
193 PM.add(getFunctionInfo(Out));
197 // addPassesToJITCompile - This method controls the JIT method of code
198 // generation for the UltraSparc.
200 bool UltraSparc::addPassesToJITCompile(PassManager &PM) {
201 // FIXME: implement the switch instruction in the instruction selector.
202 PM.add(createLowerSwitchPass());
204 // Construct and initialize the MachineFunction object for this fn.
205 PM.add(createMachineCodeConstructionPass(*this));
207 //Insert empty stackslots in the stack frame of each function
208 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
209 PM.add(createStackSlotsPass(*this));
211 PM.add(createInstructionSelectionPass(*this));
213 // new pass: convert Value* in MachineOperand to an unsigned register
214 // this brings it in line with what the X86 JIT's RegisterAllocator expects
215 //PM.add(createAddRegNumToValuesPass());
217 PM.add(getRegisterAllocator(*this));
218 PM.add(getPrologEpilogInsertionPass());
220 return false; // success!