1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "SystemZFrameLowering.h"
11 #include "SystemZCallingConv.h"
12 #include "SystemZInstrBuilder.h"
13 #include "SystemZMachineFunctionInfo.h"
14 #include "SystemZTargetMachine.h"
15 #include "llvm/CodeGen/MachineModuleInfo.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/IR/Function.h"
21 SystemZFrameLowering::SystemZFrameLowering(const SystemZTargetMachine &tm,
22 const SystemZSubtarget &sti)
23 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8,
24 -SystemZMC::CallFrameSize),
27 // The ABI-defined register save slots, relative to the incoming stack
29 static const unsigned SpillOffsetTable[][2] = {
30 { SystemZ::R2D, 0x10 },
31 { SystemZ::R3D, 0x18 },
32 { SystemZ::R4D, 0x20 },
33 { SystemZ::R5D, 0x28 },
34 { SystemZ::R6D, 0x30 },
35 { SystemZ::R7D, 0x38 },
36 { SystemZ::R8D, 0x40 },
37 { SystemZ::R9D, 0x48 },
38 { SystemZ::R10D, 0x50 },
39 { SystemZ::R11D, 0x58 },
40 { SystemZ::R12D, 0x60 },
41 { SystemZ::R13D, 0x68 },
42 { SystemZ::R14D, 0x70 },
43 { SystemZ::R15D, 0x78 },
44 { SystemZ::F0D, 0x80 },
45 { SystemZ::F2D, 0x88 },
46 { SystemZ::F4D, 0x90 },
47 { SystemZ::F6D, 0x98 }
50 // Create a mapping from register number to save slot offset.
51 RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
52 for (unsigned I = 0, E = array_lengthof(SpillOffsetTable); I != E; ++I)
53 RegSpillOffsets[SpillOffsetTable[I][0]] = SpillOffsetTable[I][1];
56 void SystemZFrameLowering::
57 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
58 RegScavenger *RS) const {
59 MachineFrameInfo *MFFrame = MF.getFrameInfo();
60 MachineRegisterInfo &MRI = MF.getRegInfo();
61 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
62 bool HasFP = hasFP(MF);
63 SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>();
64 bool IsVarArg = MF.getFunction()->isVarArg();
66 // va_start stores incoming FPR varargs in the normal way, but delegates
67 // the saving of incoming GPR varargs to spillCalleeSavedRegisters().
68 // Record these pending uses, which typically include the call-saved
69 // argument register R6D.
71 for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
72 MRI.setPhysRegUsed(SystemZ::ArgGPRs[I]);
74 // If the function requires a frame pointer, record that the hard
75 // frame pointer will be clobbered.
77 MRI.setPhysRegUsed(SystemZ::R11D);
79 // If the function calls other functions, record that the return
80 // address register will be clobbered.
81 if (MFFrame->hasCalls())
82 MRI.setPhysRegUsed(SystemZ::R14D);
84 // If we are saving GPRs other than the stack pointer, we might as well
85 // save and restore the stack pointer at the same time, via STMG and LMG.
86 // This allows the deallocation to be done by the LMG, rather than needing
87 // a separate %r15 addition.
88 const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
89 for (unsigned I = 0; CSRegs[I]; ++I) {
90 unsigned Reg = CSRegs[I];
91 if (SystemZ::GR64BitRegClass.contains(Reg) && MRI.isPhysRegUsed(Reg)) {
92 MRI.setPhysRegUsed(SystemZ::R15D);
98 // Add GPR64 to the save instruction being built by MIB, which is in basic
99 // block MBB. IsImplicit says whether this is an explicit operand to the
100 // instruction, or an implicit one that comes between the explicit start
101 // and end registers.
102 static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB,
103 const SystemZTargetMachine &TM,
104 unsigned GPR64, bool IsImplicit) {
105 const SystemZRegisterInfo *RI = TM.getRegisterInfo();
106 unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_32bit);
107 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
108 if (!IsLive || !IsImplicit) {
109 MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
111 MBB.addLiveIn(GPR64);
115 bool SystemZFrameLowering::
116 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
117 MachineBasicBlock::iterator MBBI,
118 const std::vector<CalleeSavedInfo> &CSI,
119 const TargetRegisterInfo *TRI) const {
123 MachineFunction &MF = *MBB.getParent();
124 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
125 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
126 bool IsVarArg = MF.getFunction()->isVarArg();
127 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
129 // Scan the call-saved GPRs and find the bounds of the register spill area.
130 unsigned SavedGPRFrameSize = 0;
132 unsigned HighGPR = SystemZ::R15D;
133 unsigned StartOffset = -1U;
134 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
135 unsigned Reg = CSI[I].getReg();
136 if (SystemZ::GR64BitRegClass.contains(Reg)) {
137 SavedGPRFrameSize += 8;
138 unsigned Offset = RegSpillOffsets[Reg];
139 assert(Offset && "Unexpected GPR save");
140 if (StartOffset > Offset) {
142 StartOffset = Offset;
147 // Save information about the range and location of the call-saved
148 // registers, for use by the epilogue inserter.
149 ZFI->setSavedGPRFrameSize(SavedGPRFrameSize);
150 ZFI->setLowSavedGPR(LowGPR);
151 ZFI->setHighSavedGPR(HighGPR);
153 // Include the GPR varargs, if any. R6D is call-saved, so would
154 // be included by the loop above, but we also need to handle the
155 // call-clobbered argument registers.
157 unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
158 if (FirstGPR < SystemZ::NumArgGPRs) {
159 unsigned Reg = SystemZ::ArgGPRs[FirstGPR];
160 unsigned Offset = RegSpillOffsets[Reg];
161 if (StartOffset > Offset) {
162 LowGPR = Reg; StartOffset = Offset;
169 assert(LowGPR != HighGPR && "Should be saving %r15 and something else");
171 // Build an STMG instruction.
172 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
174 // Add the explicit register operands.
175 addSavedGPR(MBB, MIB, TM, LowGPR, false);
176 addSavedGPR(MBB, MIB, TM, HighGPR, false);
179 MIB.addReg(SystemZ::R15D).addImm(StartOffset);
181 // Make sure all call-saved GPRs are included as operands and are
182 // marked as live on entry.
183 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
184 unsigned Reg = CSI[I].getReg();
185 if (SystemZ::GR64BitRegClass.contains(Reg))
186 addSavedGPR(MBB, MIB, TM, Reg, true);
189 // ...likewise GPR varargs.
191 for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
192 addSavedGPR(MBB, MIB, TM, SystemZ::ArgGPRs[I], true);
195 // Save FPRs in the normal TargetInstrInfo way.
196 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
197 unsigned Reg = CSI[I].getReg();
198 if (SystemZ::FP64BitRegClass.contains(Reg)) {
200 TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
201 &SystemZ::FP64BitRegClass, TRI);
208 bool SystemZFrameLowering::
209 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
210 MachineBasicBlock::iterator MBBI,
211 const std::vector<CalleeSavedInfo> &CSI,
212 const TargetRegisterInfo *TRI) const {
216 MachineFunction &MF = *MBB.getParent();
217 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
218 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
219 bool HasFP = hasFP(MF);
220 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
222 // Restore FPRs in the normal TargetInstrInfo way.
223 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
224 unsigned Reg = CSI[I].getReg();
225 if (SystemZ::FP64BitRegClass.contains(Reg))
226 TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
227 &SystemZ::FP64BitRegClass, TRI);
230 // Restore call-saved GPRs (but not call-clobbered varargs, which at
231 // this point might hold return values).
232 unsigned LowGPR = ZFI->getLowSavedGPR();
233 unsigned HighGPR = ZFI->getHighSavedGPR();
234 unsigned StartOffset = RegSpillOffsets[LowGPR];
236 // If we saved any of %r2-%r5 as varargs, we should also be saving
237 // and restoring %r6. If we're saving %r6 or above, we should be
239 assert(LowGPR != HighGPR && "Should be loading %r15 and something else");
241 // Build an LMG instruction.
242 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
244 // Add the explicit register operands.
245 MIB.addReg(LowGPR, RegState::Define);
246 MIB.addReg(HighGPR, RegState::Define);
249 MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
250 MIB.addImm(StartOffset);
252 // Do a second scan adding regs as being defined by instruction
253 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
254 unsigned Reg = CSI[I].getReg();
255 if (Reg != LowGPR && Reg != HighGPR)
256 MIB.addReg(Reg, RegState::ImplicitDefine);
263 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
264 static void emitIncrement(MachineBasicBlock &MBB,
265 MachineBasicBlock::iterator &MBBI,
267 unsigned Reg, int64_t NumBytes,
268 const TargetInstrInfo *TII) {
271 int64_t ThisVal = NumBytes;
272 if (isInt<16>(NumBytes))
273 Opcode = SystemZ::AGHI;
275 Opcode = SystemZ::AGFI;
276 // Make sure we maintain 8-byte stack alignment.
277 int64_t MinVal = -int64_t(1) << 31;
278 int64_t MaxVal = (int64_t(1) << 31) - 8;
279 if (ThisVal < MinVal)
281 else if (ThisVal > MaxVal)
284 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
285 .addReg(Reg).addImm(ThisVal);
286 // The CC implicit def is dead.
287 MI->getOperand(3).setIsDead();
292 void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
293 MachineBasicBlock &MBB = MF.front();
294 MachineFrameInfo *MFFrame = MF.getFrameInfo();
295 const SystemZInstrInfo *ZII =
296 static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
297 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
298 MachineBasicBlock::iterator MBBI = MBB.begin();
299 MachineModuleInfo &MMI = MF.getMMI();
300 const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
301 const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();
302 bool HasFP = hasFP(MF);
303 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
305 // The current offset of the stack pointer from the CFA.
306 int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
308 if (ZFI->getLowSavedGPR()) {
309 // Skip over the GPR saves.
310 if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG)
313 llvm_unreachable("Couldn't skip over GPR saves");
315 // Add CFI for the GPR saves.
316 MCSymbol *GPRSaveLabel = MMI.getContext().CreateTempSymbol();
317 BuildMI(MBB, MBBI, DL,
318 ZII->get(TargetOpcode::PROLOG_LABEL)).addSym(GPRSaveLabel);
319 for (std::vector<CalleeSavedInfo>::const_iterator
320 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
321 unsigned Reg = I->getReg();
322 if (SystemZ::GR64BitRegClass.contains(Reg)) {
323 int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg];
324 MMI.addFrameInst(MCCFIInstruction::createOffset(
325 GPRSaveLabel, MRI.getDwarfRegNum(Reg, true), Offset));
330 uint64_t StackSize = getAllocatedStackSize(MF);
332 // Allocate StackSize bytes.
333 int64_t Delta = -int64_t(StackSize);
334 emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
336 // Add CFI for the allocation.
337 MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
338 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
339 .addSym(AdjustSPLabel);
340 MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
341 AdjustSPLabel, SPOffsetFromCFA + Delta));
342 SPOffsetFromCFA += Delta;
346 // Copy the base of the frame to R11.
347 BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
348 .addReg(SystemZ::R15D);
350 // Add CFI for the new frame location.
351 MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
352 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
354 unsigned HardFP = MRI.getDwarfRegNum(SystemZ::R11D, true);
356 MCCFIInstruction::createDefCfaRegister(SetFPLabel, HardFP));
358 // Mark the FramePtr as live at the beginning of every block except
359 // the entry block. (We'll have marked R11 as live on entry when
361 for (MachineFunction::iterator
362 I = llvm::next(MF.begin()), E = MF.end(); I != E; ++I)
363 I->addLiveIn(SystemZ::R11D);
366 // Skip over the FPR saves.
367 MCSymbol *FPRSaveLabel = 0;
368 for (std::vector<CalleeSavedInfo>::const_iterator
369 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
370 unsigned Reg = I->getReg();
371 if (SystemZ::FP64BitRegClass.contains(Reg)) {
372 if (MBBI != MBB.end() &&
373 (MBBI->getOpcode() == SystemZ::STD ||
374 MBBI->getOpcode() == SystemZ::STDY))
377 llvm_unreachable("Couldn't skip over FPR save");
379 // Add CFI for the this save.
381 FPRSaveLabel = MMI.getContext().CreateTempSymbol();
382 unsigned Reg = MRI.getDwarfRegNum(I->getReg(), true);
383 int64_t Offset = getFrameIndexOffset(MF, I->getFrameIdx());
384 MMI.addFrameInst(MCCFIInstruction::createOffset(
385 FPRSaveLabel, Reg, SPOffsetFromCFA + Offset));
388 // Complete the CFI for the FPR saves, modelling them as taking effect
389 // after the last save.
391 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
392 .addSym(FPRSaveLabel);
395 void SystemZFrameLowering::emitEpilogue(MachineFunction &MF,
396 MachineBasicBlock &MBB) const {
397 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
398 const SystemZInstrInfo *ZII =
399 static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
400 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
402 // Skip the return instruction.
403 assert(MBBI->getOpcode() == SystemZ::RET &&
404 "Can only insert epilogue into returning blocks");
406 uint64_t StackSize = getAllocatedStackSize(MF);
407 if (ZFI->getLowSavedGPR()) {
409 unsigned Opcode = MBBI->getOpcode();
410 if (Opcode != SystemZ::LMG)
411 llvm_unreachable("Expected to see callee-save register restore code");
413 unsigned AddrOpNo = 2;
414 DebugLoc DL = MBBI->getDebugLoc();
415 uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
416 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
418 // If the offset is too large, use the largest stack-aligned offset
419 // and add the rest to the base register (the stack or frame pointer).
421 uint64_t NumBytes = Offset - 0x7fff8;
422 emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
425 NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
426 assert(NewOpcode && "No restore instruction available");
429 MBBI->setDesc(ZII->get(NewOpcode));
430 MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(Offset);
431 } else if (StackSize) {
432 DebugLoc DL = MBBI->getDebugLoc();
433 emitIncrement(MBB, MBBI, DL, SystemZ::R15D, StackSize, ZII);
437 bool SystemZFrameLowering::hasFP(const MachineFunction &MF) const {
438 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
439 MF.getFrameInfo()->hasVarSizedObjects() ||
440 MF.getInfo<SystemZMachineFunctionInfo>()->getManipulatesSP());
443 int SystemZFrameLowering::getFrameIndexOffset(const MachineFunction &MF,
445 const MachineFrameInfo *MFFrame = MF.getFrameInfo();
447 // Start with the offset of FI from the top of the caller-allocated frame
448 // (i.e. the top of the 160 bytes allocated by the caller). This initial
449 // offset is therefore negative.
450 int64_t Offset = (MFFrame->getObjectOffset(FI) +
451 MFFrame->getOffsetAdjustment());
453 // Non-fixed objects are allocated below the incoming stack pointer.
454 // Account for the space at the top of the frame that we choose not
456 Offset += getUnallocatedTopBytes(MF);
458 // Make the offset relative to the incoming stack pointer.
459 Offset -= getOffsetOfLocalArea();
461 // Make the offset relative to the bottom of the frame.
462 Offset += getAllocatedStackSize(MF);
467 uint64_t SystemZFrameLowering::
468 getUnallocatedTopBytes(const MachineFunction &MF) const {
469 return MF.getInfo<SystemZMachineFunctionInfo>()->getSavedGPRFrameSize();
472 uint64_t SystemZFrameLowering::
473 getAllocatedStackSize(const MachineFunction &MF) const {
474 const MachineFrameInfo *MFFrame = MF.getFrameInfo();
476 // Start with the size of the local variables and spill slots.
477 uint64_t StackSize = MFFrame->getStackSize();
479 // Remove any bytes that we choose not to allocate.
480 StackSize -= getUnallocatedTopBytes(MF);
482 // Include space for an emergency spill slot, if one might be needed.
483 StackSize += getEmergencySpillSlotSize(MF);
485 // We need to allocate the ABI-defined 160-byte base area whenever
486 // we allocate stack space for our own use and whenever we call another
488 if (StackSize || MFFrame->hasVarSizedObjects() || MFFrame->hasCalls())
489 StackSize += SystemZMC::CallFrameSize;
494 unsigned SystemZFrameLowering::
495 getEmergencySpillSlotSize(const MachineFunction &MF) const {
496 const MachineFrameInfo *MFFrame = MF.getFrameInfo();
497 uint64_t MaxReach = MFFrame->getStackSize() + SystemZMC::CallFrameSize * 2;
498 return isUInt<12>(MaxReach) ? 0 : 8;
501 unsigned SystemZFrameLowering::
502 getEmergencySpillSlotOffset(const MachineFunction &MF) const {
503 assert(getEmergencySpillSlotSize(MF) && "No emergency spill slot");
504 return SystemZMC::CallFrameSize;
508 SystemZFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
509 // The ABI requires us to allocate 160 bytes of stack space for the callee,
510 // with any outgoing stack arguments being placed above that. It seems
511 // better to make that area a permanent feature of the frame even if
512 // we're using a frame pointer.
516 void SystemZFrameLowering::
517 eliminateCallFramePseudoInstr(MachineFunction &MF,
518 MachineBasicBlock &MBB,
519 MachineBasicBlock::iterator MI) const {
520 switch (MI->getOpcode()) {
521 case SystemZ::ADJCALLSTACKDOWN:
522 case SystemZ::ADJCALLSTACKUP:
523 assert(hasReservedCallFrame(MF) &&
524 "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
529 llvm_unreachable("Unexpected call frame instruction");