1 //==-- SystemZISelLowering.h - SystemZ DAG Lowering Interface ----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that SystemZ uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_TARGET_SystemZ_ISELLOWERING_H
16 #define LLVM_TARGET_SystemZ_ISELLOWERING_H
19 #include "SystemZRegisterInfo.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Target/TargetLowering.h"
24 namespace SystemZISD {
26 FIRST_NUMBER = ISD::BUILTIN_OP_END,
28 /// Return with a flag operand. Operand 0 is the chain operand.
31 /// CALL - These operations represent an abstract call
32 /// instruction, which includes a bunch of information.
35 /// PCRelativeWrapper - PC relative address
38 /// CMP, UCMP - Compare instruction
42 /// BRCOND - Conditional branch. Operand 0 is chain operand, operand 1 is
43 /// the block to branch if condition is true, operand 2 is condition code
44 /// and operand 3 is the flag operand produced by a CMP instruction.
47 /// SELECT - Operands 0 and 1 are selection variables, operand 2 is
48 /// condition code and operand 3 is the flag operand.
53 class SystemZSubtarget;
54 class SystemZTargetMachine;
56 class SystemZTargetLowering : public TargetLowering {
58 explicit SystemZTargetLowering(SystemZTargetMachine &TM);
60 /// LowerOperation - Provide custom lowering hooks for some operations.
61 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
63 /// getTargetNodeName - This method returns the name of a target specific
65 virtual const char *getTargetNodeName(unsigned Opcode) const;
67 /// getFunctionAlignment - Return the Log2 alignment of this function.
68 virtual unsigned getFunctionAlignment(const Function *F) const {
72 std::pair<unsigned, const TargetRegisterClass*>
73 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
74 TargetLowering::ConstraintType
75 getConstraintType(const std::string &Constraint) const;
77 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
78 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
79 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
80 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
81 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
83 SDValue EmitCmp(SDValue LHS, SDValue RHS,
84 ISD::CondCode CC, SDValue &SystemZCC,
88 MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI,
89 MachineBasicBlock *BB) const;
92 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
93 unsigned CallConv, bool isVarArg,
95 const SmallVectorImpl<ISD::OutputArg> &Outs,
96 const SmallVectorImpl<ISD::InputArg> &Ins,
97 DebugLoc dl, SelectionDAG &DAG,
98 SmallVectorImpl<SDValue> &InVals);
100 SDValue LowerCCCArguments(SDValue Chain,
103 const SmallVectorImpl<ISD::InputArg> &Ins,
106 SmallVectorImpl<SDValue> &InVals);
108 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
109 unsigned CallConv, bool isVarArg,
110 const SmallVectorImpl<ISD::InputArg> &Ins,
111 DebugLoc dl, SelectionDAG &DAG,
112 SmallVectorImpl<SDValue> &InVals);
115 LowerFormalArguments(SDValue Chain,
116 unsigned CallConv, bool isVarArg,
117 const SmallVectorImpl<ISD::InputArg> &Ins,
118 DebugLoc dl, SelectionDAG &DAG,
119 SmallVectorImpl<SDValue> &InVals);
121 LowerCall(SDValue Chain, SDValue Callee,
122 unsigned CallConv, bool isVarArg, bool isTailCall,
123 const SmallVectorImpl<ISD::OutputArg> &Outs,
124 const SmallVectorImpl<ISD::InputArg> &Ins,
125 DebugLoc dl, SelectionDAG &DAG,
126 SmallVectorImpl<SDValue> &InVals);
129 LowerReturn(SDValue Chain,
130 unsigned CallConv, bool isVarArg,
131 const SmallVectorImpl<ISD::OutputArg> &Outs,
132 DebugLoc dl, SelectionDAG &DAG);
134 const SystemZSubtarget &Subtarget;
135 const SystemZTargetMachine &TM;
136 const SystemZRegisterInfo *RegInfo;
140 #endif // LLVM_TARGET_SystemZ_ISELLOWERING_H