1 //===- SystemZInstrFormats.td - SystemZ Instruction Formats ----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 class InstSystemZ<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction {
11 let Namespace = "SystemZ";
13 dag OutOperandList = outs;
14 dag InOperandList = ins;
15 let AsmString = asmstr;
16 let Pattern = pattern;
19 //===----------------------------------------------------------------------===//
21 //===----------------------------------------------------------------------===//
23 class F_E<bits<16> opcode,
24 dag outs, dag ins, string asmstr, list<dag> pattern>
25 : InstSystemZ<outs, ins, asmstr, pattern> {
29 let Inst{15-0} = opcode;
32 //===----------------------------------------------------------------------===//
34 //===----------------------------------------------------------------------===//
36 class F_I<bits<16> opcode,
37 dag outs, dag ins, string asmstr, list<dag> pattern>
38 : InstSystemZ<outs, ins, asmstr, pattern> {
42 let Inst{47-32} = opcode;
43 //let Inst{31-0} = simm32;
46 //===----------------------------------------------------------------------===//
48 //===----------------------------------------------------------------------===//
50 class F_RR<bits<8> opcode,
51 dag outs, dag ins, string asmstr, list<dag> pattern>
52 : InstSystemZ<outs, ins, asmstr, pattern> {
56 let Inst{15-8} = opcode;
59 //===----------------------------------------------------------------------===//
61 //===----------------------------------------------------------------------===//
63 class F_RRE<bits<16> opcode,
64 dag outs, dag ins, string asmstr, list<dag> pattern>
65 : InstSystemZ<outs, ins, asmstr, pattern> {
69 let Inst{31-16} = opcode;
75 //===----------------------------------------------------------------------===//
77 //===----------------------------------------------------------------------===//
79 class F_RRF_1<bits<16> opcode,
80 dag outs, dag ins, string asmstr, list<dag> pattern>
81 : InstSystemZ<outs, ins, asmstr, pattern> {
85 let Inst{31-16} = opcode;
86 //let Inst{15-12} = r1;
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 class F_RRF_2<bits<16> opcode,
97 dag outs, dag ins, string asmstr, list<dag> pattern>
98 : InstSystemZ<outs, ins, asmstr, pattern> {
102 let Inst{31-16} = opcode;
103 //let Inst{15-12} = m3;
105 //let Inst{7-4} = r1;
106 //let Inst{3-0} = r2;
109 //===----------------------------------------------------------------------===//
111 //===----------------------------------------------------------------------===//
113 class F_RRF_3<bits<16> opcode,
114 dag outs, dag ins, string asmstr, list<dag> pattern>
115 : InstSystemZ<outs, ins, asmstr, pattern> {
119 let Inst{31-16} = opcode;
120 //let Inst{15-12} = r3;
121 //let Inst{11-8} = m4;
122 //let Inst{7-4} = r1;
123 //let Inst{3-0} = r2;
126 //===----------------------------------------------------------------------===//
128 //===----------------------------------------------------------------------===//
130 class F_RX<bits<8> opcode,
131 dag outs, dag ins, string asmstr, list<dag> pattern>
132 : InstSystemZ<outs, ins, asmstr, pattern> {
136 let Inst{31-24} = opcode;
137 //let Inst{23-20} = r1;
138 //let Inst{19-16} = x2;
139 //let Inst{15-12} = b2;
140 //let Inst{11-0} = udisp12;
143 //===----------------------------------------------------------------------===//
145 //===----------------------------------------------------------------------===//
147 class F_RXE<bits<8> opcode,
148 dag outs, dag ins, string asmstr, list<dag> pattern>
149 : InstSystemZ<outs, ins, asmstr, pattern> {
153 let Inst{47-40} = opcode;
154 //let Inst{39-36} = r1;
155 //let Inst{35-32} = x2;
156 //let Inst{31-28} = b2;
157 //let Inst{27-16} = udisp12;
159 //let Inst{7-0} = op2;
162 //===----------------------------------------------------------------------===//
164 //===----------------------------------------------------------------------===//
166 class F_RXF<bits<8> opcode,
167 dag outs, dag ins, string asmstr, list<dag> pattern>
168 : InstSystemZ<outs, ins, asmstr, pattern> {
172 let Inst{47-40} = opcode;
173 //let Inst{39-36} = r3;
174 //let Inst{35-32} = x2;
175 //let Inst{31-28} = b2;
176 //let Inst{27-16} = udisp12;
177 //let Inst{15-11} = r1;
179 //let Inst{7-0} = op2;
182 //===----------------------------------------------------------------------===//
184 //===----------------------------------------------------------------------===//
186 class F_RXY<bits<8> opcode,
187 dag outs, dag ins, string asmstr, list<dag> pattern>
188 : InstSystemZ<outs, ins, asmstr, pattern> {
192 let Inst{47-40} = opcode;
193 //let Inst{39-36} = r1;
194 //let Inst{35-32} = x2;
195 //let Inst{31-28} = b2;
196 //let Inst{27-8} = sdisp20;
197 //let Inst{7-0} = op2;
200 //===----------------------------------------------------------------------===//
202 //===----------------------------------------------------------------------===//
204 class F_RS_1<bits<8> opcode,
205 dag outs, dag ins, string asmstr, list<dag> pattern>
206 : InstSystemZ<outs, ins, asmstr, pattern> {
210 let Inst{31-24} = opcode;
211 //let Inst{23-20} = r1;
212 //let Inst{19-16} = r3;
213 //let Inst{15-12} = b2;
214 //let Inst{11-0} = udisp12;
217 //===----------------------------------------------------------------------===//
219 //===----------------------------------------------------------------------===//
221 class F_RS_2<bits<8> opcode,
222 dag outs, dag ins, string asmstr, list<dag> pattern>
223 : InstSystemZ<outs, ins, asmstr, pattern> {
227 let Inst{31-24} = opcode;
228 //let Inst{23-20} = r1;
229 //let Inst{19-16} = m3;
230 //let Inst{15-12} = b2;
231 //let Inst{11-0} = udisp12;
234 //===----------------------------------------------------------------------===//
236 //===----------------------------------------------------------------------===//
238 class F_RS_3<bits<8> opcode,
239 dag outs, dag ins, string asmstr, list<dag> pattern>
240 : InstSystemZ<outs, ins, asmstr, pattern> {
244 let Inst{31-24} = opcode;
245 //let Inst{23-20} = r1;
247 //let Inst{15-12} = b2;
248 //let Inst{11-0} = udisp12;
251 //===----------------------------------------------------------------------===//
253 //===----------------------------------------------------------------------===//
255 class F_RSY_1<bits<8> opcode,
256 dag outs, dag ins, string asmstr, list<dag> pattern>
257 : InstSystemZ<outs, ins, asmstr, pattern> {
261 let Inst{47-40} = opcode;
262 //let Inst{39-36} = r1;
263 //let Inst{35-32} = r3;
264 //let Inst{31-28} = b2;
265 //let Inst{27-8} = sdisp20;
266 //let Inst{7-0} = op2;
269 //===----------------------------------------------------------------------===//
271 //===----------------------------------------------------------------------===//
273 class F_RSY_2<bits<8> opcode,
274 dag outs, dag ins, string asmstr, list<dag> pattern>
275 : InstSystemZ<outs, ins, asmstr, pattern> {
279 let Inst{47-40} = opcode;
280 //let Inst{39-36} = r1;
281 //let Inst{35-32} = m3;
282 //let Inst{31-28} = b2;
283 //let Inst{27-8} = sdisp20;
284 //let Inst{7-0} = op2;
287 //===----------------------------------------------------------------------===//
289 //===----------------------------------------------------------------------===//
291 class F_RSL<bits<8> opcode,
292 dag outs, dag ins, string asmstr, list<dag> pattern>
293 : InstSystemZ<outs, ins, asmstr, pattern> {
297 let Inst{47-40} = opcode;
298 //let Inst{39-36} = ll;
300 //let Inst{31-28} = b1;
301 //let Inst{27-16} = udisp12;
303 //let Inst{7-0} = op2;
306 //===----------------------------------------------------------------------===//
308 //===----------------------------------------------------------------------===//
310 class F_RSI<bits<8> opcode,
311 dag outs, dag ins, string asmstr, list<dag> pattern>
312 : InstSystemZ<outs, ins, asmstr, pattern> {
316 let Inst{31-24} = opcode;
317 //let Inst{23-20} = r1;
318 //let Inst{19-16} = r3;
319 //let Inst{15-0} = simm16;
322 //===----------------------------------------------------------------------===//
324 //===----------------------------------------------------------------------===//
326 class F_RI<bits<8> opcode,
327 dag outs, dag ins, string asmstr, list<dag> pattern>
328 : InstSystemZ<outs, ins, asmstr, pattern> {
332 let Inst{31-24} = opcode;
333 //let Inst{23-20} = r1;
334 //let Inst{19-16} = op2;
335 //let Inst{15-0} = simm16;
338 //===----------------------------------------------------------------------===//
340 //===----------------------------------------------------------------------===//
342 class F_RIE<bits<8> opcode,
343 dag outs, dag ins, string asmstr, list<dag> pattern>
344 : InstSystemZ<outs, ins, asmstr, pattern> {
348 let Inst{47-40} = opcode;
349 //let Inst{39-36} = r1;
350 //let Inst{35-32} = r2;
351 //let Inst{31-16} = simm16;
353 //let Inst{7-0} = op2;
356 //===----------------------------------------------------------------------===//
358 //===----------------------------------------------------------------------===//
360 class F_RIL_1<bits<8> opcode,
361 dag outs, dag ins, string asmstr, list<dag> pattern>
362 : InstSystemZ<outs, ins, asmstr, pattern> {
366 let Inst{47-40} = opcode;
367 //let Inst{39-36} = r1;
368 //let Inst{35-32} = op2;
369 //let Inst{31-0} = simm32;
372 //===----------------------------------------------------------------------===//
374 //===----------------------------------------------------------------------===//
376 class F_RIL_2<bits<8> opcode,
377 dag outs, dag ins, string asmstr, list<dag> pattern>
378 : InstSystemZ<outs, ins, asmstr, pattern> {
382 let Inst{47-40} = opcode;
383 //let Inst{39-36} = m1;
384 //let Inst{35-32} = op2;
385 //let Inst{31-0} = simm32;
388 //===----------------------------------------------------------------------===//
390 //===----------------------------------------------------------------------===//
392 class F_SI<bits<8> opcode,
393 dag outs, dag ins, string asmstr, list<dag> pattern>
394 : InstSystemZ<outs, ins, asmstr, pattern> {
398 let Inst{31-24} = opcode;
399 //let Inst{23-16} = simm8;
400 //let Inst{15-12} = b1;
401 //let Inst{11-0} = udisp12;
404 //===----------------------------------------------------------------------===//
406 //===----------------------------------------------------------------------===//
408 class F_SIY<bits<8> opcode,
409 dag outs, dag ins, string asmstr, list<dag> pattern>
410 : InstSystemZ<outs, ins, asmstr, pattern> {
414 let Inst{47-40} = opcode;
415 //let Inst{39-32} = simm8;
416 //let Inst{31-28} = b1;
417 //let Inst{27-8} = sdisp20;
418 //let Inst{7-0} = op2;
421 //===----------------------------------------------------------------------===//
423 //===----------------------------------------------------------------------===//
425 class F_S<bits<16> opcode,
426 dag outs, dag ins, string asmstr, list<dag> pattern>
427 : InstSystemZ<outs, ins, asmstr, pattern> {
431 let Inst{31-16} = opcode;
432 //let Inst{15-12} = b2;
433 //let Inst{11-0} = udisp12;
436 //===----------------------------------------------------------------------===//
438 //===----------------------------------------------------------------------===//
440 class F_SS_1<bits<8> opcode,
441 dag outs, dag ins, string asmstr, list<dag> pattern>
442 : InstSystemZ<outs, ins, asmstr, pattern> {
446 let Inst{47-40} = opcode;
447 //let Inst{39-32} = ll;
448 //let Inst{31-28} = b1;
449 //let Inst{27-16} = udisp12;
450 //let Inst{15-12} = b2;
451 //let Inst{11-0} = udisp12_2;
454 //===----------------------------------------------------------------------===//
456 //===----------------------------------------------------------------------===//
458 class F_SS_2<bits<8> opcode,
459 dag outs, dag ins, string asmstr, list<dag> pattern>
460 : InstSystemZ<outs, ins, asmstr, pattern> {
464 let Inst{47-40} = opcode;
465 //let Inst{39-36} = l1;
466 //let Inst{35-32} = l2;
467 //let Inst{31-28} = b1;
468 //let Inst{27-16} = udisp12;
469 //let Inst{15-12} = b2;
470 //let Inst{11-0} = udisp12_2;
473 //===----------------------------------------------------------------------===//
475 //===----------------------------------------------------------------------===//
477 class F_SS_3<bits<8> opcode,
478 dag outs, dag ins, string asmstr, list<dag> pattern>
479 : InstSystemZ<outs, ins, asmstr, pattern> {
483 let Inst{47-40} = opcode;
484 //let Inst{39-36} = r1;
485 //let Inst{35-32} = r3;
486 //let Inst{31-28} = b1;
487 //let Inst{27-16} = udisp12;
488 //let Inst{15-12} = b2;
489 //let Inst{11-0} = udisp12_2;
492 //===----------------------------------------------------------------------===//
494 //===----------------------------------------------------------------------===//
496 class F_SS_4<bits<8> opcode,
497 dag outs, dag ins, string asmstr, list<dag> pattern>
498 : InstSystemZ<outs, ins, asmstr, pattern> {
502 let Inst{47-40} = opcode;
503 //let Inst{39-36} = r1;
504 //let Inst{35-32} = r3;
505 //let Inst{31-28} = b2;
506 //let Inst{27-16} = udisp12_2;
507 //let Inst{15-12} = b4;
508 //let Inst{11-0} = udisp12_4;
511 //===----------------------------------------------------------------------===//
513 //===----------------------------------------------------------------------===//
515 class F_SSE<bits<16> opcode,
516 dag outs, dag ins, string asmstr, list<dag> pattern>
517 : InstSystemZ<outs, ins, asmstr, pattern> {
521 let Inst{47-32} = opcode;
522 //let Inst{31-28} = b1;
523 //let Inst{27-16} = udisp12;
524 //let Inst{15-12} = b2;
525 //let Inst{11-0} = udisp12_2;
528 //===----------------------------------------------------------------------===//
529 // Pseudo instructions
530 //===----------------------------------------------------------------------===//
532 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
533 : InstSystemZ<outs, ins, asmstr, pattern> {