1 //===-- SystemZLongBranch.cpp - Branch lengthening for SystemZ ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass makes sure that all branches are in range. There are several ways
11 // in which this could be done. One aggressive approach is to assume that all
12 // branches are in range and successively replace those that turn out not
13 // to be in range with a longer form (branch relaxation). A simple
14 // implementation is to continually walk through the function relaxing
15 // branches until no more changes are needed and a fixed point is reached.
16 // However, in the pathological worst case, this implementation is
17 // quadratic in the number of blocks; relaxing branch N can make branch N-1
18 // go out of range, which in turn can make branch N-2 go out of range,
21 // An alternative approach is to assume that all branches must be
22 // converted to their long forms, then reinstate the short forms of
23 // branches that, even under this pessimistic assumption, turn out to be
24 // in range (branch shortening). This too can be implemented as a function
25 // walk that is repeated until a fixed point is reached. In general,
26 // the result of shortening is not as good as that of relaxation, and
27 // shortening is also quadratic in the worst case; shortening branch N
28 // can bring branch N-1 in range of the short form, which in turn can do
29 // the same for branch N-2, and so on. The main advantage of shortening
30 // is that each walk through the function produces valid code, so it is
31 // possible to stop at any point after the first walk. The quadraticness
32 // could therefore be handled with a maximum pass count, although the
33 // question then becomes: what maximum count should be used?
35 // On SystemZ, long branches are only needed for functions bigger than 64k,
36 // which are relatively rare to begin with, and the long branch sequences
37 // are actually relatively cheap. It therefore doesn't seem worth spending
38 // much compilation time on the problem. Instead, the approach we take is:
40 // (1) Work out the address that each block would have if no branches
41 // need relaxing. Exit the pass early if all branches are in range
42 // according to this assumption.
44 // (2) Work out the address that each block would have if all branches
47 // (3) Walk through the block calculating the final address of each instruction
48 // and relaxing those that need to be relaxed. For backward branches,
49 // this check uses the final address of the target block, as calculated
50 // earlier in the walk. For forward branches, this check uses the
51 // address of the target block that was calculated in (2). Both checks
52 // give a conservatively-correct range.
54 //===----------------------------------------------------------------------===//
56 #define DEBUG_TYPE "systemz-long-branch"
58 #include "SystemZTargetMachine.h"
59 #include "llvm/ADT/Statistic.h"
60 #include "llvm/CodeGen/MachineFunctionPass.h"
61 #include "llvm/CodeGen/MachineInstrBuilder.h"
62 #include "llvm/IR/Function.h"
63 #include "llvm/Support/CommandLine.h"
64 #include "llvm/Support/MathExtras.h"
65 #include "llvm/Target/TargetInstrInfo.h"
66 #include "llvm/Target/TargetMachine.h"
67 #include "llvm/Target/TargetRegisterInfo.h"
71 STATISTIC(LongBranches, "Number of long branches.");
74 typedef MachineBasicBlock::iterator Iter;
76 // Represents positional information about a basic block.
78 // The address that we currently assume the block has.
81 // The size of the block in bytes, excluding terminators.
82 // This value never changes.
85 // The minimum alignment of the block, as a log2 value.
86 // This value never changes.
89 // The number of terminators in this block. This value never changes.
90 unsigned NumTerminators;
93 : Address(0), Size(0), Alignment(0), NumTerminators(0) {}
96 // Represents the state of a block terminator.
97 struct TerminatorInfo {
98 // If this terminator is a relaxable branch, this points to the branch
99 // instruction, otherwise it is null.
100 MachineInstr *Branch;
102 // The address that we currently assume the terminator has.
105 // The current size of the terminator in bytes.
108 // If Branch is nonnull, this is the number of the target block,
109 // otherwise it is unused.
110 unsigned TargetBlock;
112 // If Branch is nonnull, this is the length of the longest relaxed form,
113 // otherwise it is zero.
114 unsigned ExtraRelaxSize;
116 TerminatorInfo() : Branch(0), Size(0), TargetBlock(0), ExtraRelaxSize(0) {}
119 // Used to keep track of the current position while iterating over the blocks.
120 struct BlockPosition {
121 // The address that we assume this position has.
124 // The number of low bits in Address that are known to be the same
125 // as the runtime address.
128 BlockPosition(unsigned InitialAlignment)
129 : Address(0), KnownBits(InitialAlignment) {}
132 class SystemZLongBranch : public MachineFunctionPass {
135 SystemZLongBranch(const SystemZTargetMachine &tm)
136 : MachineFunctionPass(ID),
137 TII(static_cast<const SystemZInstrInfo *>(tm.getInstrInfo())) {}
139 virtual const char *getPassName() const {
140 return "SystemZ Long Branch";
143 bool runOnMachineFunction(MachineFunction &F);
146 void skipNonTerminators(BlockPosition &Position, MBBInfo &Block);
147 void skipTerminator(BlockPosition &Position, TerminatorInfo &Terminator,
149 TerminatorInfo describeTerminator(MachineInstr *MI);
150 uint64_t initMBBInfo();
151 bool mustRelaxBranch(const TerminatorInfo &Terminator, uint64_t Address);
152 bool mustRelaxABranch();
153 void setWorstCaseAddresses();
154 void splitCompareBranch(MachineInstr *MI, unsigned CompareOpcode);
155 void relaxBranch(TerminatorInfo &Terminator);
156 void relaxBranches();
158 const SystemZInstrInfo *TII;
160 SmallVector<MBBInfo, 16> MBBs;
161 SmallVector<TerminatorInfo, 16> Terminators;
164 char SystemZLongBranch::ID = 0;
166 const uint64_t MaxBackwardRange = 0x10000;
167 const uint64_t MaxForwardRange = 0xfffe;
168 } // end of anonymous namespace
170 FunctionPass *llvm::createSystemZLongBranchPass(SystemZTargetMachine &TM) {
171 return new SystemZLongBranch(TM);
174 // Position describes the state immediately before Block. Update Block
175 // accordingly and move Position to the end of the block's non-terminator
177 void SystemZLongBranch::skipNonTerminators(BlockPosition &Position,
179 if (Block.Alignment > Position.KnownBits) {
180 // When calculating the address of Block, we need to conservatively
181 // assume that Block had the worst possible misalignment.
182 Position.Address += ((uint64_t(1) << Block.Alignment) -
183 (uint64_t(1) << Position.KnownBits));
184 Position.KnownBits = Block.Alignment;
187 // Align the addresses.
188 uint64_t AlignMask = (uint64_t(1) << Block.Alignment) - 1;
189 Position.Address = (Position.Address + AlignMask) & ~AlignMask;
191 // Record the block's position.
192 Block.Address = Position.Address;
194 // Move past the non-terminators in the block.
195 Position.Address += Block.Size;
198 // Position describes the state immediately before Terminator.
199 // Update Terminator accordingly and move Position past it.
200 // Assume that Terminator will be relaxed if AssumeRelaxed.
201 void SystemZLongBranch::skipTerminator(BlockPosition &Position,
202 TerminatorInfo &Terminator,
203 bool AssumeRelaxed) {
204 Terminator.Address = Position.Address;
205 Position.Address += Terminator.Size;
207 Position.Address += Terminator.ExtraRelaxSize;
210 // Return a description of terminator instruction MI.
211 TerminatorInfo SystemZLongBranch::describeTerminator(MachineInstr *MI) {
212 TerminatorInfo Terminator;
213 Terminator.Size = TII->getInstSizeInBytes(MI);
214 if (MI->isConditionalBranch() || MI->isUnconditionalBranch()) {
215 switch (MI->getOpcode()) {
217 // Relaxes to JG, which is 2 bytes longer.
218 Terminator.ExtraRelaxSize = 2;
221 // Relaxes to BRCL, which is 2 bytes longer.
222 Terminator.ExtraRelaxSize = 2;
225 // Relaxes to a CR/BRCL sequence, which is 2 bytes longer.
226 Terminator.ExtraRelaxSize = 2;
229 // Relaxes to a CGR/BRCL sequence, which is 4 bytes longer.
230 Terminator.ExtraRelaxSize = 4;
234 // Relaxes to a C(G)HI/BRCL sequence, which is 4 bytes longer.
235 Terminator.ExtraRelaxSize = 4;
238 llvm_unreachable("Unrecognized branch instruction");
240 Terminator.Branch = MI;
241 Terminator.TargetBlock =
242 TII->getBranchInfo(MI).Target->getMBB()->getNumber();
247 // Fill MBBs and Terminators, setting the addresses on the assumption
248 // that no branches need relaxation. Return the size of the function under
250 uint64_t SystemZLongBranch::initMBBInfo() {
251 MF->RenumberBlocks();
252 unsigned NumBlocks = MF->size();
255 MBBs.resize(NumBlocks);
258 Terminators.reserve(NumBlocks);
260 BlockPosition Position(MF->getAlignment());
261 for (unsigned I = 0; I < NumBlocks; ++I) {
262 MachineBasicBlock *MBB = MF->getBlockNumbered(I);
263 MBBInfo &Block = MBBs[I];
265 // Record the alignment, for quick access.
266 Block.Alignment = MBB->getAlignment();
268 // Calculate the size of the fixed part of the block.
269 MachineBasicBlock::iterator MI = MBB->begin();
270 MachineBasicBlock::iterator End = MBB->end();
271 while (MI != End && !MI->isTerminator()) {
272 Block.Size += TII->getInstSizeInBytes(MI);
275 skipNonTerminators(Position, Block);
277 // Add the terminators.
279 if (!MI->isDebugValue()) {
280 assert(MI->isTerminator() && "Terminator followed by non-terminator");
281 Terminators.push_back(describeTerminator(MI));
282 skipTerminator(Position, Terminators.back(), false);
283 ++Block.NumTerminators;
289 return Position.Address;
292 // Return true if, under current assumptions, Terminator would need to be
293 // relaxed if it were placed at address Address.
294 bool SystemZLongBranch::mustRelaxBranch(const TerminatorInfo &Terminator,
296 if (!Terminator.Branch)
299 const MBBInfo &Target = MBBs[Terminator.TargetBlock];
300 if (Address >= Target.Address) {
301 if (Address - Target.Address <= MaxBackwardRange)
304 if (Target.Address - Address <= MaxForwardRange)
311 // Return true if, under current assumptions, any terminator needs
313 bool SystemZLongBranch::mustRelaxABranch() {
314 for (SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin(),
315 TE = Terminators.end(); TI != TE; ++TI)
316 if (mustRelaxBranch(*TI, TI->Address))
321 // Set the address of each block on the assumption that all branches
323 void SystemZLongBranch::setWorstCaseAddresses() {
324 SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin();
325 BlockPosition Position(MF->getAlignment());
326 for (SmallVector<MBBInfo, 16>::iterator BI = MBBs.begin(), BE = MBBs.end();
328 skipNonTerminators(Position, *BI);
329 for (unsigned BTI = 0, BTE = BI->NumTerminators; BTI != BTE; ++BTI) {
330 skipTerminator(Position, *TI, true);
336 // Split MI into the comparison given by CompareOpcode followed
337 // a BRCL on the result.
338 void SystemZLongBranch::splitCompareBranch(MachineInstr *MI,
339 unsigned CompareOpcode) {
340 MachineBasicBlock *MBB = MI->getParent();
341 DebugLoc DL = MI->getDebugLoc();
342 BuildMI(*MBB, MI, DL, TII->get(CompareOpcode))
343 .addOperand(MI->getOperand(0))
344 .addOperand(MI->getOperand(1));
345 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
346 .addOperand(MI->getOperand(2))
347 .addOperand(MI->getOperand(3));
348 // The implicit use of CC is a killing use.
349 BRCL->getOperand(2).setIsKill();
350 MI->eraseFromParent();
353 // Relax the branch described by Terminator.
354 void SystemZLongBranch::relaxBranch(TerminatorInfo &Terminator) {
355 MachineInstr *Branch = Terminator.Branch;
356 switch (Branch->getOpcode()) {
358 Branch->setDesc(TII->get(SystemZ::JG));
361 Branch->setDesc(TII->get(SystemZ::BRCL));
364 splitCompareBranch(Branch, SystemZ::CR);
367 splitCompareBranch(Branch, SystemZ::CGR);
370 splitCompareBranch(Branch, SystemZ::CHI);
373 splitCompareBranch(Branch, SystemZ::CGHI);
376 llvm_unreachable("Unrecognized branch");
379 Terminator.Size += Terminator.ExtraRelaxSize;
380 Terminator.ExtraRelaxSize = 0;
381 Terminator.Branch = 0;
386 // Run a shortening pass and relax any branches that need to be relaxed.
387 void SystemZLongBranch::relaxBranches() {
388 SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin();
389 BlockPosition Position(MF->getAlignment());
390 for (SmallVector<MBBInfo, 16>::iterator BI = MBBs.begin(), BE = MBBs.end();
392 skipNonTerminators(Position, *BI);
393 for (unsigned BTI = 0, BTE = BI->NumTerminators; BTI != BTE; ++BTI) {
394 assert(Position.Address <= TI->Address &&
395 "Addresses shouldn't go forwards");
396 if (mustRelaxBranch(*TI, Position.Address))
398 skipTerminator(Position, *TI, false);
404 bool SystemZLongBranch::runOnMachineFunction(MachineFunction &F) {
406 uint64_t Size = initMBBInfo();
407 if (Size <= MaxForwardRange || !mustRelaxABranch())
410 setWorstCaseAddresses();