1 //===-- SystemZLongBranch.cpp - Branch lengthening for SystemZ ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass makes sure that all branches are in range. There are several ways
11 // in which this could be done. One aggressive approach is to assume that all
12 // branches are in range and successively replace those that turn out not
13 // to be in range with a longer form (branch relaxation). A simple
14 // implementation is to continually walk through the function relaxing
15 // branches until no more changes are needed and a fixed point is reached.
16 // However, in the pathological worst case, this implementation is
17 // quadratic in the number of blocks; relaxing branch N can make branch N-1
18 // go out of range, which in turn can make branch N-2 go out of range,
21 // An alternative approach is to assume that all branches must be
22 // converted to their long forms, then reinstate the short forms of
23 // branches that, even under this pessimistic assumption, turn out to be
24 // in range (branch shortening). This too can be implemented as a function
25 // walk that is repeated until a fixed point is reached. In general,
26 // the result of shortening is not as good as that of relaxation, and
27 // shortening is also quadratic in the worst case; shortening branch N
28 // can bring branch N-1 in range of the short form, which in turn can do
29 // the same for branch N-2, and so on. The main advantage of shortening
30 // is that each walk through the function produces valid code, so it is
31 // possible to stop at any point after the first walk. The quadraticness
32 // could therefore be handled with a maximum pass count, although the
33 // question then becomes: what maximum count should be used?
35 // On SystemZ, long branches are only needed for functions bigger than 64k,
36 // which are relatively rare to begin with, and the long branch sequences
37 // are actually relatively cheap. It therefore doesn't seem worth spending
38 // much compilation time on the problem. Instead, the approach we take is:
40 // (1) Work out the address that each block would have if no branches
41 // need relaxing. Exit the pass early if all branches are in range
42 // according to this assumption.
44 // (2) Work out the address that each block would have if all branches
47 // (3) Walk through the block calculating the final address of each instruction
48 // and relaxing those that need to be relaxed. For backward branches,
49 // this check uses the final address of the target block, as calculated
50 // earlier in the walk. For forward branches, this check uses the
51 // address of the target block that was calculated in (2). Both checks
52 // give a conservatively-correct range.
54 //===----------------------------------------------------------------------===//
56 #define DEBUG_TYPE "systemz-long-branch"
58 #include "SystemZTargetMachine.h"
59 #include "llvm/ADT/Statistic.h"
60 #include "llvm/CodeGen/MachineFunctionPass.h"
61 #include "llvm/CodeGen/MachineInstrBuilder.h"
62 #include "llvm/IR/Function.h"
63 #include "llvm/Support/CommandLine.h"
64 #include "llvm/Support/MathExtras.h"
65 #include "llvm/Target/TargetInstrInfo.h"
66 #include "llvm/Target/TargetMachine.h"
67 #include "llvm/Target/TargetRegisterInfo.h"
71 STATISTIC(LongBranches, "Number of long branches.");
74 typedef MachineBasicBlock::iterator Iter;
76 // Represents positional information about a basic block.
78 // The address that we currently assume the block has.
81 // The size of the block in bytes, excluding terminators.
82 // This value never changes.
85 // The minimum alignment of the block, as a log2 value.
86 // This value never changes.
89 // The number of terminators in this block. This value never changes.
90 unsigned NumTerminators;
93 : Address(0), Size(0), Alignment(0), NumTerminators(0) {}
96 // Represents the state of a block terminator.
97 struct TerminatorInfo {
98 // If this terminator is a relaxable branch, this points to the branch
99 // instruction, otherwise it is null.
100 MachineInstr *Branch;
102 // The address that we currently assume the terminator has.
105 // The current size of the terminator in bytes.
108 // If Branch is nonnull, this is the number of the target block,
109 // otherwise it is unused.
110 unsigned TargetBlock;
112 // If Branch is nonnull, this is the length of the longest relaxed form,
113 // otherwise it is zero.
114 unsigned ExtraRelaxSize;
116 TerminatorInfo() : Branch(0), Size(0), TargetBlock(0), ExtraRelaxSize(0) {}
119 // Used to keep track of the current position while iterating over the blocks.
120 struct BlockPosition {
121 // The address that we assume this position has.
124 // The number of low bits in Address that are known to be the same
125 // as the runtime address.
128 BlockPosition(unsigned InitialAlignment)
129 : Address(0), KnownBits(InitialAlignment) {}
132 class SystemZLongBranch : public MachineFunctionPass {
135 SystemZLongBranch(const SystemZTargetMachine &tm)
136 : MachineFunctionPass(ID), TII(0) {}
138 virtual const char *getPassName() const {
139 return "SystemZ Long Branch";
142 bool runOnMachineFunction(MachineFunction &F);
145 void skipNonTerminators(BlockPosition &Position, MBBInfo &Block);
146 void skipTerminator(BlockPosition &Position, TerminatorInfo &Terminator,
148 TerminatorInfo describeTerminator(MachineInstr *MI);
149 uint64_t initMBBInfo();
150 bool mustRelaxBranch(const TerminatorInfo &Terminator, uint64_t Address);
151 bool mustRelaxABranch();
152 void setWorstCaseAddresses();
153 void splitCompareBranch(MachineInstr *MI, unsigned CompareOpcode);
154 void relaxBranch(TerminatorInfo &Terminator);
155 void relaxBranches();
157 const SystemZInstrInfo *TII;
159 SmallVector<MBBInfo, 16> MBBs;
160 SmallVector<TerminatorInfo, 16> Terminators;
163 char SystemZLongBranch::ID = 0;
165 const uint64_t MaxBackwardRange = 0x10000;
166 const uint64_t MaxForwardRange = 0xfffe;
167 } // end of anonymous namespace
169 FunctionPass *llvm::createSystemZLongBranchPass(SystemZTargetMachine &TM) {
170 return new SystemZLongBranch(TM);
173 // Position describes the state immediately before Block. Update Block
174 // accordingly and move Position to the end of the block's non-terminator
176 void SystemZLongBranch::skipNonTerminators(BlockPosition &Position,
178 if (Block.Alignment > Position.KnownBits) {
179 // When calculating the address of Block, we need to conservatively
180 // assume that Block had the worst possible misalignment.
181 Position.Address += ((uint64_t(1) << Block.Alignment) -
182 (uint64_t(1) << Position.KnownBits));
183 Position.KnownBits = Block.Alignment;
186 // Align the addresses.
187 uint64_t AlignMask = (uint64_t(1) << Block.Alignment) - 1;
188 Position.Address = (Position.Address + AlignMask) & ~AlignMask;
190 // Record the block's position.
191 Block.Address = Position.Address;
193 // Move past the non-terminators in the block.
194 Position.Address += Block.Size;
197 // Position describes the state immediately before Terminator.
198 // Update Terminator accordingly and move Position past it.
199 // Assume that Terminator will be relaxed if AssumeRelaxed.
200 void SystemZLongBranch::skipTerminator(BlockPosition &Position,
201 TerminatorInfo &Terminator,
202 bool AssumeRelaxed) {
203 Terminator.Address = Position.Address;
204 Position.Address += Terminator.Size;
206 Position.Address += Terminator.ExtraRelaxSize;
209 // Return a description of terminator instruction MI.
210 TerminatorInfo SystemZLongBranch::describeTerminator(MachineInstr *MI) {
211 TerminatorInfo Terminator;
212 Terminator.Size = TII->getInstSizeInBytes(MI);
213 if (MI->isConditionalBranch() || MI->isUnconditionalBranch()) {
214 switch (MI->getOpcode()) {
216 // Relaxes to JG, which is 2 bytes longer.
217 Terminator.ExtraRelaxSize = 2;
220 // Relaxes to BRCL, which is 2 bytes longer.
221 Terminator.ExtraRelaxSize = 2;
224 // Relaxes to a CR/BRCL sequence, which is 2 bytes longer.
225 Terminator.ExtraRelaxSize = 2;
228 // Relaxes to a CGR/BRCL sequence, which is 4 bytes longer.
229 Terminator.ExtraRelaxSize = 4;
233 // Relaxes to a C(G)HI/BRCL sequence, which is 4 bytes longer.
234 Terminator.ExtraRelaxSize = 4;
237 llvm_unreachable("Unrecognized branch instruction");
239 Terminator.Branch = MI;
240 Terminator.TargetBlock =
241 TII->getBranchInfo(MI).Target->getMBB()->getNumber();
246 // Fill MBBs and Terminators, setting the addresses on the assumption
247 // that no branches need relaxation. Return the size of the function under
249 uint64_t SystemZLongBranch::initMBBInfo() {
250 MF->RenumberBlocks();
251 unsigned NumBlocks = MF->size();
254 MBBs.resize(NumBlocks);
257 Terminators.reserve(NumBlocks);
259 BlockPosition Position(MF->getAlignment());
260 for (unsigned I = 0; I < NumBlocks; ++I) {
261 MachineBasicBlock *MBB = MF->getBlockNumbered(I);
262 MBBInfo &Block = MBBs[I];
264 // Record the alignment, for quick access.
265 Block.Alignment = MBB->getAlignment();
267 // Calculate the size of the fixed part of the block.
268 MachineBasicBlock::iterator MI = MBB->begin();
269 MachineBasicBlock::iterator End = MBB->end();
270 while (MI != End && !MI->isTerminator()) {
271 Block.Size += TII->getInstSizeInBytes(MI);
274 skipNonTerminators(Position, Block);
276 // Add the terminators.
278 if (!MI->isDebugValue()) {
279 assert(MI->isTerminator() && "Terminator followed by non-terminator");
280 Terminators.push_back(describeTerminator(MI));
281 skipTerminator(Position, Terminators.back(), false);
282 ++Block.NumTerminators;
288 return Position.Address;
291 // Return true if, under current assumptions, Terminator would need to be
292 // relaxed if it were placed at address Address.
293 bool SystemZLongBranch::mustRelaxBranch(const TerminatorInfo &Terminator,
295 if (!Terminator.Branch)
298 const MBBInfo &Target = MBBs[Terminator.TargetBlock];
299 if (Address >= Target.Address) {
300 if (Address - Target.Address <= MaxBackwardRange)
303 if (Target.Address - Address <= MaxForwardRange)
310 // Return true if, under current assumptions, any terminator needs
312 bool SystemZLongBranch::mustRelaxABranch() {
313 for (SmallVectorImpl<TerminatorInfo>::iterator TI = Terminators.begin(),
314 TE = Terminators.end(); TI != TE; ++TI)
315 if (mustRelaxBranch(*TI, TI->Address))
320 // Set the address of each block on the assumption that all branches
322 void SystemZLongBranch::setWorstCaseAddresses() {
323 SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin();
324 BlockPosition Position(MF->getAlignment());
325 for (SmallVectorImpl<MBBInfo>::iterator BI = MBBs.begin(), BE = MBBs.end();
327 skipNonTerminators(Position, *BI);
328 for (unsigned BTI = 0, BTE = BI->NumTerminators; BTI != BTE; ++BTI) {
329 skipTerminator(Position, *TI, true);
335 // Split MI into the comparison given by CompareOpcode followed
336 // a BRCL on the result.
337 void SystemZLongBranch::splitCompareBranch(MachineInstr *MI,
338 unsigned CompareOpcode) {
339 MachineBasicBlock *MBB = MI->getParent();
340 DebugLoc DL = MI->getDebugLoc();
341 BuildMI(*MBB, MI, DL, TII->get(CompareOpcode))
342 .addOperand(MI->getOperand(0))
343 .addOperand(MI->getOperand(1));
344 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
345 .addOperand(MI->getOperand(2))
346 .addOperand(MI->getOperand(3));
347 // The implicit use of CC is a killing use.
348 BRCL->getOperand(2).setIsKill();
349 MI->eraseFromParent();
352 // Relax the branch described by Terminator.
353 void SystemZLongBranch::relaxBranch(TerminatorInfo &Terminator) {
354 MachineInstr *Branch = Terminator.Branch;
355 switch (Branch->getOpcode()) {
357 Branch->setDesc(TII->get(SystemZ::JG));
360 Branch->setDesc(TII->get(SystemZ::BRCL));
363 splitCompareBranch(Branch, SystemZ::CR);
366 splitCompareBranch(Branch, SystemZ::CGR);
369 splitCompareBranch(Branch, SystemZ::CHI);
372 splitCompareBranch(Branch, SystemZ::CGHI);
375 llvm_unreachable("Unrecognized branch");
378 Terminator.Size += Terminator.ExtraRelaxSize;
379 Terminator.ExtraRelaxSize = 0;
380 Terminator.Branch = 0;
385 // Run a shortening pass and relax any branches that need to be relaxed.
386 void SystemZLongBranch::relaxBranches() {
387 SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin();
388 BlockPosition Position(MF->getAlignment());
389 for (SmallVectorImpl<MBBInfo>::iterator BI = MBBs.begin(), BE = MBBs.end();
391 skipNonTerminators(Position, *BI);
392 for (unsigned BTI = 0, BTE = BI->NumTerminators; BTI != BTE; ++BTI) {
393 assert(Position.Address <= TI->Address &&
394 "Addresses shouldn't go forwards");
395 if (mustRelaxBranch(*TI, Position.Address))
397 skipTerminator(Position, *TI, false);
403 bool SystemZLongBranch::runOnMachineFunction(MachineFunction &F) {
404 TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo());
406 uint64_t Size = initMBBInfo();
407 if (Size <= MaxForwardRange || !mustRelaxABranch())
410 setWorstCaseAddresses();