1 //=====- SystemZOperands.td - SystemZ Operands defs ---------*- tblgen-*-=====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the various SystemZ instruction operands.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // Instruction Pattern Stuff.
16 //===----------------------------------------------------------------------===//
18 // SystemZ specific condition code. These correspond to CondCode in
19 // SystemZ.h. They must be kept in synch.
20 def SYSTEMZ_COND_O : PatLeaf<(i8 0)>;
21 def SYSTEMZ_COND_H : PatLeaf<(i8 1)>;
22 def SYSTEMZ_COND_NLE : PatLeaf<(i8 2)>;
23 def SYSTEMZ_COND_L : PatLeaf<(i8 3)>;
24 def SYSTEMZ_COND_NHE : PatLeaf<(i8 4)>;
25 def SYSTEMZ_COND_LH : PatLeaf<(i8 5)>;
26 def SYSTEMZ_COND_NE : PatLeaf<(i8 6)>;
27 def SYSTEMZ_COND_E : PatLeaf<(i8 7)>;
28 def SYSTEMZ_COND_NLH : PatLeaf<(i8 8)>;
29 def SYSTEMZ_COND_HE : PatLeaf<(i8 9)>;
30 def SYSTEMZ_COND_NL : PatLeaf<(i8 10)>;
31 def SYSTEMZ_COND_LE : PatLeaf<(i8 11)>;
32 def SYSTEMZ_COND_NH : PatLeaf<(i8 12)>;
33 def SYSTEMZ_COND_NO : PatLeaf<(i8 13)>;
35 def LL16 : SDNodeXForm<imm, [{
36 // Transformation function: return low 16 bits.
37 return getI16Imm(N->getZExtValue() & 0x000000000000FFFFULL);
40 def LH16 : SDNodeXForm<imm, [{
41 // Transformation function: return bits 16-31.
42 return getI16Imm((N->getZExtValue() & 0x00000000FFFF0000ULL) >> 16);
45 def HL16 : SDNodeXForm<imm, [{
46 // Transformation function: return bits 32-47.
47 return getI16Imm((N->getZExtValue() & 0x0000FFFF00000000ULL) >> 32);
50 def HH16 : SDNodeXForm<imm, [{
51 // Transformation function: return bits 48-63.
52 return getI16Imm((N->getZExtValue() & 0xFFFF000000000000ULL) >> 48);
55 def LO32 : SDNodeXForm<imm, [{
56 // Transformation function: return low 32 bits.
57 return getI32Imm(N->getZExtValue() & 0x00000000FFFFFFFFULL);
60 def HI32 : SDNodeXForm<imm, [{
61 // Transformation function: return bits 32-63.
62 return getI32Imm(N->getZExtValue() >> 32);
65 def i32ll16 : PatLeaf<(i32 imm), [{
66 // i32ll16 predicate - true if the 32-bit immediate has only rightmost 16
68 return ((N->getZExtValue() & 0x000000000000FFFFULL) == N->getZExtValue());
71 def i32lh16 : PatLeaf<(i32 imm), [{
72 // i32lh16 predicate - true if the 32-bit immediate has only bits 16-31 set.
73 return ((N->getZExtValue() & 0x00000000FFFF0000ULL) == N->getZExtValue());
76 def i32ll16c : PatLeaf<(i32 imm), [{
77 // i32ll16c predicate - true if the 32-bit immediate has all bits 16-31 set.
78 return ((N->getZExtValue() | 0x00000000FFFF0000ULL) == N->getZExtValue());
81 def i32lh16c : PatLeaf<(i32 imm), [{
82 // i32lh16c predicate - true if the 32-bit immediate has all rightmost 16
84 return ((N->getZExtValue() | 0x000000000000FFFFULL) == N->getZExtValue());
87 def i64ll16 : PatLeaf<(i64 imm), [{
88 // i64ll16 predicate - true if the 64-bit immediate has only rightmost 16
90 return ((N->getZExtValue() & 0x000000000000FFFFULL) == N->getZExtValue());
93 def i64lh16 : PatLeaf<(i64 imm), [{
94 // i64lh16 predicate - true if the 64-bit immediate has only bits 16-31 set.
95 return ((N->getZExtValue() & 0x00000000FFFF0000ULL) == N->getZExtValue());
98 def i64hl16 : PatLeaf<(i64 imm), [{
99 // i64hl16 predicate - true if the 64-bit immediate has only bits 32-47 set.
100 return ((N->getZExtValue() & 0x0000FFFF00000000ULL) == N->getZExtValue());
103 def i64hh16 : PatLeaf<(i64 imm), [{
104 // i64hh16 predicate - true if the 64-bit immediate has only bits 48-63 set.
105 return ((N->getZExtValue() & 0xFFFF000000000000ULL) == N->getZExtValue());
108 def i64ll16c : PatLeaf<(i64 imm), [{
109 // i64ll16c predicate - true if the 64-bit immediate has only rightmost 16
111 return ((N->getZExtValue() | 0xFFFFFFFFFFFF0000ULL) == N->getZExtValue());
114 def i64lh16c : PatLeaf<(i64 imm), [{
115 // i64lh16c predicate - true if the 64-bit immediate has only bits 16-31 set.
116 return ((N->getZExtValue() | 0xFFFFFFFF0000FFFFULL) == N->getZExtValue());
119 def i64hl16c : PatLeaf<(i64 imm), [{
120 // i64hl16c predicate - true if the 64-bit immediate has only bits 32-47 set.
121 return ((N->getZExtValue() | 0xFFFF0000FFFFFFFFULL) == N->getZExtValue());
124 def i64hh16c : PatLeaf<(i64 imm), [{
125 // i64hh16c predicate - true if the 64-bit immediate has only bits 48-63 set.
126 return ((N->getZExtValue() | 0x0000FFFFFFFFFFFFULL) == N->getZExtValue());
129 def immSExt16 : PatLeaf<(imm), [{
130 // immSExt16 predicate - true if the immediate fits in a 16-bit sign extended
132 if (N->getValueType(0) == MVT::i64) {
133 uint64_t val = N->getZExtValue();
134 return ((int64_t)val == (int16_t)val);
135 } else if (N->getValueType(0) == MVT::i32) {
136 uint32_t val = N->getZExtValue();
137 return ((int32_t)val == (int16_t)val);
143 def immSExt32 : PatLeaf<(i64 imm), [{
144 // immSExt32 predicate - true if the immediate fits in a 32-bit sign extended
146 uint64_t val = N->getZExtValue();
147 return ((int64_t)val == (int32_t)val);
150 def i64lo32 : PatLeaf<(i64 imm), [{
151 // i64lo32 predicate - true if the 64-bit immediate has only rightmost 32
153 return ((N->getZExtValue() & 0x00000000FFFFFFFFULL) == N->getZExtValue());
156 def i64hi32 : PatLeaf<(i64 imm), [{
157 // i64hi32 predicate - true if the 64-bit immediate has only bits 32-63 set.
158 return ((N->getZExtValue() & 0xFFFFFFFF00000000ULL) == N->getZExtValue());
161 def i64lo32c : PatLeaf<(i64 imm), [{
162 // i64lo32 predicate - true if the 64-bit immediate has only rightmost 32
164 return ((N->getZExtValue() | 0xFFFFFFFF00000000ULL) == N->getZExtValue());
167 def i64hi32c : PatLeaf<(i64 imm), [{
168 // i64hi32 predicate - true if the 64-bit immediate has only bits 32-63 set.
169 return ((N->getZExtValue() | 0x00000000FFFFFFFFULL) == N->getZExtValue());
172 def i32immSExt8 : PatLeaf<(i32 imm), [{
173 // i32immSExt8 predicate - True if the 32-bit immediate fits in a 8-bit
174 // sign extended field.
175 return (int32_t)N->getZExtValue() == (int8_t)N->getZExtValue();
178 def i32immSExt16 : PatLeaf<(i32 imm), [{
179 // i32immSExt16 predicate - True if the 32-bit immediate fits in a 16-bit
180 // sign extended field.
181 return (int32_t)N->getZExtValue() == (int16_t)N->getZExtValue();
184 def i64immSExt32 : PatLeaf<(i64 imm), [{
185 // i64immSExt32 predicate - True if the 64-bit immediate fits in a 32-bit
186 // sign extended field.
187 return (int64_t)N->getZExtValue() == (int32_t)N->getZExtValue();
190 def i64immZExt32 : PatLeaf<(i64 imm), [{
191 // i64immZExt32 predicate - True if the 64-bit immediate fits in a 32-bit
192 // zero extended field.
193 return (uint64_t)N->getZExtValue() == (uint32_t)N->getZExtValue();
197 def extloadi32i8 : PatFrag<(ops node:$ptr), (i32 (extloadi8 node:$ptr))>;
198 def extloadi32i16 : PatFrag<(ops node:$ptr), (i32 (extloadi16 node:$ptr))>;
199 def extloadi64i8 : PatFrag<(ops node:$ptr), (i64 (extloadi8 node:$ptr))>;
200 def extloadi64i16 : PatFrag<(ops node:$ptr), (i64 (extloadi16 node:$ptr))>;
201 def extloadi64i32 : PatFrag<(ops node:$ptr), (i64 (extloadi32 node:$ptr))>;
203 def sextloadi32i8 : PatFrag<(ops node:$ptr), (i32 (sextloadi8 node:$ptr))>;
204 def sextloadi32i16 : PatFrag<(ops node:$ptr), (i32 (sextloadi16 node:$ptr))>;
205 def sextloadi64i8 : PatFrag<(ops node:$ptr), (i64 (sextloadi8 node:$ptr))>;
206 def sextloadi64i16 : PatFrag<(ops node:$ptr), (i64 (sextloadi16 node:$ptr))>;
207 def sextloadi64i32 : PatFrag<(ops node:$ptr), (i64 (sextloadi32 node:$ptr))>;
209 def zextloadi32i8 : PatFrag<(ops node:$ptr), (i32 (zextloadi8 node:$ptr))>;
210 def zextloadi32i16 : PatFrag<(ops node:$ptr), (i32 (zextloadi16 node:$ptr))>;
211 def zextloadi64i8 : PatFrag<(ops node:$ptr), (i64 (zextloadi8 node:$ptr))>;
212 def zextloadi64i16 : PatFrag<(ops node:$ptr), (i64 (zextloadi16 node:$ptr))>;
213 def zextloadi64i32 : PatFrag<(ops node:$ptr), (i64 (zextloadi32 node:$ptr))>;
215 // A couple of more descriptive operand definitions.
216 // 32-bits but only 8 bits are significant.
217 def i32i8imm : Operand<i32>;
218 // 32-bits but only 16 bits are significant.
219 def i32i16imm : Operand<i32>;
220 // 64-bits but only 32 bits are significant.
221 def i64i32imm : Operand<i64>;
222 // Branch targets have OtherVT type.
223 def brtarget : Operand<OtherVT>;
226 def u12imm : Operand<i32> {
227 let PrintMethod = "printU12ImmOperand";
229 def u12imm64 : Operand<i64> {
230 let PrintMethod = "printU12ImmOperand";
234 def s16imm : Operand<i32> {
235 let PrintMethod = "printS16ImmOperand";
237 def s16imm64 : Operand<i64> {
238 let PrintMethod = "printS16ImmOperand";
241 def s20imm : Operand<i32> {
242 let PrintMethod = "printS20ImmOperand";
244 def s20imm64 : Operand<i64> {
245 let PrintMethod = "printS20ImmOperand";
248 def s32imm : Operand<i32> {
249 let PrintMethod = "printS32ImmOperand";
251 def s32imm64 : Operand<i64> {
252 let PrintMethod = "printS32ImmOperand";
255 def imm_pcrel : Operand<i64> {
256 let PrintMethod = "printPCRelImmOperand";
259 //===----------------------------------------------------------------------===//
260 // SystemZ Operand Definitions.
261 //===----------------------------------------------------------------------===//
265 // riaddr := reg + imm
266 def riaddr32 : Operand<i64>,
267 ComplexPattern<i64, 2, "SelectAddrRI12Only", []> {
268 let PrintMethod = "printRIAddrOperand";
269 let MIOperandInfo = (ops ADDR64:$base, u12imm:$disp);
272 def riaddr12 : Operand<i64>,
273 ComplexPattern<i64, 2, "SelectAddrRI12", []> {
274 let PrintMethod = "printRIAddrOperand";
275 let MIOperandInfo = (ops ADDR64:$base, u12imm64:$disp);
278 def riaddr : Operand<i64>,
279 ComplexPattern<i64, 2, "SelectAddrRI", []> {
280 let PrintMethod = "printRIAddrOperand";
281 let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp);
284 //===----------------------------------------------------------------------===//
286 // rriaddr := reg + reg + imm
287 def rriaddr12 : Operand<i64>,
288 ComplexPattern<i64, 3, "SelectAddrRRI12", [], []> {
289 let PrintMethod = "printRRIAddrOperand";
290 let MIOperandInfo = (ops ADDR64:$base, u12imm64:$disp, ADDR64:$index);
292 def rriaddr : Operand<i64>,
293 ComplexPattern<i64, 3, "SelectAddrRRI20", [], []> {
294 let PrintMethod = "printRRIAddrOperand";
295 let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp, ADDR64:$index);
297 def laaddr : Operand<i64>,
298 ComplexPattern<i64, 3, "SelectLAAddr", [add, sub, or, frameindex], []> {
299 let PrintMethod = "printRRIAddrOperand";
300 let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp, ADDR64:$index);