lib/Target/SystemZ/SystemZOperators.td

   1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 //===----------------------------------------------------------------------===//
  11 // Type profiles
  12 //===----------------------------------------------------------------------===//
  13 def SDT_CallSeqStart        : SDCallSeqStart<[SDTCisVT<0, i64>]>;
  14 def SDT_CallSeqEnd          : SDCallSeqEnd<[SDTCisVT<0, i64>,
  15                                             SDTCisVT<1, i64>]>;
  16 def SDT_ZCall               : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
  17 def SDT_ZCmp                : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
  18 def SDT_ZBRCCMask           : SDTypeProfile<0, 2,
  19                                             [SDTCisVT<0, i8>,
  20                                              SDTCisVT<1, OtherVT>]>;
  21 def SDT_ZSelectCCMask       : SDTypeProfile<1, 3,
  22                                             [SDTCisSameAs<0, 1>,
  23                                              SDTCisSameAs<1, 2>,
  24                                              SDTCisVT<3, i8>]>;
  25 def SDT_ZWrapPtr            : SDTypeProfile<1, 1,
  26                                             [SDTCisSameAs<0, 1>,
  27                                              SDTCisPtrTy<0>]>;
  28 def SDT_ZAdjDynAlloc        : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
  29 def SDT_ZExtractAccess      : SDTypeProfile<1, 1,
  30                                             [SDTCisVT<0, i32>,
  31                                              SDTCisVT<1, i8>]>;
  32 def SDT_ZGR128Binary32      : SDTypeProfile<1, 2,
  33                                             [SDTCisVT<0, untyped>,
  34                                              SDTCisVT<1, untyped>,
  35                                              SDTCisVT<2, i32>]>;
  36 def SDT_ZGR128Binary64      : SDTypeProfile<1, 2,
  37                                             [SDTCisVT<0, untyped>,
  38                                              SDTCisVT<1, untyped>,
  39                                              SDTCisVT<2, i64>]>;
  40 def SDT_ZAtomicLoadBinaryW  : SDTypeProfile<1, 5,
  41                                             [SDTCisVT<0, i32>,
  42                                              SDTCisPtrTy<1>,
  43                                              SDTCisVT<2, i32>,
  44                                              SDTCisVT<3, i32>,
  45                                              SDTCisVT<4, i32>,
  46                                              SDTCisVT<5, i32>]>;
  47 def SDT_ZAtomicCmpSwapW     : SDTypeProfile<1, 6,
  48                                             [SDTCisVT<0, i32>,
  49                                              SDTCisPtrTy<1>,
  50                                              SDTCisVT<2, i32>,
  51                                              SDTCisVT<3, i32>,
  52                                              SDTCisVT<4, i32>,
  53                                              SDTCisVT<5, i32>,
  54                                              SDTCisVT<6, i32>]>;
  55 def SDT_ZCopy               : SDTypeProfile<0, 3,
  56                                             [SDTCisPtrTy<0>,
  57                                              SDTCisPtrTy<1>,
  58                                              SDTCisVT<2, i32>]>;
  59
  60 //===----------------------------------------------------------------------===//
  61 // Node definitions
  62 //===----------------------------------------------------------------------===//
  63
  64 // These are target-independent nodes, but have target-specific formats.
  65 def callseq_start       : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
  66                                  [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
  67 def callseq_end         : SDNode<"ISD::CALLSEQ_END",   SDT_CallSeqEnd,
  68                                  [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
  69                                   SDNPOutGlue]>;
  70
  71 // Nodes for SystemZISD::*.  See SystemZISelLowering.h for more details.
  72 def z_retflag           : SDNode<"SystemZISD::RET_FLAG", SDTNone,
  73                                  [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
  74 def z_call              : SDNode<"SystemZISD::CALL", SDT_ZCall,
  75                                  [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
  76                                   SDNPVariadic]>;
  77 def z_pcrel_wrapper     : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
  78 def z_cmp               : SDNode<"SystemZISD::CMP", SDT_ZCmp, [SDNPOutGlue]>;
  79 def z_ucmp              : SDNode<"SystemZISD::UCMP", SDT_ZCmp, [SDNPOutGlue]>;
  80 def z_br_ccmask         : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
  81                                  [SDNPHasChain, SDNPInGlue]>;
  82 def z_select_ccmask     : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
  83                                  [SDNPInGlue]>;
  84 def z_adjdynalloc       : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
  85 def z_extract_access    : SDNode<"SystemZISD::EXTRACT_ACCESS",
  86                                  SDT_ZExtractAccess>;
  87 def z_umul_lohi64       : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
  88 def z_sdivrem32         : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
  89 def z_sdivrem64         : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
  90 def z_udivrem32         : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
  91 def z_udivrem64         : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
  92
  93 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
  94   : SDNode<"SystemZISD::"##name, profile,
  95            [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
  96
  97 def z_atomic_swapw      : AtomicWOp<"ATOMIC_SWAPW">;
  98 def z_atomic_loadw_add  : AtomicWOp<"ATOMIC_LOADW_ADD">;
  99 def z_atomic_loadw_sub  : AtomicWOp<"ATOMIC_LOADW_SUB">;
 100 def z_atomic_loadw_and  : AtomicWOp<"ATOMIC_LOADW_AND">;
 101 def z_atomic_loadw_or   : AtomicWOp<"ATOMIC_LOADW_OR">;
 102 def z_atomic_loadw_xor  : AtomicWOp<"ATOMIC_LOADW_XOR">;
 103 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
 104 def z_atomic_loadw_min  : AtomicWOp<"ATOMIC_LOADW_MIN">;
 105 def z_atomic_loadw_max  : AtomicWOp<"ATOMIC_LOADW_MAX">;
 106 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
 107 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
 108 def z_atomic_cmp_swapw  : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
 109
 110 def z_mvc               : SDNode<"SystemZISD::MVC", SDT_ZCopy,
 111                                  [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
 112
 113 //===----------------------------------------------------------------------===//
 114 // Pattern fragments
 115 //===----------------------------------------------------------------------===//
 116
 117 // Register sign-extend operations.  Sub-32-bit values are represented as i32s.
 118 def sext8  : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
 119 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
 120 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
 121
 122 // Register zero-extend operations.  Sub-32-bit values are represented as i32s.
 123 def zext8  : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
 124 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
 125 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
 126
 127 // Typed floating-point loads.
 128 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
 129 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
 130
 131 // Extending loads in which the extension type doesn't matter.
 132 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
 133   return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
 134 }]>;
 135 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
 136   return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
 137 }]>;
 138 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
 139   return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
 140 }]>;
 141 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
 142   return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
 143 }]>;
 144
 145 // Aligned loads.
 146 class AlignedLoad<SDPatternOperator load>
 147   : PatFrag<(ops node:$addr), (load node:$addr), [{
 148   LoadSDNode *Load = cast<LoadSDNode>(N);
 149   return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
 150 }]>;
 151 def aligned_load        : AlignedLoad<load>;
 152 def aligned_sextloadi16 : AlignedLoad<sextloadi16>;
 153 def aligned_sextloadi32 : AlignedLoad<sextloadi32>;
 154 def aligned_zextloadi16 : AlignedLoad<zextloadi16>;
 155 def aligned_zextloadi32 : AlignedLoad<zextloadi32>;
 156
 157 // Aligned stores.
 158 class AlignedStore<SDPatternOperator store>
 159   : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
 160   StoreSDNode *Store = cast<StoreSDNode>(N);
 161   return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
 162 }]>;
 163 def aligned_store         : AlignedStore<store>;
 164 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
 165 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
 166
 167 // Non-volatile loads.  Used for instructions that might access the storage
 168 // location multiple times.
 169 class NonvolatileLoad<SDPatternOperator load>
 170   : PatFrag<(ops node:$addr), (load node:$addr), [{
 171   LoadSDNode *Load = cast<LoadSDNode>(N);
 172   return !Load->isVolatile();
 173 }]>;
 174 def nonvolatile_load          : NonvolatileLoad<load>;
 175 def nonvolatile_anyextloadi8  : NonvolatileLoad<anyextloadi8>;
 176 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
 177 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
 178
 179 // Non-volatile stores.
 180 class NonvolatileStore<SDPatternOperator store>
 181   : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
 182   StoreSDNode *Store = cast<StoreSDNode>(N);
 183   return !Store->isVolatile();
 184 }]>;
 185 def nonvolatile_store         : NonvolatileStore<store>;
 186 def nonvolatile_truncstorei8  : NonvolatileStore<truncstorei8>;
 187 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
 188 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
 189
 190 // Insertions.
 191 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
 192                        (or (and node:$src1, -256), node:$src2)>;
 193 def insertll : PatFrag<(ops node:$src1, node:$src2),
 194                        (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
 195 def insertlh : PatFrag<(ops node:$src1, node:$src2),
 196                        (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
 197 def inserthl : PatFrag<(ops node:$src1, node:$src2),
 198                        (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
 199 def inserthh : PatFrag<(ops node:$src1, node:$src2),
 200                        (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
 201 def insertlf : PatFrag<(ops node:$src1, node:$src2),
 202                        (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
 203 def inserthf : PatFrag<(ops node:$src1, node:$src2),
 204                        (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
 205
 206 // ORs that can be treated as insertions.
 207 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
 208                              (or node:$src1, node:$src2), [{
 209   unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
 210   return CurDAG->MaskedValueIsZero(N->getOperand(0),
 211                                    APInt::getLowBitsSet(BitWidth, 8));
 212 }]>;
 213
 214 // ORs that can be treated as reversed insertions.
 215 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
 216                                 (or node:$src1, node:$src2), [{
 217   unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
 218   return CurDAG->MaskedValueIsZero(N->getOperand(1),
 219                                    APInt::getLowBitsSet(BitWidth, 8));
 220 }]>;
 221
 222 // Fused multiply-add and multiply-subtract, but with the order of the
 223 // operands matching SystemZ's MA and MS instructions.
 224 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
 225                     (fma node:$src2, node:$src3, node:$src1)>;
 226 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
 227                     (fma node:$src2, node:$src3, (fneg node:$src1))>;
 228
 229 // Floating-point negative absolute.
 230 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
 231
 232 // Create a unary operator that loads from memory and then performs
 233 // the given operation on it.
 234 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
 235   : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
 236
 237 // Create a store operator that performs the given unary operation
 238 // on the value before storing it.
 239 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
 240   : PatFrag<(ops node:$value, node:$addr),
 241             (store (operator node:$value), node:$addr)>;