1 //===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SystemZ implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "SystemZInstrInfo.h"
16 #include "SystemZMachineFunctionInfo.h"
17 #include "SystemZRegisterInfo.h"
18 #include "SystemZSubtarget.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/Target/TargetFrameInfo.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/ADT/BitVector.h"
30 SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
31 const SystemZInstrInfo &tii)
32 : SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN),
37 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
38 static const unsigned CalleeSavedRegs[] = {
39 SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D,
40 SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
41 SystemZ::R14D, SystemZ::R15D,
42 SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L,
43 SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
47 return CalleeSavedRegs;
50 const TargetRegisterClass* const*
51 SystemZRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
52 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
53 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
54 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
55 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
56 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
57 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
58 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
59 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
60 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
61 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 0
63 return CalleeSavedRegClasses;
66 BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
67 BitVector Reserved(getNumRegs());
69 Reserved.set(SystemZ::R11D);
70 Reserved.set(SystemZ::R14D);
71 Reserved.set(SystemZ::R15D);
75 /// needsFP - Return true if the specified function should have a dedicated
76 /// frame pointer register. This is true if the function has variable sized
77 /// allocas or if frame pointer elimination is disabled.
78 bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const {
79 const MachineFrameInfo *MFI = MF.getFrameInfo();
80 return NoFramePointerElim || MFI->hasVarSizedObjects();
83 void SystemZRegisterInfo::
84 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
85 MachineBasicBlock::iterator I) const {
89 int SystemZRegisterInfo::getFrameIndexOffset(const MachineFunction &MF,
91 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
92 const MachineFrameInfo *MFI = MF.getFrameInfo();
93 const SystemZMachineFunctionInfo *SystemZMFI =
94 MF.getInfo<SystemZMachineFunctionInfo>();
95 int Offset = MFI->getObjectOffset(FI) + MFI->getOffsetAdjustment();
96 uint64_t StackSize = MFI->getStackSize();
98 // Fixed objects are really located in the "previous" frame.
100 StackSize -= SystemZMFI->getCalleeSavedFrameSize();
102 Offset += StackSize - TFI.getOffsetOfLocalArea();
104 // Skip the register save area if we generated the stack frame.
105 if (StackSize || MFI->hasCalls())
106 Offset -= TFI.getOffsetOfLocalArea();
112 SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
113 int SPAdj, int *Value,
114 RegScavenger *RS) const {
115 assert(SPAdj == 0 && "Unxpected");
118 MachineInstr &MI = *II;
119 MachineFunction &MF = *MI.getParent()->getParent();
120 while (!MI.getOperand(i).isFI()) {
122 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
125 int FrameIndex = MI.getOperand(i).getIndex();
127 unsigned BasePtr = (hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
129 // This must be part of a rri or ri operand memory reference. Replace the
130 // FrameIndex with base register with BasePtr. Add an offset to the
131 // displacement field.
132 MI.getOperand(i).ChangeToRegister(BasePtr, false);
134 // Offset is a either 12-bit unsigned or 20-bit signed integer.
135 // FIXME: handle "too long" displacements.
136 int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
138 // Check whether displacement is too long to fit into 12 bit zext field.
139 MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset));
141 MI.getOperand(i+1).ChangeToImmediate(Offset);
146 SystemZRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
147 RegScavenger *RS) const {
148 // Determine whether R15/R14 will ever be clobbered inside the function. And
149 // if yes - mark it as 'callee' saved.
150 MachineFrameInfo *FFI = MF.getFrameInfo();
151 MachineRegisterInfo &MRI = MF.getRegInfo();
153 // Check whether high FPRs are ever used, if yes - we need to save R15 as
155 static const unsigned HighFPRs[] = {
156 SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L,
157 SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
158 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
159 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
162 bool HighFPRsUsed = false;
163 for (unsigned i = 0, e = array_lengthof(HighFPRs); i != e; ++i)
164 HighFPRsUsed |= MRI.isPhysRegUsed(HighFPRs[i]);
167 /* FIXME: function is varargs */
168 /* FIXME: function grabs RA */
169 /* FIXME: function calls eh_return */
170 MRI.setPhysRegUsed(SystemZ::R14D);
174 FFI->getObjectIndexEnd() != 0 || // Contains automatic variables
175 FFI->hasVarSizedObjects() // Function calls dynamic alloca's
176 /* FIXME: function is varargs */)
177 MRI.setPhysRegUsed(SystemZ::R15D);
180 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
181 /// stack pointer by a constant value.
183 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
184 int64_t NumBytes, const TargetInstrInfo &TII) {
185 unsigned Opc; uint64_t Chunk;
186 bool isSub = NumBytes < 0;
187 uint64_t Offset = isSub ? -NumBytes : NumBytes;
189 if (Offset >= (1LL << 15) - 1) {
190 Opc = SystemZ::ADD64ri32;
191 Chunk = (1LL << 31) - 1;
193 Opc = SystemZ::ADD64ri16;
194 Chunk = (1LL << 15) - 1;
197 DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() :
198 DebugLoc::getUnknownLoc());
201 uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset;
203 BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D)
204 .addReg(SystemZ::R15D).addImm((isSub ? -(int64_t)ThisVal : ThisVal));
205 // The PSW implicit def is dead.
206 MI->getOperand(3).setIsDead();
211 void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const {
212 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
213 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
214 MachineFrameInfo *MFI = MF.getFrameInfo();
215 SystemZMachineFunctionInfo *SystemZMFI =
216 MF.getInfo<SystemZMachineFunctionInfo>();
217 MachineBasicBlock::iterator MBBI = MBB.begin();
218 DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() :
219 DebugLoc::getUnknownLoc());
221 // Get the number of bytes to allocate from the FrameInfo.
222 // Note that area for callee-saved stuff is already allocated, thus we need to
223 // 'undo' the stack movement.
224 uint64_t StackSize = MFI->getStackSize();
225 StackSize -= SystemZMFI->getCalleeSavedFrameSize();
227 uint64_t NumBytes = StackSize - TFI.getOffsetOfLocalArea();
229 // Skip the callee-saved push instructions.
230 while (MBBI != MBB.end() &&
231 (MBBI->getOpcode() == SystemZ::MOV64mr ||
232 MBBI->getOpcode() == SystemZ::MOV64mrm))
235 if (MBBI != MBB.end())
236 DL = MBBI->getDebugLoc();
238 // adjust stack pointer: R15 -= numbytes
239 if (StackSize || MFI->hasCalls()) {
240 assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
241 "Invalid stack frame calculation!");
242 emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII);
246 // Update R11 with the new base value...
247 BuildMI(MBB, MBBI, DL, TII.get(SystemZ::MOV64rr), SystemZ::R11D)
248 .addReg(SystemZ::R15D);
250 // Mark the FramePtr as live-in in every block except the entry.
251 for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end();
253 I->addLiveIn(SystemZ::R11D);
258 void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF,
259 MachineBasicBlock &MBB) const {
260 const MachineFrameInfo *MFI = MF.getFrameInfo();
261 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
262 MachineBasicBlock::iterator MBBI = prior(MBB.end());
263 SystemZMachineFunctionInfo *SystemZMFI =
264 MF.getInfo<SystemZMachineFunctionInfo>();
265 unsigned RetOpcode = MBBI->getOpcode();
268 case SystemZ::RET: break; // These are ok
270 assert(0 && "Can only insert epilog into returning blocks");
273 // Get the number of bytes to allocate from the FrameInfo
274 // Note that area for callee-saved stuff is already allocated, thus we need to
275 // 'undo' the stack movement.
277 MFI->getStackSize() - SystemZMFI->getCalleeSavedFrameSize();
278 uint64_t NumBytes = StackSize - TFI.getOffsetOfLocalArea();
280 // Skip the final terminator instruction.
281 while (MBBI != MBB.begin()) {
282 MachineBasicBlock::iterator PI = prior(MBBI);
284 if (!PI->getDesc().isTerminator())
288 // During callee-saved restores emission stack frame was not yet finialized
289 // (and thus - the stack size was unknown). Tune the offset having full stack
291 if (StackSize || MFI->hasCalls()) {
292 assert((MBBI->getOpcode() == SystemZ::MOV64rmm ||
293 MBBI->getOpcode() == SystemZ::MOV64rm) &&
294 "Expected to see callee-save register restore code");
295 assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
296 "Invalid stack frame calculation!");
299 MachineInstr &MI = *MBBI;
300 while (!MI.getOperand(i).isImm()) {
302 assert(i < MI.getNumOperands() && "Unexpected restore code!");
305 uint64_t Offset = NumBytes + MI.getOperand(i).getImm();
306 // If Offset does not fit into 20-bit signed displacement field we need to
307 // emit some additional code...
308 if (Offset > 524287) {
309 // Fold the displacement into load instruction as much as possible.
310 NumBytes = Offset - 524287;
312 emitSPUpdate(MBB, MBBI, NumBytes, TII);
315 MI.getOperand(i).ChangeToImmediate(Offset);
319 unsigned SystemZRegisterInfo::getRARegister() const {
320 assert(0 && "What is the return address register");
325 SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
326 assert(0 && "What is the frame register");
330 unsigned SystemZRegisterInfo::getEHExceptionRegister() const {
331 assert(0 && "What is the exception register");
335 unsigned SystemZRegisterInfo::getEHHandlerRegister() const {
336 assert(0 && "What is the exception handler register");
340 int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
341 assert(0 && "What is the dwarf register number");
345 #include "SystemZGenRegisterInfo.inc"