1 //===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "SystemZTargetMachine.h"
11 #include "llvm/CodeGen/Passes.h"
12 #include "llvm/Support/TargetRegistry.h"
13 #include "llvm/Transforms/Scalar.h"
14 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
18 extern "C" void LLVMInitializeSystemZTarget() {
19 // Register the target.
20 RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
23 SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT,
24 StringRef CPU, StringRef FS,
25 const TargetOptions &Options,
26 Reloc::Model RM, CodeModel::Model CM,
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29 TLOF(make_unique<TargetLoweringObjectFileELF>()),
30 // Make sure that global data has at least 16 bits of alignment by
31 // default, so that we can refer to it using LARL. We don't have any
32 // special requirements for stack variables though.
33 DL("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"),
34 Subtarget(TT, CPU, FS, *this) {
38 SystemZTargetMachine::~SystemZTargetMachine() {}
41 /// SystemZ Code Generator Pass Configuration Options.
42 class SystemZPassConfig : public TargetPassConfig {
44 SystemZPassConfig(SystemZTargetMachine *TM, PassManagerBase &PM)
45 : TargetPassConfig(TM, PM) {}
47 SystemZTargetMachine &getSystemZTargetMachine() const {
48 return getTM<SystemZTargetMachine>();
51 void addIRPasses() override;
52 bool addInstSelector() override;
53 void addPreSched2() override;
54 void addPreEmitPass() override;
56 } // end anonymous namespace
58 void SystemZPassConfig::addIRPasses() {
59 TargetPassConfig::addIRPasses();
62 bool SystemZPassConfig::addInstSelector() {
63 addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel()));
67 void SystemZPassConfig::addPreSched2() {
68 if (getOptLevel() != CodeGenOpt::None &&
69 getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond())
70 addPass(&IfConverterID);
73 void SystemZPassConfig::addPreEmitPass() {
74 // We eliminate comparisons here rather than earlier because some
75 // transformations can change the set of available CC values and we
76 // generally want those transformations to have priority. This is
77 // especially true in the commonest case where the result of the comparison
78 // is used by a single in-range branch instruction, since we will then
79 // be able to fuse the compare and the branch instead.
81 // For example, two-address NILF can sometimes be converted into
82 // three-address RISBLG. NILF produces a CC value that indicates whether
83 // the low word is zero, but RISBLG does not modify CC at all. On the
84 // other hand, 64-bit ANDs like NILL can sometimes be converted to RISBG.
85 // The CC value produced by NILL isn't useful for our purposes, but the
86 // value produced by RISBG can be used for any comparison with zero
87 // (not just equality). So there are some transformations that lose
88 // CC values (while still being worthwhile) and others that happen to make
89 // the CC result more useful than it was originally.
91 // Another reason is that we only want to use BRANCH ON COUNT in cases
92 // where we know that the count register is not going to be spilled.
94 // Doing it so late makes it more likely that a register will be reused
95 // between the comparison and the branch, but it isn't clear whether
96 // preventing that would be a win or not.
97 if (getOptLevel() != CodeGenOpt::None)
98 addPass(createSystemZElimComparePass(getSystemZTargetMachine()), false);
99 if (getOptLevel() != CodeGenOpt::None)
100 addPass(createSystemZShortenInstPass(getSystemZTargetMachine()), false);
101 addPass(createSystemZLongBranchPass(getSystemZTargetMachine()));
104 TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
105 return new SystemZPassConfig(this, PM);