1 //===- Target.td - Target Independent TableGen interface --------*- C++ -*-===//
3 // This file defines the target-independent interfaces which should be
4 // implemented by each target which is using a TableGen based code generator.
6 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 // Value types - These values correspond to the register types defined in the
14 class ValueType<int size> { string Namespace = "MVT"; int Size = size; }
16 def i1 : ValueType<1>; // One bit boolean value
17 def i8 : ValueType<8>; // 8-bit integer value
18 def i16 : ValueType<16>; // 16-bit integer value
19 def i32 : ValueType<32>; // 32-bit integer value
20 def i64 : ValueType<64>; // 64-bit integer value
21 def i128 : ValueType<128>; // 128-bit integer value
22 def f32 : ValueType<32>; // 32-bit floating point value
23 def f64 : ValueType<64>; // 64-bit floating point value
24 def f80 : ValueType<80>; // 80-bit floating point value
25 def f128 : ValueType<128>; // 128-bit floating point value
28 //===----------------------------------------------------------------------===//
29 // Register file description - These classes are used to fill in the target
30 // description classes in llvm/Target/MRegisterInfo.h
33 // Register - You should define one instance of this class for each register in
34 // the target machine.
37 string Namespace = "";
40 // RegisterAliases - You should define instances of this class to indicate which
41 // registers in the register file are aliased together. This allows the code
42 // generator to be careful not to put two values with overlapping live ranges
43 // into registers which alias.
45 class RegisterAliases<Register reg, list<Register> aliases> {
47 list<Register> Aliases = aliases;
50 // RegisterClass - Now that all of the registers are defined, and aliases
51 // between registers are defined, specify which registers belong to which
52 // register classes. This also defines the default allocation order of
53 // registers by register allocators.
55 class RegisterClass<ValueType regType, int alignment, list<Register> regList> {
56 // RegType - Specify the ValueType of the registers in this register class.
57 // Note that all registers in a register class must have the same ValueType.
59 ValueType RegType = regType;
61 // Alignment - Specify the alignment required of the registers when they are
62 // stored or loaded to memory.
64 int Size = RegType.Size;
65 int Alignment = alignment;
67 // MemberList - Specify which registers are in this class. If the
68 // allocation_order_* method are not specified, this also defines the order of
69 // allocation used by the register allocator.
71 list<Register> MemberList = regList;
73 // allocation_order_* - These methods define the order that the registers
74 // should be allocated. See the MRegister.h file for more information.
76 code allocation_order_begin;
77 code allocation_order_end;
80 // RegisterInfo - This class should only be instantiated once to provide
81 // parameters which are global to the the target machine, such as callee safed
85 // ClassName - Specify the name of the class that should be generated by the
86 // register info emitter. This class may be further subclasses by custom
87 // target code to implement virtual methods as necessary. Targets must
88 // specify a value for this.
92 // CalleeSavedRegisters - As you might guess, this is a list of the callee
93 // saved registers for a target.
94 list<Register> CalleeSavedRegisters = [];
96 // PointerType - Specify the value type to be used to represent pointers in
97 // this target. Typically this is an i32 or i64 type.
98 ValueType PointerType;
102 //===----------------------------------------------------------------------===//
103 // Instruction set description -
107 string Name; // The opcode string for this instruction
108 string Namespace = "";
110 list<Register> Uses = []; // Default to using no non-operand registers
111 list<Register> Defs = []; // Default to modifying no non-operand registers
113 // These bits capture information about the high-level semantics of the
115 bit isReturn = 0; // Is this instruction a return instruction?
116 bit isBranch = 0; // Is this instruction a branch instruction?
117 bit isCall = 0; // Is this instruction a call instruction?
118 bit isTwoAddress = 0; // Is this a two address instruction?
119 bit isTerminator = 0; // Is this part of the terminator for a basic block?