1 //===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetInstrInfo.h"
15 #include "llvm/MC/MCAsmInfo.h"
16 #include "llvm/Target/TargetRegisterInfo.h"
17 #include "llvm/Support/ErrorHandling.h"
20 //===----------------------------------------------------------------------===//
22 //===----------------------------------------------------------------------===//
24 /// getRegClass - Get the register class for the operand, handling resolution
25 /// of "symbolic" pointer register classes etc. If this is not a register
26 /// operand, this returns null.
27 const TargetRegisterClass *
28 TargetOperandInfo::getRegClass(const TargetRegisterInfo *TRI) const {
29 if (isLookupPtrRegClass())
30 return TRI->getPointerRegClass(RegClass);
31 // Instructions like INSERT_SUBREG do not have fixed register classes.
34 // Otherwise just look it up normally.
35 return TRI->getRegClass(RegClass);
38 //===----------------------------------------------------------------------===//
40 //===----------------------------------------------------------------------===//
42 TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
44 : Descriptors(Desc), NumOpcodes(numOpcodes) {
47 TargetInstrInfo::~TargetInstrInfo() {
50 /// insertNoop - Insert a noop into the instruction stream at the specified
52 void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
53 MachineBasicBlock::iterator MI) const {
54 llvm_unreachable("Target didn't implement insertNoop!");
58 bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
59 const TargetInstrDesc &TID = MI->getDesc();
60 if (!TID.isTerminator()) return false;
62 // Conditional branch is a special case.
63 if (TID.isBranch() && !TID.isBarrier())
65 if (!TID.isPredicable())
67 return !isPredicated(MI);
71 /// Measure the specified inline asm to determine an approximation of its
73 /// Comments (which run till the next SeparatorChar or newline) do not
74 /// count as an instruction.
75 /// Any other non-whitespace text is considered an instruction, with
76 /// multiple instructions separated by SeparatorChar or newlines.
77 /// Variable-length instructions are not handled here; this function
78 /// may be overloaded in the target code to do that.
79 unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
80 const MCAsmInfo &MAI) const {
83 // Count the number of instructions in the asm.
84 bool atInsnStart = true;
87 if (*Str == '\n' || *Str == MAI.getSeparatorChar())
89 if (atInsnStart && !isspace(*Str)) {
90 Length += MAI.getMaxInstLength();
93 if (atInsnStart && strncmp(Str, MAI.getCommentString(),
94 strlen(MAI.getCommentString())) == 0)