1 //===- TargetRegisterInfo.cpp - Target Register Information Implementation ===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TargetRegisterInfo interface.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/Target/TargetRegisterInfo.h"
16 #include "llvm/Target/TargetFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/ADT/BitVector.h"
20 #include "llvm/Support/raw_ostream.h"
24 TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
25 regclass_iterator RCB, regclass_iterator RCE,
26 const char *const *subregindexnames,
28 const unsigned* subregs, const unsigned subregsize,
29 const unsigned* aliases, const unsigned aliasessize)
30 : SubregHash(subregs), SubregHashSize(subregsize),
31 AliasesHash(aliases), AliasesHashSize(aliasessize),
32 Desc(D), SubRegIndexNames(subregindexnames), NumRegs(NR),
33 RegClassBegin(RCB), RegClassEnd(RCE) {
34 assert(NumRegs < FirstVirtualRegister &&
35 "Target has too many physical registers!");
37 CallFrameSetupOpcode = CFSO;
38 CallFrameDestroyOpcode = CFDO;
41 TargetRegisterInfo::~TargetRegisterInfo() {}
43 void TargetRegisterInfo::printReg(unsigned Reg, raw_ostream &OS) const {
44 if (Reg && isVirtualRegister(Reg))
47 OS << '%' << getName(Reg);
50 /// getMinimalPhysRegClass - Returns the Register Class of a physical
51 /// register of the given type, picking the most sub register class of
52 /// the right type that contains this physreg.
53 const TargetRegisterClass *
54 TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const {
55 assert(isPhysicalRegister(reg) && "reg must be a physical register");
57 // Pick the most sub register class of the right type that contains
59 const TargetRegisterClass* BestRC = 0;
60 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
61 const TargetRegisterClass* RC = *I;
62 if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
63 (!BestRC || BestRC->hasSubClass(RC)))
67 assert(BestRC && "Couldn't find the register class");
71 /// getAllocatableSetForRC - Toggle the bits that represent allocatable
72 /// registers for the specific register class.
73 static void getAllocatableSetForRC(const MachineFunction &MF,
74 const TargetRegisterClass *RC, BitVector &R){
75 for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
76 E = RC->allocation_order_end(MF); I != E; ++I)
80 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
81 const TargetRegisterClass *RC) const {
82 BitVector Allocatable(NumRegs);
84 getAllocatableSetForRC(MF, RC, Allocatable);
86 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(),
87 E = regclass_end(); I != E; ++I)
88 getAllocatableSetForRC(MF, *I, Allocatable);
91 // Mask out the reserved registers
92 BitVector Reserved = getReservedRegs(MF);
93 Allocatable &= Reserved.flip();
98 const TargetRegisterClass *
99 llvm::getCommonSubClass(const TargetRegisterClass *A,
100 const TargetRegisterClass *B) {
101 // First take care of the trivial cases
107 // If B is a subclass of A, it will be handled in the loop below
108 if (B->hasSubClass(A))
111 const TargetRegisterClass *Best = 0;
112 for (TargetRegisterClass::sc_iterator I = A->subclasses_begin();
113 const TargetRegisterClass *X = *I; ++I) {
115 return B; // B is a subclass of A
117 // X must be a common subclass of A and B
118 if (!B->hasSubClass(X))
121 // A superclass is definitely better.
122 if (!Best || Best->hasSuperClass(X)) {
127 // A subclass is definitely worse
128 if (Best->hasSubClass(X))
131 // Best and *I have no super/sub class relation - pick the larger class, or
132 // the smaller spill size.
133 int nb = std::distance(Best->begin(), Best->end());
134 int ni = std::distance(X->begin(), X->end());
135 if (ni>nb || (ni==nb && X->getSize() < Best->getSize()))