1 //===-- SchedInfo.cpp - Generic code to support target schedulers ----------==//
3 // This file implements the generic part of a Scheduler description for a
4 // target. This functionality is defined in the llvm/Target/SchedInfo.h file.
6 //===----------------------------------------------------------------------===//
8 #include "llvm/Target/TargetSchedInfo.h"
9 #include "llvm/Target/TargetMachine.h"
11 resourceId_t MachineResource::nextId = 0;
13 // Check if fromRVec and toRVec have *any* common entries.
14 // Assume the vectors are sorted in increasing order.
15 // Algorithm copied from function set_intersection() for sorted ranges
19 RUConflict(const std::vector<resourceId_t>& fromRVec,
20 const std::vector<resourceId_t>& toRVec)
23 unsigned fN = fromRVec.size(), tN = toRVec.size();
24 unsigned fi = 0, ti = 0;
26 while (fi < fN && ti < tN) {
27 if (fromRVec[fi] < toRVec[ti])
29 else if (toRVec[ti] < fromRVec[fi])
39 ComputeMinGap(const InstrRUsage &fromRU,
40 const InstrRUsage &toRU)
44 if (fromRU.numBubbles > 0)
45 minGap = fromRU.numBubbles;
47 if (minGap < fromRU.numCycles) {
48 // only need to check from cycle `minGap' onwards
49 for (cycles_t gap=minGap; gap <= fromRU.numCycles-1; gap++) {
50 // check if instr. #2 can start executing `gap' cycles after #1
51 // by checking for resource conflicts in each overlapping cycle
52 cycles_t numOverlap =std::min(fromRU.numCycles - gap, toRU.numCycles);
53 for (cycles_t c = 0; c <= numOverlap-1; c++)
54 if (RUConflict(fromRU.resourcesByCycle[gap + c],
55 toRU.resourcesByCycle[c])) {
56 // conflict found so minGap must be more than `gap'
67 //---------------------------------------------------------------------------
68 // class TargetSchedInfo
69 // Interface to machine description for instruction scheduling
70 //---------------------------------------------------------------------------
72 TargetSchedInfo::TargetSchedInfo(const TargetMachine& tgt,
74 const InstrClassRUsage* ClassRUsages,
75 const InstrRUsageDelta* UsageDeltas,
76 const InstrIssueDelta* IssueDeltas,
77 unsigned NumUsageDeltas,
78 unsigned NumIssueDeltas)
80 numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()),
81 classRUsages(ClassRUsages), usageDeltas(UsageDeltas),
82 issueDeltas(IssueDeltas), numUsageDeltas(NumUsageDeltas),
83 numIssueDeltas(NumIssueDeltas)
87 TargetSchedInfo::initializeResources()
89 assert(MAX_NUM_SLOTS >= (int)getMaxNumIssueTotal()
90 && "Insufficient slots for static data! Increase MAX_NUM_SLOTS");
92 // First, compute common resource usage info for each class because
93 // most instructions will probably behave the same as their class.
94 // Cannot allocate a vector of InstrRUsage so new each one.
96 std::vector<InstrRUsage> instrRUForClasses;
97 instrRUForClasses.resize(numSchedClasses);
98 for (InstrSchedClass sc = 0; sc < numSchedClasses; sc++) {
99 // instrRUForClasses.push_back(new InstrRUsage);
100 instrRUForClasses[sc].setMaxSlots(getMaxNumIssueTotal());
101 instrRUForClasses[sc].setTo(classRUsages[sc]);
104 computeInstrResources(instrRUForClasses);
105 computeIssueGaps(instrRUForClasses);
110 TargetSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
113 int numOpCodes = mii->getNumRealOpCodes();
114 instrRUsages.resize(numOpCodes);
116 // First get the resource usage information from the class resource usages.
117 for (MachineOpCode op = 0; op < numOpCodes; ++op) {
118 InstrSchedClass sc = getSchedClass(op);
119 assert(sc < numSchedClasses);
120 instrRUsages[op] = instrRUForClasses[sc];
123 // Now, modify the resource usages as specified in the deltas.
124 for (unsigned i = 0; i < numUsageDeltas; ++i) {
125 MachineOpCode op = usageDeltas[i].opCode;
126 assert(op < numOpCodes);
127 instrRUsages[op].addUsageDelta(usageDeltas[i]);
130 // Then modify the issue restrictions as specified in the deltas.
131 for (unsigned i = 0; i < numIssueDeltas; ++i) {
132 MachineOpCode op = issueDeltas[i].opCode;
133 assert(op < numOpCodes);
134 instrRUsages[issueDeltas[i].opCode].addIssueDelta(issueDeltas[i]);
140 TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
143 int numOpCodes = mii->getNumRealOpCodes();
144 issueGaps.resize(numOpCodes);
145 conflictLists.resize(numOpCodes);
147 assert(numOpCodes < (1 << MAX_OPCODE_SIZE) - 1
148 && "numOpCodes invalid for implementation of class OpCodePair!");
150 // First, compute issue gaps between pairs of classes based on common
151 // resources usages for each class, because most instruction pairs will
152 // usually behave the same as their class.
154 int classPairGaps[numSchedClasses][numSchedClasses];
155 for (InstrSchedClass fromSC=0; fromSC < numSchedClasses; fromSC++)
156 for (InstrSchedClass toSC=0; toSC < numSchedClasses; toSC++) {
157 int classPairGap = ComputeMinGap(instrRUForClasses[fromSC],
158 instrRUForClasses[toSC]);
159 classPairGaps[fromSC][toSC] = classPairGap;
162 // Now, for each pair of instructions, use the class pair gap if both
163 // instructions have identical resource usage as their respective classes.
164 // If not, recompute the gap for the pair from scratch.
166 longestIssueConflict = 0;
168 for (MachineOpCode fromOp=0; fromOp < numOpCodes; fromOp++)
169 for (MachineOpCode toOp=0; toOp < numOpCodes; toOp++) {
171 (instrRUsages[fromOp].sameAsClass && instrRUsages[toOp].sameAsClass)
172 ? classPairGaps[getSchedClass(fromOp)][getSchedClass(toOp)]
173 : ComputeMinGap(instrRUsages[fromOp], instrRUsages[toOp]);
175 if (instrPairGap > 0) {
176 this->setGap(instrPairGap, fromOp, toOp);
177 conflictLists[fromOp].push_back(toOp);
178 longestIssueConflict=std::max(longestIssueConflict, instrPairGap);
184 void InstrRUsage::setTo(const InstrClassRUsage& classRU) {
186 isSingleIssue = classRU.isSingleIssue;
187 breaksGroup = classRU.breaksGroup;
188 numBubbles = classRU.numBubbles;
190 for (unsigned i=0; i < classRU.numSlots; i++) {
191 unsigned slot = classRU.feasibleSlots[i];
192 assert(slot < feasibleSlots.size() && "Invalid slot specified!");
193 this->feasibleSlots[slot] = true;
196 numCycles = classRU.totCycles;
197 resourcesByCycle.resize(this->numCycles);
199 for (unsigned i=0; i < classRU.numRUEntries; i++)
200 for (unsigned c=classRU.V[i].startCycle, NC = c + classRU.V[i].numCycles;
202 this->resourcesByCycle[c].push_back(classRU.V[i].resourceId);
204 // Sort each resource usage vector by resourceId_t to speed up conflict
206 for (unsigned i=0; i < this->resourcesByCycle.size(); i++)
207 sort(resourcesByCycle[i].begin(), resourcesByCycle[i].end());
210 // Add the extra resource usage requirements specified in the delta.
211 // Note that a negative value of `numCycles' means one entry for that
212 // resource should be deleted for each cycle.
214 void InstrRUsage::addUsageDelta(const InstrRUsageDelta &delta) {
215 int NC = delta.numCycles;
218 // resize the resources vector if more cycles are specified
219 unsigned maxCycles = this->numCycles;
220 maxCycles = std::max(maxCycles, delta.startCycle + abs(NC) - 1);
221 if (maxCycles > this->numCycles) {
222 this->resourcesByCycle.resize(maxCycles);
223 this->numCycles = maxCycles;
227 for (unsigned c=delta.startCycle, last=c+NC-1; c <= last; c++)
228 this->resourcesByCycle[c].push_back(delta.resourceId);
230 // Remove the resource from all NC cycles.
231 for (unsigned c=delta.startCycle, last=(c-NC)-1; c <= last; c++) {
232 // Look for the resource backwards so we remove the last entry
233 // for that resource in each cycle.
234 std::vector<resourceId_t>& rvec = this->resourcesByCycle[c];
236 for (r = rvec.size() - 1; r >= 0; r--)
237 if (rvec[r] == delta.resourceId) {
238 // found last entry for the resource
239 rvec.erase(rvec.begin() + r);
242 assert(r >= 0 && "Resource to remove was unused in cycle c!");