1 //===- TargetSelectionDAG.td - Common code for DAG isels ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the target-independent interfaces used by SelectionDAG
11 // instruction selection generators.
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
16 // Selection DAG Type Constraint definitions.
18 // Note that the semantics of these constraints are hard coded into tblgen. To
19 // modify or add constraints, you have to hack tblgen.
22 class SDTypeConstraint<int opnum> {
23 int OperandNum = opnum;
26 // SDTCisVT - The specified operand has exactly this VT.
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
31 class SDTCisPtrTy<int OpNum> : SDTypeConstraint<OpNum>;
33 // SDTCisInt - The specified operand is has integer type.
34 class SDTCisInt<int OpNum> : SDTypeConstraint<OpNum>;
36 // SDTCisFP - The specified operand is has floating point type.
37 class SDTCisFP<int OpNum> : SDTypeConstraint<OpNum>;
39 // SDTCisSameAs - The two specified operands have identical types.
40 class SDTCisSameAs<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
41 int OtherOperandNum = OtherOp;
44 // SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is
45 // smaller than the 'Other' operand.
46 class SDTCisVTSmallerThanOp<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
47 int OtherOperandNum = OtherOp;
50 class SDTCisOpSmallerThanOp<int SmallOp, int BigOp> : SDTypeConstraint<SmallOp>{
51 int BigOperandNum = BigOp;
54 /// SDTCisIntVectorOfSameSize - This indicates that ThisOp and OtherOp are
55 /// packed vector types, and that ThisOp is the result of
56 /// MVT::getIntVectorWithNumElements with the number of elements that ThisOp
58 class SDTCisIntVectorOfSameSize<int ThisOp, int OtherOp>
59 : SDTypeConstraint<ThisOp> {
60 int OtherOpNum = OtherOp;
63 //===----------------------------------------------------------------------===//
64 // Selection DAG Type Profile definitions.
66 // These use the constraints defined above to describe the type requirements of
67 // the various nodes. These are not hard coded into tblgen, allowing targets to
68 // add their own if needed.
71 // SDTypeProfile - This profile describes the type requirements of a Selection
73 class SDTypeProfile<int numresults, int numoperands,
74 list<SDTypeConstraint> constraints> {
75 int NumResults = numresults;
76 int NumOperands = numoperands;
77 list<SDTypeConstraint> Constraints = constraints;
81 def SDTIntLeaf: SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
82 def SDTFPLeaf : SDTypeProfile<1, 0, [SDTCisFP<0>]>; // for 'fpimm'.
83 def SDTPtrLeaf: SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; // for '&g'.
84 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
85 def SDTUNDEF : SDTypeProfile<1, 0, []>; // for 'undef'.
86 def SDTUnaryOp : SDTypeProfile<1, 1, []>; // bitconvert
88 def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
89 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
91 def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
92 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisInt<2>
94 def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
95 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
97 def SDTFPSignOp : SDTypeProfile<1, 2, [ // fcopysign.
98 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisFP<2>
100 def SDTFPTernaryOp : SDTypeProfile<1, 3, [ // fmadd, fnmsub, etc.
101 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisFP<0>
103 def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
104 SDTCisSameAs<0, 1>, SDTCisInt<0>
106 def SDTIntExtendOp : SDTypeProfile<1, 1, [ // sext, zext, anyext
107 SDTCisInt<0>, SDTCisInt<1>, SDTCisOpSmallerThanOp<1, 0>
109 def SDTIntTruncOp : SDTypeProfile<1, 1, [ // trunc
110 SDTCisInt<0>, SDTCisInt<1>, SDTCisOpSmallerThanOp<0, 1>
112 def SDTFPUnaryOp : SDTypeProfile<1, 1, [ // fneg, fsqrt, etc
113 SDTCisSameAs<0, 1>, SDTCisFP<0>
115 def SDTFPRoundOp : SDTypeProfile<1, 1, [ // fround
116 SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<0, 1>
118 def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend
119 SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0>
121 def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp
122 SDTCisFP<0>, SDTCisInt<1>
124 def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int
125 SDTCisInt<0>, SDTCisFP<1>
127 def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
128 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
129 SDTCisVTSmallerThanOp<2, 1>
132 def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
133 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
136 def SDTSelect : SDTypeProfile<1, 3, [ // select
137 SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
140 def SDTSelectCC : SDTypeProfile<1, 5, [ // select_cc
141 SDTCisSameAs<1, 2>, SDTCisSameAs<3, 4>, SDTCisSameAs<0, 3>,
145 def SDTBr : SDTypeProfile<0, 1, [ // br
149 def SDTBrcond : SDTypeProfile<0, 2, [ // brcond
150 SDTCisInt<0>, SDTCisVT<1, OtherVT>
153 def SDTBrind : SDTypeProfile<0, 1, [ // brind
157 def SDTRet : SDTypeProfile<0, 0, []>; // ret
159 def SDTLoad : SDTypeProfile<1, 1, [ // load
163 def SDTStore : SDTypeProfile<0, 2, [ // store
167 def SDTExtLoad : SDTypeProfile<1, 3, [ // extload
168 SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
170 def SDTIntExtLoad : SDTypeProfile<1, 3, [ // sextload, zextload
171 SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
173 def SDTTruncStore : SDTypeProfile<0, 4, [ // truncstore
174 SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
177 def SDTVecShuffle : SDTypeProfile<1, 3, [
178 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
181 //===----------------------------------------------------------------------===//
182 // Selection DAG Node Properties.
184 // Note: These are hard coded into tblgen.
186 class SDNodeProperty;
187 def SDNPCommutative : SDNodeProperty; // X op Y == Y op X
188 def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z)
189 def SDNPHasChain : SDNodeProperty; // R/W chain operand and result
190 def SDNPOutFlag : SDNodeProperty; // Write a flag result
191 def SDNPInFlag : SDNodeProperty; // Read a flag operand
192 def SDNPOptInFlag : SDNodeProperty; // Optionally read a flag operand
194 //===----------------------------------------------------------------------===//
195 // Selection DAG Node definitions.
197 class SDNode<string opcode, SDTypeProfile typeprof,
198 list<SDNodeProperty> props = [], string sdclass = "SDNode"> {
199 string Opcode = opcode;
200 string SDClass = sdclass;
201 list<SDNodeProperty> Properties = props;
202 SDTypeProfile TypeProfile = typeprof;
209 def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
210 def fpimm : SDNode<"ISD::TargetConstantFP",
211 SDTFPLeaf, [], "ConstantFPSDNode">;
212 def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
213 def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">;
214 def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">;
215 def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>;
216 def globaladdr : SDNode<"ISD::GlobalAddress", SDTPtrLeaf, [],
217 "GlobalAddressSDNode">;
218 def tglobaladdr : SDNode<"ISD::TargetGlobalAddress", SDTPtrLeaf, [],
219 "GlobalAddressSDNode">;
220 def constpool : SDNode<"ISD::ConstantPool", SDTPtrLeaf, [],
221 "ConstantPoolSDNode">;
222 def tconstpool : SDNode<"ISD::TargetConstantPool", SDTPtrLeaf, [],
223 "ConstantPoolSDNode">;
224 def jumptable : SDNode<"ISD::JumpTable", SDTPtrLeaf, [],
226 def tjumptable : SDNode<"ISD::TargetJumpTable", SDTPtrLeaf, [],
228 def frameindex : SDNode<"ISD::FrameIndex", SDTPtrLeaf, [],
230 def tframeindex : SDNode<"ISD::TargetFrameIndex", SDTPtrLeaf, [],
232 def externalsym : SDNode<"ISD::ExternalSymbol", SDTPtrLeaf, [],
233 "ExternalSymbolSDNode">;
234 def texternalsym: SDNode<"ISD::TargetExternalSymbol", SDTPtrLeaf, [],
235 "ExternalSymbolSDNode">;
237 def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
238 [SDNPCommutative, SDNPAssociative]>;
239 def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;
240 def mul : SDNode<"ISD::MUL" , SDTIntBinOp,
241 [SDNPCommutative, SDNPAssociative]>;
242 def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>;
243 def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
244 def sdiv : SDNode<"ISD::SDIV" , SDTIntBinOp>;
245 def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
246 def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
247 def urem : SDNode<"ISD::UREM" , SDTIntBinOp>;
248 def srl : SDNode<"ISD::SRL" , SDTIntShiftOp>;
249 def sra : SDNode<"ISD::SRA" , SDTIntShiftOp>;
250 def shl : SDNode<"ISD::SHL" , SDTIntShiftOp>;
251 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
252 def rotr : SDNode<"ISD::ROTR" , SDTIntShiftOp>;
253 def and : SDNode<"ISD::AND" , SDTIntBinOp,
254 [SDNPCommutative, SDNPAssociative]>;
255 def or : SDNode<"ISD::OR" , SDTIntBinOp,
256 [SDNPCommutative, SDNPAssociative]>;
257 def xor : SDNode<"ISD::XOR" , SDTIntBinOp,
258 [SDNPCommutative, SDNPAssociative]>;
259 def addc : SDNode<"ISD::ADDC" , SDTIntBinOp,
260 [SDNPCommutative, SDNPOutFlag]>;
261 def adde : SDNode<"ISD::ADDE" , SDTIntBinOp,
262 [SDNPCommutative, SDNPOutFlag, SDNPInFlag]>;
263 def subc : SDNode<"ISD::SUBC" , SDTIntBinOp,
265 def sube : SDNode<"ISD::SUBE" , SDTIntBinOp,
266 [SDNPOutFlag, SDNPInFlag]>;
268 def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
269 def bswap : SDNode<"ISD::BSWAP" , SDTIntUnaryOp>;
270 def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;
271 def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
272 def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
273 def sext : SDNode<"ISD::SIGN_EXTEND", SDTIntExtendOp>;
274 def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>;
275 def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
276 def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>;
277 def bitconvert : SDNode<"ISD::BIT_CONVERT", SDTUnaryOp>;
279 def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>;
280 def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
281 def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>;
282 def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>;
283 def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
284 def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>;
285 def fneg : SDNode<"ISD::FNEG" , SDTFPUnaryOp>;
286 def fsqrt : SDNode<"ISD::FSQRT" , SDTFPUnaryOp>;
287 def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
288 def fcos : SDNode<"ISD::FCOS" , SDTFPUnaryOp>;
290 def fround : SDNode<"ISD::FP_ROUND" , SDTFPRoundOp>;
291 def fextend : SDNode<"ISD::FP_EXTEND" , SDTFPExtendOp>;
292 def fcopysign : SDNode<"ISD::FCOPYSIGN" , SDTFPSignOp>;
294 def sint_to_fp : SDNode<"ISD::SINT_TO_FP" , SDTIntToFPOp>;
295 def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;
296 def fp_to_sint : SDNode<"ISD::FP_TO_SINT" , SDTFPToIntOp>;
297 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
299 def setcc : SDNode<"ISD::SETCC" , SDTSetCC>;
300 def select : SDNode<"ISD::SELECT" , SDTSelect>;
301 def selectcc : SDNode<"ISD::SELECT_CC" , SDTSelectCC>;
303 def brcond : SDNode<"ISD::BRCOND" , SDTBrcond, [SDNPHasChain]>;
304 def brind : SDNode<"ISD::BRIND" , SDTBrind, [SDNPHasChain]>;
305 def br : SDNode<"ISD::BR" , SDTBr, [SDNPHasChain]>;
306 def ret : SDNode<"ISD::RET" , SDTRet, [SDNPHasChain]>;
308 def load : SDNode<"ISD::LOAD" , SDTLoad, [SDNPHasChain]>;
309 def store : SDNode<"ISD::STORE" , SDTStore, [SDNPHasChain]>;
311 // Do not use sextld and zextld directly. Use sextload and zextload (see
312 // below) which pass in a dummy srcvalue node which tblgen will skip over.
313 def sextld : SDNode<"ISD::SEXTLOAD" , SDTIntExtLoad, [SDNPHasChain]>;
314 def zextld : SDNode<"ISD::ZEXTLOAD" , SDTIntExtLoad, [SDNPHasChain]>;
315 def extld : SDNode<"ISD::EXTLOAD" , SDTExtLoad, [SDNPHasChain]>;
316 def truncst : SDNode<"ISD::TRUNCSTORE" , SDTTruncStore, [SDNPHasChain]>;
318 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
319 def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, 0, []>, []>;
320 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
322 def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
323 SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>, []>;
324 def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
325 SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
327 // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use
328 // these internally. Don't reference these directly.
329 def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID",
330 SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>,
332 def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN",
333 SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>,
335 def intrinsic_wo_chain : SDNode<"ISD::INTRINSIC_WO_CHAIN",
336 SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, []>;
339 //===----------------------------------------------------------------------===//
340 // Selection DAG Condition Codes
342 class CondCode; // ISD::CondCode enums
343 def SETOEQ : CondCode; def SETOGT : CondCode;
344 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
345 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
346 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
347 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
349 def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
350 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
353 //===----------------------------------------------------------------------===//
354 // Selection DAG Node Transformation Functions.
356 // This mechanism allows targets to manipulate nodes in the output DAG once a
357 // match has been formed. This is typically used to manipulate immediate
360 class SDNodeXForm<SDNode opc, code xformFunction> {
362 code XFormFunction = xformFunction;
365 def NOOP_SDNodeXForm : SDNodeXForm<imm, [{}]>;
368 //===----------------------------------------------------------------------===//
369 // Selection DAG Pattern Fragments.
371 // Pattern fragments are reusable chunks of dags that match specific things.
372 // They can take arguments and have C++ predicates that control whether they
373 // match. They are intended to make the patterns for common instructions more
374 // compact and readable.
377 /// PatFrag - Represents a pattern fragment. This can match something on the
378 /// DAG, frame a single node to multiply nested other fragments.
380 class PatFrag<dag ops, dag frag, code pred = [{}],
381 SDNodeXForm xform = NOOP_SDNodeXForm> {
384 code Predicate = pred;
385 SDNodeXForm OperandTransform = xform;
388 // PatLeaf's are pattern fragments that have no operands. This is just a helper
389 // to define immediates and other common things concisely.
390 class PatLeaf<dag frag, code pred = [{}], SDNodeXForm xform = NOOP_SDNodeXForm>
391 : PatFrag<(ops), frag, pred, xform>;
395 def vtInt : PatLeaf<(vt), [{ return MVT::isInteger(N->getVT()); }]>;
396 def vtFP : PatLeaf<(vt), [{ return MVT::isFloatingPoint(N->getVT()); }]>;
398 def immAllOnes : PatLeaf<(imm), [{ return N->isAllOnesValue(); }]>;
399 def immAllOnesV: PatLeaf<(build_vector), [{
400 return ISD::isBuildVectorAllOnes(N);
402 def immAllZerosV: PatLeaf<(build_vector), [{
403 return ISD::isBuildVectorAllZeros(N);
406 def immAllOnesV_bc: PatLeaf<(bitconvert), [{
407 return ISD::isBuildVectorAllOnes(N);
411 // Other helper fragments.
412 def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
413 def vnot : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV)>;
414 def vnot_conv : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV_bc)>;
415 def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;
417 // extending load & truncstore fragments.
418 def sextload : PatFrag<(ops node:$ptr, node:$vt),
419 (sextld node:$ptr, srcvalue:$dummy, node:$vt)>;
420 def zextload : PatFrag<(ops node:$ptr, node:$vt),
421 (zextld node:$ptr, srcvalue:$dummy, node:$vt)>;
422 def extload : PatFrag<(ops node:$ptr, node:$vt),
423 (extld node:$ptr, srcvalue:$dummy, node:$vt)>;
424 def truncstore : PatFrag<(ops node:$val, node:$ptr, node:$vt),
425 (truncst node:$val, node:$ptr, srcvalue:$dummy,
428 // setcc convenience fragments.
429 def setoeq : PatFrag<(ops node:$lhs, node:$rhs),
430 (setcc node:$lhs, node:$rhs, SETOEQ)>;
431 def setogt : PatFrag<(ops node:$lhs, node:$rhs),
432 (setcc node:$lhs, node:$rhs, SETOGT)>;
433 def setoge : PatFrag<(ops node:$lhs, node:$rhs),
434 (setcc node:$lhs, node:$rhs, SETOGE)>;
435 def setolt : PatFrag<(ops node:$lhs, node:$rhs),
436 (setcc node:$lhs, node:$rhs, SETOLT)>;
437 def setole : PatFrag<(ops node:$lhs, node:$rhs),
438 (setcc node:$lhs, node:$rhs, SETOLE)>;
439 def setone : PatFrag<(ops node:$lhs, node:$rhs),
440 (setcc node:$lhs, node:$rhs, SETONE)>;
441 def seto : PatFrag<(ops node:$lhs, node:$rhs),
442 (setcc node:$lhs, node:$rhs, SETO)>;
443 def setuo : PatFrag<(ops node:$lhs, node:$rhs),
444 (setcc node:$lhs, node:$rhs, SETUO)>;
445 def setueq : PatFrag<(ops node:$lhs, node:$rhs),
446 (setcc node:$lhs, node:$rhs, SETUEQ)>;
447 def setugt : PatFrag<(ops node:$lhs, node:$rhs),
448 (setcc node:$lhs, node:$rhs, SETUGT)>;
449 def setuge : PatFrag<(ops node:$lhs, node:$rhs),
450 (setcc node:$lhs, node:$rhs, SETUGE)>;
451 def setult : PatFrag<(ops node:$lhs, node:$rhs),
452 (setcc node:$lhs, node:$rhs, SETULT)>;
453 def setule : PatFrag<(ops node:$lhs, node:$rhs),
454 (setcc node:$lhs, node:$rhs, SETULE)>;
455 def setune : PatFrag<(ops node:$lhs, node:$rhs),
456 (setcc node:$lhs, node:$rhs, SETUNE)>;
457 def seteq : PatFrag<(ops node:$lhs, node:$rhs),
458 (setcc node:$lhs, node:$rhs, SETEQ)>;
459 def setgt : PatFrag<(ops node:$lhs, node:$rhs),
460 (setcc node:$lhs, node:$rhs, SETGT)>;
461 def setge : PatFrag<(ops node:$lhs, node:$rhs),
462 (setcc node:$lhs, node:$rhs, SETGE)>;
463 def setlt : PatFrag<(ops node:$lhs, node:$rhs),
464 (setcc node:$lhs, node:$rhs, SETLT)>;
465 def setle : PatFrag<(ops node:$lhs, node:$rhs),
466 (setcc node:$lhs, node:$rhs, SETLE)>;
467 def setne : PatFrag<(ops node:$lhs, node:$rhs),
468 (setcc node:$lhs, node:$rhs, SETNE)>;
470 //===----------------------------------------------------------------------===//
471 // Selection DAG Pattern Support.
473 // Patterns are what are actually matched against the target-flavored
474 // instruction selection DAG. Instructions defined by the target implicitly
475 // define patterns in most cases, but patterns can also be explicitly added when
476 // an operation is defined by a sequence of instructions (e.g. loading a large
477 // immediate value on RISC targets that do not support immediates as large as
481 class Pattern<dag patternToMatch, list<dag> resultInstrs> {
482 dag PatternToMatch = patternToMatch;
483 list<dag> ResultInstrs = resultInstrs;
484 list<Predicate> Predicates = []; // See class Instruction in Target.td.
485 int AddedComplexity = 0; // See class Instruction in Target.td.
488 // Pat - A simple (but common) form of a pattern, which produces a simple result
489 // not needing a full list.
490 class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
492 //===----------------------------------------------------------------------===//
493 // Complex pattern definitions.
495 // Complex patterns, e.g. X86 addressing mode, requires pattern matching code
496 // in C++. NumOperands is the number of operands returned by the select function;
497 // SelectFunc is the name of the function used to pattern match the max. pattern;
498 // RootNodes are the list of possible root nodes of the sub-dags to match.
499 // e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>;
501 class ComplexPattern<ValueType ty, int numops, string fn, list<SDNode> roots = []> {
503 int NumOperands = numops;
504 string SelectFunc = fn;
505 list<SDNode> RootNodes = roots;
508 //===----------------------------------------------------------------------===//
511 def SDT_dwarf_loc : SDTypeProfile<0, 3,
512 [SDTCisInt<0>, SDTCisInt<1>, SDTCisInt<2>]>;
513 def dwarf_loc : SDNode<"ISD::DEBUG_LOC", SDT_dwarf_loc,[SDNPHasChain]>;
515 def SDT_dwarf_label : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
516 def dwarf_label : SDNode<"ISD::DEBUG_LABEL", SDT_dwarf_label,[SDNPHasChain]>;