1 //==- WebAssemblyDisassembler.cpp - Disassembler for WebAssembly -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This file is part of the WebAssembly Disassembler.
13 /// It contains code to translate the data produced by the decoder into
16 //===----------------------------------------------------------------------===//
18 #include "WebAssembly.h"
19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
20 #include "llvm/MC/MCContext.h"
21 #include "llvm/MC/MCDisassembler.h"
22 #include "llvm/MC/MCInst.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCSubtargetInfo.h"
25 #include "llvm/MC/MCSymbol.h"
26 #include "llvm/Support/Endian.h"
27 #include "llvm/Support/TargetRegistry.h"
30 #define DEBUG_TYPE "wasm-disassembler"
33 class WebAssemblyDisassembler final : public MCDisassembler {
34 std::unique_ptr<const MCInstrInfo> MCII;
36 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
37 ArrayRef<uint8_t> Bytes, uint64_t Address,
39 raw_ostream &CStream) const override;
42 WebAssemblyDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
43 std::unique_ptr<const MCInstrInfo> MCII)
44 : MCDisassembler(STI, Ctx), MCII(std::move(MCII)) {}
46 } // end anonymous namespace
48 static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
49 const MCSubtargetInfo &STI,
51 std::unique_ptr<const MCInstrInfo> MCII(T.createMCInstrInfo());
52 return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII));
55 extern "C" void LLVMInitializeWebAssemblyDisassembler() {
56 // Register the disassembler for each target.
57 TargetRegistry::RegisterMCDisassembler(TheWebAssemblyTarget32,
58 createWebAssemblyDisassembler);
59 TargetRegistry::RegisterMCDisassembler(TheWebAssemblyTarget64,
60 createWebAssemblyDisassembler);
63 MCDisassembler::DecodeStatus WebAssemblyDisassembler::getInstruction(
64 MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t /*Address*/,
65 raw_ostream &OS, raw_ostream &CS) const {
70 if (Pos + sizeof(uint64_t) > Bytes.size())
71 return MCDisassembler::Fail;
72 uint64_t Opcode = support::endian::read64le(Bytes.data() + Pos);
73 Pos += sizeof(uint64_t);
75 if (Opcode >= WebAssembly::INSTRUCTION_LIST_END)
76 return MCDisassembler::Fail;
79 const MCInstrDesc &Desc = MCII->get(Opcode);
80 unsigned NumFixedOperands = Desc.NumOperands;
82 // If it's variadic, read the number of extra operands.
83 unsigned NumExtraOperands = 0;
84 if (Desc.isVariadic()) {
85 if (Pos + sizeof(uint64_t) > Bytes.size())
86 return MCDisassembler::Fail;
87 NumExtraOperands = support::endian::read64le(Bytes.data() + Pos);
88 Pos += sizeof(uint64_t);
91 // Read the fixed operands. These are described by the MCInstrDesc.
92 for (unsigned i = 0; i < NumFixedOperands; ++i) {
93 const MCOperandInfo &Info = Desc.OpInfo[i];
94 switch (Info.OperandType) {
95 case MCOI::OPERAND_IMMEDIATE:
96 case WebAssembly::OPERAND_BASIC_BLOCK: {
97 if (Pos + sizeof(uint64_t) > Bytes.size())
98 return MCDisassembler::Fail;
99 uint64_t Imm = support::endian::read64le(Bytes.data() + Pos);
100 Pos += sizeof(uint64_t);
101 MI.addOperand(MCOperand::createImm(Imm));
104 case MCOI::OPERAND_REGISTER: {
105 if (Pos + sizeof(uint64_t) > Bytes.size())
106 return MCDisassembler::Fail;
107 uint64_t Reg = support::endian::read64le(Bytes.data() + Pos);
108 Pos += sizeof(uint64_t);
109 MI.addOperand(MCOperand::createReg(Reg));
112 case WebAssembly::OPERAND_FPIMM: {
113 // TODO: MC converts all floating point immediate operands to double.
114 // This is fine for numeric values, but may cause NaNs to change bits.
115 if (Pos + sizeof(uint64_t) > Bytes.size())
116 return MCDisassembler::Fail;
117 uint64_t Bits = support::endian::read64le(Bytes.data() + Pos);
118 Pos += sizeof(uint64_t);
120 memcpy(&Imm, &Bits, sizeof(Imm));
121 MI.addOperand(MCOperand::createFPImm(Imm));
125 llvm_unreachable("unimplemented operand kind");
129 // Read the extra operands.
130 assert(NumExtraOperands == 0 || Desc.isVariadic());
131 for (unsigned i = 0; i < NumExtraOperands; ++i) {
132 if (Pos + sizeof(uint64_t) > Bytes.size())
133 return MCDisassembler::Fail;
134 if (Desc.TSFlags & WebAssemblyII::VariableOpIsImmediate) {
135 // Decode extra immediate operands.
136 uint64_t Imm = support::endian::read64le(Bytes.data() + Pos);
137 MI.addOperand(MCOperand::createImm(Imm));
139 // Decode extra register operands.
140 uint64_t Reg = support::endian::read64le(Bytes.data() + Pos);
141 MI.addOperand(MCOperand::createReg(Reg));
143 Pos += sizeof(uint64_t);
147 return MCDisassembler::Success;