1 //=- WebAssemblyISelLowering.cpp - WebAssembly DAG Lowering Implementation -==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This file implements the WebAssemblyTargetLowering class.
13 //===----------------------------------------------------------------------===//
15 #include "WebAssemblyISelLowering.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "WebAssemblyMachineFunctionInfo.h"
18 #include "WebAssemblySubtarget.h"
19 #include "WebAssemblyTargetMachine.h"
20 #include "WebAssemblyTargetObjectFile.h"
21 #include "llvm/CodeGen/Analysis.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/SelectionDAG.h"
24 #include "llvm/IR/DiagnosticInfo.h"
25 #include "llvm/IR/DiagnosticPrinter.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/IR/Intrinsics.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/ErrorHandling.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetOptions.h"
36 #define DEBUG_TYPE "wasm-lower"
39 // Diagnostic information for unimplemented or unsupported feature reporting.
40 // FIXME copied from BPF and AMDGPU.
41 class DiagnosticInfoUnsupported : public DiagnosticInfo {
43 // Debug location where this diagnostic is triggered.
45 const Twine &Description;
51 static int getKindID() {
53 KindID = llvm::getNextAvailablePluginDiagnosticKind();
58 DiagnosticInfoUnsupported(SDLoc DLoc, const Function &Fn, const Twine &Desc,
60 : DiagnosticInfo(getKindID(), DS_Error), DLoc(DLoc.getDebugLoc()),
61 Description(Desc), Fn(Fn), Value(Value) {}
63 void print(DiagnosticPrinter &DP) const override {
65 raw_string_ostream OS(Str);
68 auto DIL = DLoc.get();
69 StringRef Filename = DIL->getFilename();
70 unsigned Line = DIL->getLine();
71 unsigned Column = DIL->getColumn();
72 OS << Filename << ':' << Line << ':' << Column << ' ';
75 OS << "in function " << Fn.getName() << ' ' << *Fn.getFunctionType() << '\n'
84 static bool classof(const DiagnosticInfo *DI) {
85 return DI->getKind() == getKindID();
89 int DiagnosticInfoUnsupported::KindID = 0;
90 } // end anonymous namespace
92 WebAssemblyTargetLowering::WebAssemblyTargetLowering(
93 const TargetMachine &TM, const WebAssemblySubtarget &STI)
94 : TargetLowering(TM), Subtarget(&STI) {
95 // Booleans always contain 0 or 1.
96 setBooleanContents(ZeroOrOneBooleanContent);
97 // WebAssembly does not produce floating-point exceptions on normal floating
99 setHasFloatingPointExceptions(false);
100 // We don't know the microarchitecture here, so just reduce register pressure.
101 setSchedulingPreference(Sched::RegPressure);
102 // Tell ISel that we have a stack pointer.
103 setStackPointerRegisterToSaveRestore(
104 Subtarget->hasAddr64() ? WebAssembly::SP64 : WebAssembly::SP32);
105 // Set up the register classes.
106 addRegisterClass(MVT::i32, &WebAssembly::Int32RegClass);
107 addRegisterClass(MVT::i64, &WebAssembly::Int64RegClass);
108 addRegisterClass(MVT::f32, &WebAssembly::Float32RegClass);
109 addRegisterClass(MVT::f64, &WebAssembly::Float64RegClass);
110 // Compute derived properties from the register classes.
111 computeRegisterProperties(Subtarget->getRegisterInfo());
113 // FIXME: many setOperationAction are missing...
115 for (auto T : {MVT::f32, MVT::f64}) {
116 // Don't expand the floating-point types to constant pools.
117 setOperationAction(ISD::ConstantFP, T, Legal);
118 // Expand floating-point comparisons.
119 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
120 ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
121 setCondCodeAction(CC, T, Expand);
122 // Expand floating-point library function operators.
123 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW,
124 ISD::FLOG, ISD::FLOG2, ISD::FLOG10, ISD::FEXP, ISD::FEXP2,
125 ISD::FMINNAN, ISD::FMAXNAN})
126 setOperationAction(Op, T, Expand);
129 for (auto T : {MVT::i32, MVT::i64}) {
130 // Expand unavailable integer operations.
131 for (auto Op : {ISD::BSWAP, ISD::ROTL, ISD::ROTR,
132 ISD::SMUL_LOHI, ISD::UMUL_LOHI,
133 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM,
134 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
135 ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) {
136 setOperationAction(Op, T, Expand);
140 // As a special case, these operators use the type to mean the type to
142 for (auto T : {MVT::i1, MVT::i8, MVT::i16})
143 setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand);
145 // Dynamic stack allocation: use the default expansion.
146 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
147 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
148 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
151 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
153 return VT.getSimpleVT();
157 WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
158 switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
159 case WebAssemblyISD::FIRST_NUMBER: break;
160 case WebAssemblyISD::RETURN: return "WebAssemblyISD::RETURN";
161 case WebAssemblyISD::ARGUMENT: return "WebAssemblyISD::ARGUMENT";
166 //===----------------------------------------------------------------------===//
167 // WebAssembly Lowering private implementation.
168 //===----------------------------------------------------------------------===//
170 //===----------------------------------------------------------------------===//
172 //===----------------------------------------------------------------------===//
174 static void fail(SDLoc DL, SelectionDAG &DAG, const char *msg) {
175 MachineFunction &MF = DAG.getMachineFunction();
176 DAG.getContext()->diagnose(
177 DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue()));
180 bool WebAssemblyTargetLowering::CanLowerReturn(
181 CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
182 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
183 // WebAssembly can't currently handle returning tuples.
184 return Outs.size() <= 1;
187 SDValue WebAssemblyTargetLowering::LowerReturn(
188 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
189 const SmallVectorImpl<ISD::OutputArg> &Outs,
190 const SmallVectorImpl<SDValue> &OutVals, SDLoc DL,
191 SelectionDAG &DAG) const {
193 assert(Outs.size() <= 1 && "WebAssembly can only return up to one value");
194 if (CallConv != CallingConv::C)
195 fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
197 fail(DL, DAG, "WebAssembly doesn't support varargs yet");
199 SmallVector<SDValue, 4> RetOps(1, Chain);
200 RetOps.append(OutVals.begin(), OutVals.end());
201 Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps);
206 SDValue WebAssemblyTargetLowering::LowerFormalArguments(
207 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
208 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
209 SmallVectorImpl<SDValue> &InVals) const {
210 MachineFunction &MF = DAG.getMachineFunction();
212 if (CallConv != CallingConv::C)
213 fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
215 fail(DL, DAG, "WebAssembly doesn't support varargs yet");
216 if (MF.getFunction()->hasStructRetAttr())
217 fail(DL, DAG, "WebAssembly doesn't support struct return yet");
220 for (const ISD::InputArg &In : Ins) {
221 if (In.Flags.isZExt())
222 fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
223 if (In.Flags.isSExt())
224 fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
225 if (In.Flags.isInReg())
226 fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
227 if (In.Flags.isSRet())
228 fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
229 if (In.Flags.isByVal())
230 fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
231 if (In.Flags.isInAlloca())
232 fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
233 if (In.Flags.isNest())
234 fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
235 if (In.Flags.isReturned())
236 fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
237 if (In.Flags.isInConsecutiveRegs())
238 fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
239 if (In.Flags.isInConsecutiveRegsLast())
240 fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
241 if (In.Flags.isSplit())
242 fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
243 // FIXME Do something with In.getOrigAlign()?
246 ? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
247 DAG.getTargetConstant(ArgNo, DL, MVT::i32))
248 : DAG.getNode(ISD::UNDEF, DL, In.VT));
255 //===----------------------------------------------------------------------===//
256 // Other Lowering Code
257 //===----------------------------------------------------------------------===//
259 //===----------------------------------------------------------------------===//
260 // WebAssembly Optimization Hooks
261 //===----------------------------------------------------------------------===//
263 MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal(
264 const GlobalValue *GV, SectionKind Kind, Mangler &Mang,
265 const TargetMachine &TM) const {
266 return getDataSection();