1 // WebAssemblyInstrMemory.td-WebAssembly Memory codegen support -*- tablegen -*-
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief WebAssembly Memory operand code-gen constructs.
13 //===----------------------------------------------------------------------===//
17 // - WebAssemblyTargetLowering having to do with atomics
18 // - Each has optional alignment.
20 // WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16
21 // local types. These memory-only types instead zero- or sign-extend into local
22 // types when loading, and truncate when storing.
24 // WebAssembly constant offsets are performed as unsigned with infinite
25 // precision, so we need to check for NoUnsignedWrap so that we don't fold an
26 // offset for an add that needs wrapping.
27 def regPlusImm : PatFrag<(ops node:$addr, node:$off),
28 (add node:$addr, node:$off),
29 [{ return N->getFlags()->hasNoUnsignedWrap(); }]>;
31 // GlobalAddresses are conceptually unsigned values, so we can also fold them
32 // into immediate values as long as their offsets are non-negative.
33 def regPlusGA : PatFrag<(ops node:$addr, node:$off),
34 (add node:$addr, node:$off),
36 return N->getFlags()->hasNoUnsignedWrap() ||
37 (N->getOperand(1)->getOpcode() == WebAssemblyISD::Wrapper &&
38 isa<GlobalAddressSDNode>(N->getOperand(1)->getOperand(0)) &&
39 cast<GlobalAddressSDNode>(N->getOperand(1)->getOperand(0))
43 // We don't need a regPlusES because external symbols never have constant
44 // offsets folded into them, so we can just use add.
46 let Defs = [ARGUMENTS] in {
49 def LOAD_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [],
50 "i32.load\t$dst, ${off}(${addr})">;
51 def LOAD_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
52 "i64.load\t$dst, ${off}(${addr})">;
53 def LOAD_F32 : I<(outs F32:$dst), (ins i32imm:$off, I32:$addr), [],
54 "f32.load\t$dst, ${off}(${addr})">;
55 def LOAD_F64 : I<(outs F64:$dst), (ins i32imm:$off, I32:$addr), [],
56 "f64.load\t$dst, ${off}(${addr})">;
58 } // Defs = [ARGUMENTS]
60 // Select loads with no constant offset.
61 def : Pat<(i32 (load I32:$addr)), (LOAD_I32 0, $addr)>;
62 def : Pat<(i64 (load I32:$addr)), (LOAD_I64 0, $addr)>;
63 def : Pat<(f32 (load I32:$addr)), (LOAD_F32 0, $addr)>;
64 def : Pat<(f64 (load I32:$addr)), (LOAD_F64 0, $addr)>;
66 // Select loads with a constant offset.
67 def : Pat<(i32 (load (regPlusImm I32:$addr, imm:$off))),
68 (LOAD_I32 imm:$off, $addr)>;
69 def : Pat<(i64 (load (regPlusImm I32:$addr, imm:$off))),
70 (LOAD_I64 imm:$off, $addr)>;
71 def : Pat<(f32 (load (regPlusImm I32:$addr, imm:$off))),
72 (LOAD_F32 imm:$off, $addr)>;
73 def : Pat<(f64 (load (regPlusImm I32:$addr, imm:$off))),
74 (LOAD_F64 imm:$off, $addr)>;
75 def : Pat<(i32 (load (regPlusGA I32:$addr,
76 (WebAssemblywrapper tglobaladdr:$off)))),
77 (LOAD_I32 tglobaladdr:$off, $addr)>;
78 def : Pat<(i64 (load (regPlusGA I32:$addr,
79 (WebAssemblywrapper tglobaladdr:$off)))),
80 (LOAD_I64 tglobaladdr:$off, $addr)>;
81 def : Pat<(f32 (load (regPlusGA I32:$addr,
82 (WebAssemblywrapper tglobaladdr:$off)))),
83 (LOAD_F32 tglobaladdr:$off, $addr)>;
84 def : Pat<(f64 (load (regPlusGA I32:$addr,
85 (WebAssemblywrapper tglobaladdr:$off)))),
86 (LOAD_F64 tglobaladdr:$off, $addr)>;
87 def : Pat<(i32 (load (add I32:$addr, (WebAssemblywrapper texternalsym:$off)))),
88 (LOAD_I32 texternalsym:$off, $addr)>;
89 def : Pat<(i64 (load (add I32:$addr, (WebAssemblywrapper texternalsym:$off)))),
90 (LOAD_I64 texternalsym:$off, $addr)>;
91 def : Pat<(f32 (load (add I32:$addr, (WebAssemblywrapper texternalsym:$off)))),
92 (LOAD_F32 texternalsym:$off, $addr)>;
93 def : Pat<(f64 (load (add I32:$addr, (WebAssemblywrapper texternalsym:$off)))),
94 (LOAD_F64 texternalsym:$off, $addr)>;
96 // Select loads with just a constant offset.
97 def : Pat<(i32 (load imm:$off)), (LOAD_I32 imm:$off, (CONST_I32 0))>;
98 def : Pat<(i64 (load imm:$off)), (LOAD_I64 imm:$off, (CONST_I32 0))>;
99 def : Pat<(f32 (load imm:$off)), (LOAD_F32 imm:$off, (CONST_I32 0))>;
100 def : Pat<(f64 (load imm:$off)), (LOAD_F64 imm:$off, (CONST_I32 0))>;
101 def : Pat<(i32 (load (WebAssemblywrapper tglobaladdr:$off))),
102 (LOAD_I32 tglobaladdr:$off, (CONST_I32 0))>;
103 def : Pat<(i64 (load (WebAssemblywrapper tglobaladdr:$off))),
104 (LOAD_I64 tglobaladdr:$off, (CONST_I32 0))>;
105 def : Pat<(f32 (load (WebAssemblywrapper tglobaladdr:$off))),
106 (LOAD_F32 tglobaladdr:$off, (CONST_I32 0))>;
107 def : Pat<(f64 (load (WebAssemblywrapper tglobaladdr:$off))),
108 (LOAD_F64 tglobaladdr:$off, (CONST_I32 0))>;
109 def : Pat<(i32 (load (WebAssemblywrapper texternalsym:$off))),
110 (LOAD_I32 texternalsym:$off, (CONST_I32 0))>;
111 def : Pat<(i64 (load (WebAssemblywrapper texternalsym:$off))),
112 (LOAD_I64 texternalsym:$off, (CONST_I32 0))>;
113 def : Pat<(f32 (load (WebAssemblywrapper texternalsym:$off))),
114 (LOAD_F32 texternalsym:$off, (CONST_I32 0))>;
115 def : Pat<(f64 (load (WebAssemblywrapper texternalsym:$off))),
116 (LOAD_F64 texternalsym:$off, (CONST_I32 0))>;
118 let Defs = [ARGUMENTS] in {
121 def LOAD8_S_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [],
122 "i32.load8_s\t$dst, ${off}(${addr})">;
123 def LOAD8_U_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [],
124 "i32.load8_u\t$dst, ${off}(${addr})">;
125 def LOAD16_S_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [],
126 "i32.load16_s\t$dst, ${off}(${addr})">;
127 def LOAD16_U_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [],
128 "i32.load16_u\t$dst, ${off}(${addr})">;
129 def LOAD8_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
130 "i64.load8_s\t$dst, ${off}(${addr})">;
131 def LOAD8_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
132 "i64.load8_u\t$dst, ${off}(${addr})">;
133 def LOAD16_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
134 "i64.load16_s\t$dst, ${off}(${addr})">;
135 def LOAD16_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
136 "i64.load16_u\t$dst, ${off}(${addr})">;
137 def LOAD32_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
138 "i64.load32_s\t$dst, ${off}(${addr})">;
139 def LOAD32_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [],
140 "i64.load32_u\t$dst, ${off}(${addr})">;
142 } // Defs = [ARGUMENTS]
144 // Select extending loads with no constant offset.
145 def : Pat<(i32 (sextloadi8 I32:$addr)), (LOAD8_S_I32 0, $addr)>;
146 def : Pat<(i32 (zextloadi8 I32:$addr)), (LOAD8_U_I32 0, $addr)>;
147 def : Pat<(i32 (sextloadi16 I32:$addr)), (LOAD16_S_I32 0, $addr)>;
148 def : Pat<(i32 (zextloadi16 I32:$addr)), (LOAD16_U_I32 0, $addr)>;
149 def : Pat<(i64 (sextloadi8 I32:$addr)), (LOAD8_S_I64 0, $addr)>;
150 def : Pat<(i64 (zextloadi8 I32:$addr)), (LOAD8_U_I64 0, $addr)>;
151 def : Pat<(i64 (sextloadi16 I32:$addr)), (LOAD16_S_I64 0, $addr)>;
152 def : Pat<(i64 (zextloadi16 I32:$addr)), (LOAD16_U_I64 0, $addr)>;
153 def : Pat<(i64 (sextloadi32 I32:$addr)), (LOAD32_S_I64 0, $addr)>;
154 def : Pat<(i64 (zextloadi32 I32:$addr)), (LOAD32_U_I64 0, $addr)>;
156 // Select extending loads with a constant offset.
157 def : Pat<(i32 (sextloadi8 (regPlusImm I32:$addr, imm:$off))),
158 (LOAD8_S_I32 imm:$off, $addr)>;
159 def : Pat<(i32 (zextloadi8 (regPlusImm I32:$addr, imm:$off))),
160 (LOAD8_U_I32 imm:$off, $addr)>;
161 def : Pat<(i32 (sextloadi16 (regPlusImm I32:$addr, imm:$off))),
162 (LOAD16_S_I32 imm:$off, $addr)>;
163 def : Pat<(i32 (zextloadi16 (regPlusImm I32:$addr, imm:$off))),
164 (LOAD16_U_I32 imm:$off, $addr)>;
165 def : Pat<(i64 (sextloadi8 (regPlusImm I32:$addr, imm:$off))),
166 (LOAD8_S_I64 imm:$off, $addr)>;
167 def : Pat<(i64 (zextloadi8 (regPlusImm I32:$addr, imm:$off))),
168 (LOAD8_U_I64 imm:$off, $addr)>;
169 def : Pat<(i64 (sextloadi16 (regPlusImm I32:$addr, imm:$off))),
170 (LOAD16_S_I64 imm:$off, $addr)>;
171 def : Pat<(i64 (zextloadi16 (regPlusImm I32:$addr, imm:$off))),
172 (LOAD16_U_I64 imm:$off, $addr)>;
173 def : Pat<(i64 (sextloadi32 (regPlusImm I32:$addr, imm:$off))),
174 (LOAD32_S_I64 imm:$off, $addr)>;
175 def : Pat<(i64 (zextloadi32 (regPlusImm I32:$addr, imm:$off))),
176 (LOAD32_U_I64 imm:$off, $addr)>;
177 def : Pat<(i32 (sextloadi8 (regPlusGA I32:$addr,
178 (WebAssemblywrapper tglobaladdr:$off)))),
179 (LOAD8_S_I32 tglobaladdr:$off, $addr)>;
180 def : Pat<(i32 (zextloadi8 (regPlusGA I32:$addr,
181 (WebAssemblywrapper tglobaladdr:$off)))),
182 (LOAD8_U_I32 tglobaladdr:$off, $addr)>;
183 def : Pat<(i32 (sextloadi16 (regPlusGA I32:$addr,
184 (WebAssemblywrapper tglobaladdr:$off)))),
185 (LOAD16_S_I32 tglobaladdr:$off, $addr)>;
186 def : Pat<(i32 (zextloadi16 (regPlusGA I32:$addr,
187 (WebAssemblywrapper tglobaladdr:$off)))),
188 (LOAD16_U_I32 tglobaladdr:$off, $addr)>;
189 def : Pat<(i64 (sextloadi8 (regPlusGA I32:$addr,
190 (WebAssemblywrapper tglobaladdr:$off)))),
191 (LOAD8_S_I64 tglobaladdr:$off, $addr)>;
192 def : Pat<(i64 (zextloadi8 (regPlusGA I32:$addr,
193 (WebAssemblywrapper tglobaladdr:$off)))),
194 (LOAD8_U_I64 tglobaladdr:$off, $addr)>;
195 def : Pat<(i64 (sextloadi16 (regPlusGA I32:$addr,
196 (WebAssemblywrapper tglobaladdr:$off)))),
197 (LOAD16_S_I64 tglobaladdr:$off, $addr)>;
198 def : Pat<(i64 (zextloadi16 (regPlusGA I32:$addr,
199 (WebAssemblywrapper tglobaladdr:$off)))),
200 (LOAD16_U_I64 tglobaladdr:$off, $addr)>;
201 def : Pat<(i64 (sextloadi32 (regPlusGA I32:$addr,
202 (WebAssemblywrapper tglobaladdr:$off)))),
203 (LOAD32_S_I64 tglobaladdr:$off, $addr)>;
204 def : Pat<(i64 (zextloadi32 (regPlusGA I32:$addr,
205 (WebAssemblywrapper tglobaladdr:$off)))),
206 (LOAD32_U_I64 tglobaladdr:$off, $addr)>;
207 def : Pat<(i32 (sextloadi8 (add I32:$addr,
208 (WebAssemblywrapper texternalsym:$off)))),
209 (LOAD8_S_I32 texternalsym:$off, $addr)>;
210 def : Pat<(i32 (zextloadi8 (add I32:$addr,
211 (WebAssemblywrapper texternalsym:$off)))),
212 (LOAD8_U_I32 texternalsym:$off, $addr)>;
213 def : Pat<(i32 (sextloadi16 (add I32:$addr,
214 (WebAssemblywrapper texternalsym:$off)))),
215 (LOAD16_S_I32 texternalsym:$off, $addr)>;
216 def : Pat<(i32 (zextloadi16 (add I32:$addr,
217 (WebAssemblywrapper texternalsym:$off)))),
218 (LOAD16_U_I32 texternalsym:$off, $addr)>;
219 def : Pat<(i64 (sextloadi8 (add I32:$addr,
220 (WebAssemblywrapper texternalsym:$off)))),
221 (LOAD8_S_I64 texternalsym:$off, $addr)>;
222 def : Pat<(i64 (zextloadi8 (add I32:$addr,
223 (WebAssemblywrapper texternalsym:$off)))),
224 (LOAD8_U_I64 texternalsym:$off, $addr)>;
225 def : Pat<(i64 (sextloadi16 (add I32:$addr,
226 (WebAssemblywrapper texternalsym:$off)))),
227 (LOAD16_S_I64 texternalsym:$off, $addr)>;
228 def : Pat<(i64 (zextloadi16 (add I32:$addr,
229 (WebAssemblywrapper texternalsym:$off)))),
230 (LOAD16_U_I64 texternalsym:$off, $addr)>;
231 def : Pat<(i64 (sextloadi32 (add I32:$addr,
232 (WebAssemblywrapper texternalsym:$off)))),
233 (LOAD32_S_I64 texternalsym:$off, $addr)>;
234 def : Pat<(i64 (zextloadi32 (add I32:$addr,
235 (WebAssemblywrapper texternalsym:$off)))),
236 (LOAD32_U_I64 texternalsym:$off, $addr)>;
238 // Select extending loads with just a constant offset.
239 def : Pat<(i32 (sextloadi8 imm:$off)), (LOAD8_S_I32 imm:$off, (CONST_I32 0))>;
240 def : Pat<(i32 (zextloadi8 imm:$off)), (LOAD8_U_I32 imm:$off, (CONST_I32 0))>;
241 def : Pat<(i32 (sextloadi16 imm:$off)), (LOAD16_S_I32 imm:$off, (CONST_I32 0))>;
242 def : Pat<(i32 (zextloadi16 imm:$off)), (LOAD16_U_I32 imm:$off, (CONST_I32 0))>;
243 def : Pat<(i64 (sextloadi8 imm:$off)), (LOAD8_S_I64 imm:$off, (CONST_I32 0))>;
244 def : Pat<(i64 (zextloadi8 imm:$off)), (LOAD8_U_I64 imm:$off, (CONST_I32 0))>;
245 def : Pat<(i64 (sextloadi16 imm:$off)), (LOAD16_S_I64 imm:$off, (CONST_I32 0))>;
246 def : Pat<(i64 (zextloadi16 imm:$off)), (LOAD16_U_I64 imm:$off, (CONST_I32 0))>;
247 def : Pat<(i64 (sextloadi32 imm:$off)), (LOAD32_S_I64 imm:$off, (CONST_I32 0))>;
248 def : Pat<(i64 (zextloadi32 imm:$off)), (LOAD32_U_I64 imm:$off, (CONST_I32 0))>;
249 def : Pat<(i32 (sextloadi8 (WebAssemblywrapper tglobaladdr:$off))),
250 (LOAD8_S_I32 tglobaladdr:$off, (CONST_I32 0))>;
251 def : Pat<(i32 (zextloadi8 (WebAssemblywrapper tglobaladdr:$off))),
252 (LOAD8_U_I32 tglobaladdr:$off, (CONST_I32 0))>;
253 def : Pat<(i32 (sextloadi16 (WebAssemblywrapper tglobaladdr:$off))),
254 (LOAD16_S_I32 tglobaladdr:$off, (CONST_I32 0))>;
255 def : Pat<(i32 (zextloadi16 (WebAssemblywrapper tglobaladdr:$off))),
256 (LOAD16_U_I32 tglobaladdr:$off, (CONST_I32 0))>;
257 def : Pat<(i64 (sextloadi8 (WebAssemblywrapper tglobaladdr:$off))),
258 (LOAD8_S_I64 tglobaladdr:$off, (CONST_I32 0))>;
259 def : Pat<(i64 (zextloadi8 (WebAssemblywrapper tglobaladdr:$off))),
260 (LOAD8_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
261 def : Pat<(i64 (sextloadi16 (WebAssemblywrapper tglobaladdr:$off))),
262 (LOAD16_S_I64 tglobaladdr:$off, (CONST_I32 0))>;
263 def : Pat<(i64 (zextloadi16 (WebAssemblywrapper tglobaladdr:$off))),
264 (LOAD16_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
265 def : Pat<(i64 (sextloadi32 (WebAssemblywrapper tglobaladdr:$off))),
266 (LOAD32_S_I64 tglobaladdr:$off, (CONST_I32 0))>;
267 def : Pat<(i64 (zextloadi32 (WebAssemblywrapper tglobaladdr:$off))),
268 (LOAD32_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
269 def : Pat<(i32 (sextloadi8 (WebAssemblywrapper texternalsym:$off))),
270 (LOAD8_S_I32 texternalsym:$off, (CONST_I32 0))>;
271 def : Pat<(i32 (zextloadi8 (WebAssemblywrapper texternalsym:$off))),
272 (LOAD8_U_I32 texternalsym:$off, (CONST_I32 0))>;
273 def : Pat<(i32 (sextloadi16 (WebAssemblywrapper texternalsym:$off))),
274 (LOAD16_S_I32 texternalsym:$off, (CONST_I32 0))>;
275 def : Pat<(i32 (zextloadi16 (WebAssemblywrapper texternalsym:$off))),
276 (LOAD16_U_I32 texternalsym:$off, (CONST_I32 0))>;
277 def : Pat<(i64 (sextloadi8 (WebAssemblywrapper texternalsym:$off))),
278 (LOAD8_S_I64 texternalsym:$off, (CONST_I32 0))>;
279 def : Pat<(i64 (zextloadi8 (WebAssemblywrapper texternalsym:$off))),
280 (LOAD8_U_I64 texternalsym:$off, (CONST_I32 0))>;
281 def : Pat<(i64 (sextloadi16 (WebAssemblywrapper texternalsym:$off))),
282 (LOAD16_S_I64 texternalsym:$off, (CONST_I32 0))>;
283 def : Pat<(i64 (zextloadi16 (WebAssemblywrapper texternalsym:$off))),
284 (LOAD16_U_I64 texternalsym:$off, (CONST_I32 0))>;
285 def : Pat<(i64 (sextloadi32 (WebAssemblywrapper texternalsym:$off))),
286 (LOAD32_S_I64 texternalsym:$off, (CONST_I32 0))>;
287 def : Pat<(i64 (zextloadi32 (WebAssemblywrapper texternalsym:$off))),
288 (LOAD32_U_I64 texternalsym:$off, (CONST_I32 0))>;
290 // Resolve "don't care" extending loads to zero-extending loads. This is
291 // somewhat arbitrary, but zero-extending is conceptually simpler.
293 // Select "don't care" extending loads with no constant offset.
294 def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 0, $addr)>;
295 def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD16_U_I32 0, $addr)>;
296 def : Pat<(i64 (extloadi8 I32:$addr)), (LOAD8_U_I64 0, $addr)>;
297 def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD16_U_I64 0, $addr)>;
298 def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 0, $addr)>;
300 // Select "don't care" extending loads with a constant offset.
301 def : Pat<(i32 (extloadi8 (regPlusImm I32:$addr, imm:$off))),
302 (LOAD8_U_I32 imm:$off, $addr)>;
303 def : Pat<(i32 (extloadi16 (regPlusImm I32:$addr, imm:$off))),
304 (LOAD16_U_I32 imm:$off, $addr)>;
305 def : Pat<(i64 (extloadi8 (regPlusImm I32:$addr, imm:$off))),
306 (LOAD8_U_I64 imm:$off, $addr)>;
307 def : Pat<(i64 (extloadi16 (regPlusImm I32:$addr, imm:$off))),
308 (LOAD16_U_I64 imm:$off, $addr)>;
309 def : Pat<(i64 (extloadi32 (regPlusImm I32:$addr, imm:$off))),
310 (LOAD32_U_I64 imm:$off, $addr)>;
311 def : Pat<(i32 (extloadi8 (regPlusGA I32:$addr,
312 (WebAssemblywrapper tglobaladdr:$off)))),
313 (LOAD8_U_I32 tglobaladdr:$off, $addr)>;
314 def : Pat<(i32 (extloadi16 (regPlusGA I32:$addr,
315 (WebAssemblywrapper tglobaladdr:$off)))),
316 (LOAD16_U_I32 tglobaladdr:$off, $addr)>;
317 def : Pat<(i64 (extloadi8 (regPlusGA I32:$addr,
318 (WebAssemblywrapper tglobaladdr:$off)))),
319 (LOAD8_U_I64 tglobaladdr:$off, $addr)>;
320 def : Pat<(i64 (extloadi16 (regPlusGA I32:$addr,
321 (WebAssemblywrapper tglobaladdr:$off)))),
322 (LOAD16_U_I64 tglobaladdr:$off, $addr)>;
323 def : Pat<(i64 (extloadi32 (regPlusGA I32:$addr,
324 (WebAssemblywrapper tglobaladdr:$off)))),
325 (LOAD32_U_I64 tglobaladdr:$off, $addr)>;
326 def : Pat<(i32 (extloadi8 (add I32:$addr,
327 (WebAssemblywrapper texternalsym:$off)))),
328 (LOAD8_U_I32 texternalsym:$off, $addr)>;
329 def : Pat<(i32 (extloadi16 (add I32:$addr,
330 (WebAssemblywrapper texternalsym:$off)))),
331 (LOAD16_U_I32 texternalsym:$off, $addr)>;
332 def : Pat<(i64 (extloadi8 (add I32:$addr,
333 (WebAssemblywrapper texternalsym:$off)))),
334 (LOAD8_U_I64 texternalsym:$off, $addr)>;
335 def : Pat<(i64 (extloadi16 (add I32:$addr,
336 (WebAssemblywrapper texternalsym:$off)))),
337 (LOAD16_U_I64 texternalsym:$off, $addr)>;
338 def : Pat<(i64 (extloadi32 (add I32:$addr,
339 (WebAssemblywrapper texternalsym:$off)))),
340 (LOAD32_U_I64 texternalsym:$off, $addr)>;
342 // Select "don't care" extending loads with just a constant offset.
343 def : Pat<(i32 (extloadi8 imm:$off)), (LOAD8_U_I32 imm:$off, (CONST_I32 0))>;
344 def : Pat<(i32 (extloadi16 imm:$off)), (LOAD16_U_I32 imm:$off, (CONST_I32 0))>;
345 def : Pat<(i64 (extloadi8 imm:$off)), (LOAD8_U_I64 imm:$off, (CONST_I32 0))>;
346 def : Pat<(i64 (extloadi16 imm:$off)), (LOAD16_U_I64 imm:$off, (CONST_I32 0))>;
347 def : Pat<(i64 (extloadi32 imm:$off)), (LOAD32_U_I64 imm:$off, (CONST_I32 0))>;
348 def : Pat<(i32 (extloadi8 (WebAssemblywrapper tglobaladdr:$off))),
349 (LOAD8_U_I32 tglobaladdr:$off, (CONST_I32 0))>;
350 def : Pat<(i32 (extloadi16 (WebAssemblywrapper tglobaladdr:$off))),
351 (LOAD16_U_I32 tglobaladdr:$off, (CONST_I32 0))>;
352 def : Pat<(i64 (extloadi8 (WebAssemblywrapper tglobaladdr:$off))),
353 (LOAD8_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
354 def : Pat<(i64 (extloadi16 (WebAssemblywrapper tglobaladdr:$off))),
355 (LOAD16_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
356 def : Pat<(i64 (extloadi32 (WebAssemblywrapper tglobaladdr:$off))),
357 (LOAD32_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
358 def : Pat<(i32 (extloadi8 (WebAssemblywrapper texternalsym:$off))),
359 (LOAD8_U_I32 texternalsym:$off, (CONST_I32 0))>;
360 def : Pat<(i32 (extloadi16 (WebAssemblywrapper texternalsym:$off))),
361 (LOAD16_U_I32 texternalsym:$off, (CONST_I32 0))>;
362 def : Pat<(i64 (extloadi8 (WebAssemblywrapper texternalsym:$off))),
363 (LOAD8_U_I64 texternalsym:$off, (CONST_I32 0))>;
364 def : Pat<(i64 (extloadi16 (WebAssemblywrapper texternalsym:$off))),
365 (LOAD16_U_I64 texternalsym:$off, (CONST_I32 0))>;
366 def : Pat<(i64 (extloadi32 (WebAssemblywrapper texternalsym:$off))),
367 (LOAD32_U_I64 tglobaladdr:$off, (CONST_I32 0))>;
369 let Defs = [ARGUMENTS] in {
372 // Note that we split the patterns out of the instruction definitions because
373 // WebAssembly's stores return their operand value, and tablegen doesn't like
374 // instruction definition patterns that don't reference all of the output
376 // Note: WebAssembly inverts SelectionDAG's usual operand order.
377 def STORE_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, I32:$val), [],
378 "i32.store\t$dst, ${off}(${addr}), $val">;
379 def STORE_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [],
380 "i64.store\t$dst, ${off}(${addr}), $val">;
381 def STORE_F32 : I<(outs F32:$dst), (ins i32imm:$off, I32:$addr, F32:$val), [],
382 "f32.store\t$dst, ${off}(${addr}), $val">;
383 def STORE_F64 : I<(outs F64:$dst), (ins i32imm:$off, I32:$addr, F64:$val), [],
384 "f64.store\t$dst, ${off}(${addr}), $val">;
386 } // Defs = [ARGUMENTS]
388 // Select stores with no constant offset.
389 def : Pat<(store I32:$val, I32:$addr), (STORE_I32 0, I32:$addr, I32:$val)>;
390 def : Pat<(store I64:$val, I32:$addr), (STORE_I64 0, I32:$addr, I64:$val)>;
391 def : Pat<(store F32:$val, I32:$addr), (STORE_F32 0, I32:$addr, F32:$val)>;
392 def : Pat<(store F64:$val, I32:$addr), (STORE_F64 0, I32:$addr, F64:$val)>;
394 // Select stores with a constant offset.
395 def : Pat<(store I32:$val, (regPlusImm I32:$addr, imm:$off)),
396 (STORE_I32 imm:$off, I32:$addr, I32:$val)>;
397 def : Pat<(store I64:$val, (regPlusImm I32:$addr, imm:$off)),
398 (STORE_I64 imm:$off, I32:$addr, I64:$val)>;
399 def : Pat<(store F32:$val, (regPlusImm I32:$addr, imm:$off)),
400 (STORE_F32 imm:$off, I32:$addr, F32:$val)>;
401 def : Pat<(store F64:$val, (regPlusImm I32:$addr, imm:$off)),
402 (STORE_F64 imm:$off, I32:$addr, F64:$val)>;
403 def : Pat<(store I32:$val, (regPlusGA I32:$addr,
404 (WebAssemblywrapper tglobaladdr:$off))),
405 (STORE_I32 tglobaladdr:$off, I32:$addr, I32:$val)>;
406 def : Pat<(store I64:$val, (regPlusGA I32:$addr,
407 (WebAssemblywrapper tglobaladdr:$off))),
408 (STORE_I64 tglobaladdr:$off, I32:$addr, I64:$val)>;
409 def : Pat<(store F32:$val, (regPlusGA I32:$addr,
410 (WebAssemblywrapper tglobaladdr:$off))),
411 (STORE_F32 tglobaladdr:$off, I32:$addr, F32:$val)>;
412 def : Pat<(store F64:$val, (regPlusGA I32:$addr,
413 (WebAssemblywrapper tglobaladdr:$off))),
414 (STORE_F64 tglobaladdr:$off, I32:$addr, F64:$val)>;
415 def : Pat<(store I32:$val, (add I32:$addr,
416 (WebAssemblywrapper texternalsym:$off))),
417 (STORE_I32 texternalsym:$off, I32:$addr, I32:$val)>;
418 def : Pat<(store I64:$val, (add I32:$addr,
419 (WebAssemblywrapper texternalsym:$off))),
420 (STORE_I64 texternalsym:$off, I32:$addr, I64:$val)>;
421 def : Pat<(store F32:$val, (add I32:$addr,
422 (WebAssemblywrapper texternalsym:$off))),
423 (STORE_F32 texternalsym:$off, I32:$addr, F32:$val)>;
424 def : Pat<(store F64:$val, (add I32:$addr,
425 (WebAssemblywrapper texternalsym:$off))),
426 (STORE_F64 texternalsym:$off, I32:$addr, F64:$val)>;
428 // Select stores with just a constant offset.
429 def : Pat<(store I32:$val, imm:$off),
430 (STORE_I32 imm:$off, (CONST_I32 0), I32:$val)>;
431 def : Pat<(store I64:$val, imm:$off),
432 (STORE_I64 imm:$off, (CONST_I32 0), I64:$val)>;
433 def : Pat<(store F32:$val, imm:$off),
434 (STORE_F32 imm:$off, (CONST_I32 0), F32:$val)>;
435 def : Pat<(store F64:$val, imm:$off),
436 (STORE_F64 imm:$off, (CONST_I32 0), F64:$val)>;
437 def : Pat<(store I32:$val, (WebAssemblywrapper tglobaladdr:$off)),
438 (STORE_I32 tglobaladdr:$off, (CONST_I32 0), I32:$val)>;
439 def : Pat<(store I64:$val, (WebAssemblywrapper tglobaladdr:$off)),
440 (STORE_I64 tglobaladdr:$off, (CONST_I32 0), I64:$val)>;
441 def : Pat<(store F32:$val, (WebAssemblywrapper tglobaladdr:$off)),
442 (STORE_F32 tglobaladdr:$off, (CONST_I32 0), F32:$val)>;
443 def : Pat<(store F64:$val, (WebAssemblywrapper tglobaladdr:$off)),
444 (STORE_F64 tglobaladdr:$off, (CONST_I32 0), F64:$val)>;
445 def : Pat<(store I32:$val, (WebAssemblywrapper texternalsym:$off)),
446 (STORE_I32 texternalsym:$off, (CONST_I32 0), I32:$val)>;
447 def : Pat<(store I64:$val, (WebAssemblywrapper texternalsym:$off)),
448 (STORE_I64 texternalsym:$off, (CONST_I32 0), I64:$val)>;
449 def : Pat<(store F32:$val, (WebAssemblywrapper texternalsym:$off)),
450 (STORE_F32 texternalsym:$off, (CONST_I32 0), F32:$val)>;
451 def : Pat<(store F64:$val, (WebAssemblywrapper texternalsym:$off)),
452 (STORE_F64 texternalsym:$off, (CONST_I32 0), F64:$val)>;
454 let Defs = [ARGUMENTS] in {
457 def STORE8_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, I32:$val), [],
458 "i32.store8\t$dst, ${off}(${addr}), $val">;
459 def STORE16_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, I32:$val), [],
460 "i32.store16\t$dst, ${off}(${addr}), $val">;
461 def STORE8_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [],
462 "i64.store8\t$dst, ${off}(${addr}), $val">;
463 def STORE16_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [],
464 "i64.store16\t$dst, ${off}(${addr}), $val">;
465 def STORE32_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [],
466 "i64.store32\t$dst, ${off}(${addr}), $val">;
468 } // Defs = [ARGUMENTS]
470 // Select truncating stores with no constant offset.
471 def : Pat<(truncstorei8 I32:$val, I32:$addr),
472 (STORE8_I32 0, I32:$addr, I32:$val)>;
473 def : Pat<(truncstorei16 I32:$val, I32:$addr),
474 (STORE16_I32 0, I32:$addr, I32:$val)>;
475 def : Pat<(truncstorei8 I64:$val, I32:$addr),
476 (STORE8_I64 0, I32:$addr, I64:$val)>;
477 def : Pat<(truncstorei16 I64:$val, I32:$addr),
478 (STORE16_I64 0, I32:$addr, I64:$val)>;
479 def : Pat<(truncstorei32 I64:$val, I32:$addr),
480 (STORE32_I64 0, I32:$addr, I64:$val)>;
482 // Select truncating stores with a constant offset.
483 def : Pat<(truncstorei8 I32:$val, (regPlusImm I32:$addr, imm:$off)),
484 (STORE8_I32 imm:$off, I32:$addr, I32:$val)>;
485 def : Pat<(truncstorei16 I32:$val, (regPlusImm I32:$addr, imm:$off)),
486 (STORE16_I32 imm:$off, I32:$addr, I32:$val)>;
487 def : Pat<(truncstorei8 I64:$val, (regPlusImm I32:$addr, imm:$off)),
488 (STORE8_I64 imm:$off, I32:$addr, I64:$val)>;
489 def : Pat<(truncstorei16 I64:$val, (regPlusImm I32:$addr, imm:$off)),
490 (STORE16_I64 imm:$off, I32:$addr, I64:$val)>;
491 def : Pat<(truncstorei32 I64:$val, (regPlusImm I32:$addr, imm:$off)),
492 (STORE32_I64 imm:$off, I32:$addr, I64:$val)>;
493 def : Pat<(truncstorei8 I32:$val,
494 (regPlusGA I32:$addr,
495 (WebAssemblywrapper tglobaladdr:$off))),
496 (STORE8_I32 tglobaladdr:$off, I32:$addr, I32:$val)>;
497 def : Pat<(truncstorei16 I32:$val,
498 (regPlusGA I32:$addr,
499 (WebAssemblywrapper tglobaladdr:$off))),
500 (STORE16_I32 tglobaladdr:$off, I32:$addr, I32:$val)>;
501 def : Pat<(truncstorei8 I64:$val,
502 (regPlusGA I32:$addr,
503 (WebAssemblywrapper tglobaladdr:$off))),
504 (STORE8_I64 tglobaladdr:$off, I32:$addr, I64:$val)>;
505 def : Pat<(truncstorei16 I64:$val,
506 (regPlusGA I32:$addr,
507 (WebAssemblywrapper tglobaladdr:$off))),
508 (STORE16_I64 tglobaladdr:$off, I32:$addr, I64:$val)>;
509 def : Pat<(truncstorei32 I64:$val,
510 (regPlusGA I32:$addr,
511 (WebAssemblywrapper tglobaladdr:$off))),
512 (STORE32_I64 tglobaladdr:$off, I32:$addr, I64:$val)>;
513 def : Pat<(truncstorei8 I32:$val, (add I32:$addr,
514 (WebAssemblywrapper texternalsym:$off))),
515 (STORE8_I32 texternalsym:$off, I32:$addr, I32:$val)>;
516 def : Pat<(truncstorei16 I32:$val,
518 (WebAssemblywrapper texternalsym:$off))),
519 (STORE16_I32 texternalsym:$off, I32:$addr, I32:$val)>;
520 def : Pat<(truncstorei8 I64:$val,
522 (WebAssemblywrapper texternalsym:$off))),
523 (STORE8_I64 texternalsym:$off, I32:$addr, I64:$val)>;
524 def : Pat<(truncstorei16 I64:$val,
526 (WebAssemblywrapper texternalsym:$off))),
527 (STORE16_I64 texternalsym:$off, I32:$addr, I64:$val)>;
528 def : Pat<(truncstorei32 I64:$val,
530 (WebAssemblywrapper texternalsym:$off))),
531 (STORE32_I64 texternalsym:$off, I32:$addr, I64:$val)>;
533 // Select truncating stores with just a constant offset.
534 def : Pat<(truncstorei8 I32:$val, imm:$off),
535 (STORE8_I32 imm:$off, (CONST_I32 0), I32:$val)>;
536 def : Pat<(truncstorei16 I32:$val, imm:$off),
537 (STORE16_I32 imm:$off, (CONST_I32 0), I32:$val)>;
538 def : Pat<(truncstorei8 I64:$val, imm:$off),
539 (STORE8_I64 imm:$off, (CONST_I32 0), I64:$val)>;
540 def : Pat<(truncstorei16 I64:$val, imm:$off),
541 (STORE16_I64 imm:$off, (CONST_I32 0), I64:$val)>;
542 def : Pat<(truncstorei32 I64:$val, imm:$off),
543 (STORE32_I64 imm:$off, (CONST_I32 0), I64:$val)>;
544 def : Pat<(truncstorei8 I32:$val, (WebAssemblywrapper tglobaladdr:$off)),
545 (STORE8_I32 tglobaladdr:$off, (CONST_I32 0), I32:$val)>;
546 def : Pat<(truncstorei16 I32:$val, (WebAssemblywrapper tglobaladdr:$off)),
547 (STORE16_I32 tglobaladdr:$off, (CONST_I32 0), I32:$val)>;
548 def : Pat<(truncstorei8 I64:$val, (WebAssemblywrapper tglobaladdr:$off)),
549 (STORE8_I64 tglobaladdr:$off, (CONST_I32 0), I64:$val)>;
550 def : Pat<(truncstorei16 I64:$val, (WebAssemblywrapper tglobaladdr:$off)),
551 (STORE16_I64 tglobaladdr:$off, (CONST_I32 0), I64:$val)>;
552 def : Pat<(truncstorei32 I64:$val, (WebAssemblywrapper tglobaladdr:$off)),
553 (STORE32_I64 tglobaladdr:$off, (CONST_I32 0), I64:$val)>;
554 def : Pat<(truncstorei8 I32:$val, (WebAssemblywrapper texternalsym:$off)),
555 (STORE8_I32 texternalsym:$off, (CONST_I32 0), I32:$val)>;
556 def : Pat<(truncstorei16 I32:$val, (WebAssemblywrapper texternalsym:$off)),
557 (STORE16_I32 texternalsym:$off, (CONST_I32 0), I32:$val)>;
558 def : Pat<(truncstorei8 I64:$val, (WebAssemblywrapper texternalsym:$off)),
559 (STORE8_I64 texternalsym:$off, (CONST_I32 0), I64:$val)>;
560 def : Pat<(truncstorei16 I64:$val, (WebAssemblywrapper texternalsym:$off)),
561 (STORE16_I64 texternalsym:$off, (CONST_I32 0), I64:$val)>;
562 def : Pat<(truncstorei32 I64:$val, (WebAssemblywrapper texternalsym:$off)),
563 (STORE32_I64 texternalsym:$off, (CONST_I32 0), I64:$val)>;
565 let Defs = [ARGUMENTS] in {
568 def MEMORY_SIZE_I32 : I<(outs I32:$dst), (ins),
569 [(set I32:$dst, (int_wasm_memory_size))],
570 "memory_size\t$dst">,
571 Requires<[HasAddr32]>;
572 def MEMORY_SIZE_I64 : I<(outs I64:$dst), (ins),
573 [(set I64:$dst, (int_wasm_memory_size))],
574 "memory_size\t$dst">,
575 Requires<[HasAddr64]>;
578 def GROW_MEMORY_I32 : I<(outs), (ins I32:$delta),
579 [(int_wasm_grow_memory I32:$delta)],
580 "grow_memory\t$delta">,
581 Requires<[HasAddr32]>;
582 def GROW_MEMORY_I64 : I<(outs), (ins I64:$delta),
583 [(int_wasm_grow_memory I64:$delta)],
584 "grow_memory\t$delta">,
585 Requires<[HasAddr64]>;
587 } // Defs = [ARGUMENTS]