1 //===-- WebAssemblyStoreResults.cpp - Optimize using store result values --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This file implements an optimization pass using store result values.
13 /// WebAssembly's store instructions return the stored value. This is to enable
14 /// an optimization wherein uses of the stored value can be replaced by uses of
15 /// the store's result value, making the stored value register more likely to
16 /// be single-use, thus more likely to be useful to register stackifying, and
17 /// potentially also exposing the store to register stackifying. These both can
18 /// reduce get_local/set_local traffic.
20 //===----------------------------------------------------------------------===//
22 #include "WebAssembly.h"
23 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
24 #include "WebAssemblyMachineFunctionInfo.h"
25 #include "WebAssemblySubtarget.h"
26 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
27 #include "llvm/CodeGen/MachineDominators.h"
28 #include "llvm/CodeGen/MachineRegisterInfo.h"
29 #include "llvm/CodeGen/Passes.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/raw_ostream.h"
34 #define DEBUG_TYPE "wasm-store-results"
37 class WebAssemblyStoreResults final : public MachineFunctionPass {
39 static char ID; // Pass identification, replacement for typeid
40 WebAssemblyStoreResults() : MachineFunctionPass(ID) {}
42 const char *getPassName() const override {
43 return "WebAssembly Store Results";
46 void getAnalysisUsage(AnalysisUsage &AU) const override {
48 AU.addRequired<MachineBlockFrequencyInfo>();
49 AU.addPreserved<MachineBlockFrequencyInfo>();
50 AU.addRequired<MachineDominatorTree>();
51 AU.addPreserved<MachineDominatorTree>();
52 MachineFunctionPass::getAnalysisUsage(AU);
55 bool runOnMachineFunction(MachineFunction &MF) override;
59 } // end anonymous namespace
61 char WebAssemblyStoreResults::ID = 0;
62 FunctionPass *llvm::createWebAssemblyStoreResults() {
63 return new WebAssemblyStoreResults();
66 bool WebAssemblyStoreResults::runOnMachineFunction(MachineFunction &MF) {
68 dbgs() << "********** Store Results **********\n"
69 << "********** Function: " << MF.getName() << '\n';
72 const MachineRegisterInfo &MRI = MF.getRegInfo();
73 MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>();
75 assert(MRI.isSSA() && "StoreResults depends on SSA form");
77 for (auto &MBB : MF) {
78 DEBUG(dbgs() << "Basic Block: " << MBB.getName() << '\n');
80 switch (MI.getOpcode()) {
83 case WebAssembly::STORE8_I32:
84 case WebAssembly::STORE16_I32:
85 case WebAssembly::STORE8_I64:
86 case WebAssembly::STORE16_I64:
87 case WebAssembly::STORE32_I64:
88 case WebAssembly::STORE_F32:
89 case WebAssembly::STORE_F64:
90 case WebAssembly::STORE_I32:
91 case WebAssembly::STORE_I64:
92 unsigned ToReg = MI.getOperand(0).getReg();
93 unsigned FromReg = MI.getOperand(3).getReg();
94 for (auto I = MRI.use_begin(FromReg), E = MRI.use_end(); I != E;) {
95 MachineOperand &O = *I++;
96 MachineInstr *Where = O.getParent();
97 if (Where->getOpcode() == TargetOpcode::PHI) {
98 // PHIs use their operands on their incoming CFG edges rather than
99 // in their parent blocks. Get the basic block paired with this use
100 // of FromReg and check that MI's block dominates it.
101 MachineBasicBlock *Pred =
102 Where->getOperand(&O - &Where->getOperand(0) + 1).getMBB();
103 if (!MDT.dominates(&MBB, Pred))
106 // For a non-PHI, check that MI dominates the instruction in the
108 if (&MI == Where || !MDT.dominates(&MI, Where))
111 DEBUG(dbgs() << "Setting operand " << O << " in " << *Where
112 << " from " << MI << "\n");