1 //===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file includes code for rendering MCInst instances as AT&T-style
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
16 #include "X86ATTInstPrinter.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCAsmInfo.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/Format.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "X86GenInstrNames.inc"
26 // Include the auto-generated portion of the assembly writer.
27 #define MachineInstr MCInst
28 #define GET_INSTRUCTION_NAME
29 #include "X86GenAsmWriter.inc"
32 void X86ATTInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
33 StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const {
34 return getInstructionName(Opcode);
38 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
39 switch (MI->getOperand(Op).getImm()) {
40 default: llvm_unreachable("Invalid ssecc argument!");
41 case 0: O << "eq"; break;
42 case 1: O << "lt"; break;
43 case 2: O << "le"; break;
44 case 3: O << "unord"; break;
45 case 4: O << "neq"; break;
46 case 5: O << "nlt"; break;
47 case 6: O << "nle"; break;
48 case 7: O << "ord"; break;
52 /// print_pcrel_imm - This is used to print an immediate value that ends up
53 /// being encoded as a pc-relative value (e.g. for jumps and calls). These
54 /// print slightly differently than normal immediates. For example, a $ is not
56 void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
57 const MCOperand &Op = MI->getOperand(OpNo);
59 // Print this as a signed 32-bit value.
60 O << (int)Op.getImm();
62 assert(Op.isExpr() && "unknown pcrel immediate operand");
67 void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo) {
69 const MCOperand &Op = MI->getOperand(OpNo);
71 O << '%' << getRegisterName(Op.getReg());
72 } else if (Op.isImm()) {
73 O << '$' << Op.getImm();
75 if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
76 *CommentStream << format("imm = 0x%llX\n", (long long)Op.getImm());
79 assert(Op.isExpr() && "unknown operand kind in printOperand");
80 O << '$' << *Op.getExpr();
84 void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
85 const MCOperand &BaseReg = MI->getOperand(Op);
86 const MCOperand &IndexReg = MI->getOperand(Op+2);
87 const MCOperand &DispSpec = MI->getOperand(Op+3);
89 if (DispSpec.isImm()) {
90 int64_t DispVal = DispSpec.getImm();
91 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
94 assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
95 O << *DispSpec.getExpr();
98 if (IndexReg.getReg() || BaseReg.getReg()) {
100 if (BaseReg.getReg())
101 printOperand(MI, Op);
103 if (IndexReg.getReg()) {
105 printOperand(MI, Op+2);
106 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
108 O << ',' << ScaleVal;
114 void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op) {
115 // If this has a segment register, print it.
116 if (MI->getOperand(Op+4).getReg()) {
117 printOperand(MI, Op+4);
120 printLeaMemReference(MI, Op);