1 //===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file includes code for rendering MCInst instances as AT&T-style
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
16 #include "X86ATTInstPrinter.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCAsmInfo.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "X86GenInstrNames.inc"
25 // Include the auto-generated portion of the assembly writer.
26 #define MachineInstr MCInst
27 #define NO_ASM_WRITER_BOILERPLATE
28 #include "X86GenAsmWriter.inc"
31 void X86ATTInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
33 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
34 switch (MI->getOperand(Op).getImm()) {
35 default: llvm_unreachable("Invalid ssecc argument!");
36 case 0: O << "eq"; break;
37 case 1: O << "lt"; break;
38 case 2: O << "le"; break;
39 case 3: O << "unord"; break;
40 case 4: O << "neq"; break;
41 case 5: O << "nlt"; break;
42 case 6: O << "nle"; break;
43 case 7: O << "ord"; break;
47 /// print_pcrel_imm - This is used to print an immediate value that ends up
48 /// being encoded as a pc-relative value (e.g. for jumps and calls). These
49 /// print slightly differently than normal immediates. For example, a $ is not
51 void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
52 const MCOperand &Op = MI->getOperand(OpNo);
54 // Print this as a signed 32-bit value.
55 O << (int)Op.getImm();
57 assert(Op.isExpr() && "unknown pcrel immediate operand");
62 void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo) {
64 const MCOperand &Op = MI->getOperand(OpNo);
66 O << '%' << getRegisterName(Op.getReg());
67 } else if (Op.isImm()) {
68 O << '$' << Op.getImm();
70 assert(Op.isExpr() && "unknown operand kind in printOperand");
71 O << '$' << *Op.getExpr();
75 void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
76 const MCOperand &BaseReg = MI->getOperand(Op);
77 const MCOperand &IndexReg = MI->getOperand(Op+2);
78 const MCOperand &DispSpec = MI->getOperand(Op+3);
80 if (DispSpec.isImm()) {
81 int64_t DispVal = DispSpec.getImm();
82 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
85 assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
86 O << *DispSpec.getExpr();
89 if (IndexReg.getReg() || BaseReg.getReg()) {
94 if (IndexReg.getReg()) {
96 printOperand(MI, Op+2);
97 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
105 void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op) {
106 // If this has a segment register, print it.
107 if (MI->getOperand(Op+4).getReg()) {
108 printOperand(MI, Op+4);
111 printLeaMemReference(MI, Op);