1 //===-- X86MCInstLower.cpp - Convert X86 MachineInstr to an MCInst --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains code to lower X86 MachineInstrs to their corresponding
13 //===----------------------------------------------------------------------===//
15 #include "X86MCInstLower.h"
16 #include "X86AsmPrinter.h"
17 #include "X86COFFMachineModuleInfo.h"
18 #include "X86MCAsmInfo.h"
19 #include "llvm/Analysis/DebugInfo.h"
20 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
21 #include "llvm/MC/MCContext.h"
22 #include "llvm/MC/MCExpr.h"
23 #include "llvm/MC/MCInst.h"
24 #include "llvm/MC/MCStreamer.h"
25 #include "llvm/MC/MCSymbol.h"
26 #include "llvm/Target/Mangler.h"
27 #include "llvm/Support/FormattedStream.h"
28 #include "llvm/ADT/SmallString.h"
29 #include "llvm/Type.h"
33 const X86Subtarget &X86MCInstLower::getSubtarget() const {
34 return AsmPrinter.getSubtarget();
37 MachineModuleInfoMachO &X86MCInstLower::getMachOMMI() const {
38 assert(getSubtarget().isTargetDarwin() &&"Can only get MachO info on darwin");
39 return AsmPrinter.MMI->getObjFileInfo<MachineModuleInfoMachO>();
43 MCSymbol *X86MCInstLower::GetPICBaseSymbol() const {
44 const TargetLowering *TLI = AsmPrinter.TM.getTargetLowering();
45 return static_cast<const X86TargetLowering*>(TLI)->
46 getPICBaseSymbol(AsmPrinter.MF, Ctx);
49 /// GetSymbolFromOperand - Lower an MO_GlobalAddress or MO_ExternalSymbol
50 /// operand to an MCSymbol.
51 MCSymbol *X86MCInstLower::
52 GetSymbolFromOperand(const MachineOperand &MO) const {
53 assert((MO.isGlobal() || MO.isSymbol()) && "Isn't a symbol reference");
55 SmallString<128> Name;
58 assert(MO.isSymbol());
59 Name += AsmPrinter.MAI->getGlobalPrefix();
60 Name += MO.getSymbolName();
62 const GlobalValue *GV = MO.getGlobal();
63 bool isImplicitlyPrivate = false;
64 if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB ||
65 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
66 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE ||
67 MO.getTargetFlags() == X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE)
68 isImplicitlyPrivate = true;
70 Mang->getNameWithPrefix(Name, GV, isImplicitlyPrivate);
73 // If the target flags on the operand changes the name of the symbol, do that
74 // before we return the symbol.
75 switch (MO.getTargetFlags()) {
77 case X86II::MO_DLLIMPORT: {
78 // Handle dllimport linkage.
79 const char *Prefix = "__imp_";
80 Name.insert(Name.begin(), Prefix, Prefix+strlen(Prefix));
83 case X86II::MO_DARWIN_NONLAZY:
84 case X86II::MO_DARWIN_NONLAZY_PIC_BASE: {
85 Name += "$non_lazy_ptr";
86 MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name.str());
88 MachineModuleInfoImpl::StubValueTy &StubSym =
89 getMachOMMI().getGVStubEntry(Sym);
90 if (StubSym.getPointer() == 0) {
91 assert(MO.isGlobal() && "Extern symbol not handled yet");
93 MachineModuleInfoImpl::
94 StubValueTy(AsmPrinter.Mang->getSymbol(MO.getGlobal()),
95 !MO.getGlobal()->hasInternalLinkage());
99 case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: {
100 Name += "$non_lazy_ptr";
101 MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name.str());
102 MachineModuleInfoImpl::StubValueTy &StubSym =
103 getMachOMMI().getHiddenGVStubEntry(Sym);
104 if (StubSym.getPointer() == 0) {
105 assert(MO.isGlobal() && "Extern symbol not handled yet");
107 MachineModuleInfoImpl::
108 StubValueTy(AsmPrinter.Mang->getSymbol(MO.getGlobal()),
109 !MO.getGlobal()->hasInternalLinkage());
113 case X86II::MO_DARWIN_STUB: {
115 MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name.str());
116 MachineModuleInfoImpl::StubValueTy &StubSym =
117 getMachOMMI().getFnStubEntry(Sym);
118 if (StubSym.getPointer())
123 MachineModuleInfoImpl::
124 StubValueTy(AsmPrinter.Mang->getSymbol(MO.getGlobal()),
125 !MO.getGlobal()->hasInternalLinkage());
127 Name.erase(Name.end()-5, Name.end());
129 MachineModuleInfoImpl::
130 StubValueTy(Ctx.GetOrCreateSymbol(Name.str()), false);
136 return Ctx.GetOrCreateSymbol(Name.str());
139 MCOperand X86MCInstLower::LowerSymbolOperand(const MachineOperand &MO,
140 MCSymbol *Sym) const {
141 // FIXME: We would like an efficient form for this, so we don't have to do a
142 // lot of extra uniquing.
143 const MCExpr *Expr = 0;
144 MCSymbolRefExpr::VariantKind RefKind = MCSymbolRefExpr::VK_None;
146 switch (MO.getTargetFlags()) {
147 default: llvm_unreachable("Unknown target flag on GV operand");
148 case X86II::MO_NO_FLAG: // No flag.
149 // These affect the name of the symbol, not any suffix.
150 case X86II::MO_DARWIN_NONLAZY:
151 case X86II::MO_DLLIMPORT:
152 case X86II::MO_DARWIN_STUB:
155 case X86II::MO_TLSGD: RefKind = MCSymbolRefExpr::VK_TLSGD; break;
156 case X86II::MO_GOTTPOFF: RefKind = MCSymbolRefExpr::VK_GOTTPOFF; break;
157 case X86II::MO_INDNTPOFF: RefKind = MCSymbolRefExpr::VK_INDNTPOFF; break;
158 case X86II::MO_TPOFF: RefKind = MCSymbolRefExpr::VK_TPOFF; break;
159 case X86II::MO_NTPOFF: RefKind = MCSymbolRefExpr::VK_NTPOFF; break;
160 case X86II::MO_GOTPCREL: RefKind = MCSymbolRefExpr::VK_GOTPCREL; break;
161 case X86II::MO_GOT: RefKind = MCSymbolRefExpr::VK_GOT; break;
162 case X86II::MO_GOTOFF: RefKind = MCSymbolRefExpr::VK_GOTOFF; break;
163 case X86II::MO_PLT: RefKind = MCSymbolRefExpr::VK_PLT; break;
164 case X86II::MO_PIC_BASE_OFFSET:
165 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
166 case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE:
167 Expr = MCSymbolRefExpr::Create(Sym, Ctx);
168 // Subtract the pic base.
169 Expr = MCBinaryExpr::CreateSub(Expr,
170 MCSymbolRefExpr::Create(GetPICBaseSymbol(), Ctx),
172 if (MO.isJTI() && AsmPrinter.MAI->hasSetDirective()) {
173 // If .set directive is supported, use it to reduce the number of
174 // relocations the assembler will generate for differences between
175 // local labels. This is only safe when the symbols are in the same
176 // section so we are restricting it to jumptable references.
177 MCSymbol *Label = Ctx.CreateTempSymbol();
178 AsmPrinter.OutStreamer.EmitAssignment(Label, Expr);
179 Expr = MCSymbolRefExpr::Create(Label, Ctx);
185 Expr = MCSymbolRefExpr::Create(Sym, RefKind, Ctx);
187 if (!MO.isJTI() && MO.getOffset())
188 Expr = MCBinaryExpr::CreateAdd(Expr,
189 MCConstantExpr::Create(MO.getOffset(), Ctx),
191 return MCOperand::CreateExpr(Expr);
196 static void lower_subreg32(MCInst *MI, unsigned OpNo) {
197 // Convert registers in the addr mode according to subreg32.
198 unsigned Reg = MI->getOperand(OpNo).getReg();
200 MI->getOperand(OpNo).setReg(getX86SubSuperRegister(Reg, MVT::i32));
203 static void lower_lea64_32mem(MCInst *MI, unsigned OpNo) {
204 // Convert registers in the addr mode according to subreg64.
205 for (unsigned i = 0; i != 4; ++i) {
206 if (!MI->getOperand(OpNo+i).isReg()) continue;
208 unsigned Reg = MI->getOperand(OpNo+i).getReg();
209 if (Reg == 0) continue;
211 MI->getOperand(OpNo+i).setReg(getX86SubSuperRegister(Reg, MVT::i64));
215 /// LowerSubReg32_Op0 - Things like MOVZX16rr8 -> MOVZX32rr8.
216 static void LowerSubReg32_Op0(MCInst &OutMI, unsigned NewOpc) {
217 OutMI.setOpcode(NewOpc);
218 lower_subreg32(&OutMI, 0);
220 /// LowerUnaryToTwoAddr - R = setb -> R = sbb R, R
221 static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) {
222 OutMI.setOpcode(NewOpc);
223 OutMI.addOperand(OutMI.getOperand(0));
224 OutMI.addOperand(OutMI.getOperand(0));
228 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
229 OutMI.setOpcode(MI->getOpcode());
231 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
232 const MachineOperand &MO = MI->getOperand(i);
235 switch (MO.getType()) {
238 llvm_unreachable("unknown operand type");
239 case MachineOperand::MO_Register:
240 // Ignore all implicit register operands.
241 if (MO.isImplicit()) continue;
242 MCOp = MCOperand::CreateReg(MO.getReg());
244 case MachineOperand::MO_Immediate:
245 MCOp = MCOperand::CreateImm(MO.getImm());
247 case MachineOperand::MO_MachineBasicBlock:
248 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
249 MO.getMBB()->getSymbol(), Ctx));
251 case MachineOperand::MO_GlobalAddress:
252 MCOp = LowerSymbolOperand(MO, GetSymbolFromOperand(MO));
254 case MachineOperand::MO_ExternalSymbol:
255 MCOp = LowerSymbolOperand(MO, GetSymbolFromOperand(MO));
257 case MachineOperand::MO_JumpTableIndex:
258 MCOp = LowerSymbolOperand(MO, AsmPrinter.GetJTISymbol(MO.getIndex()));
260 case MachineOperand::MO_ConstantPoolIndex:
261 MCOp = LowerSymbolOperand(MO, AsmPrinter.GetCPISymbol(MO.getIndex()));
263 case MachineOperand::MO_BlockAddress:
264 MCOp = LowerSymbolOperand(MO,
265 AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()));
269 OutMI.addOperand(MCOp);
272 // Handle a few special cases to eliminate operand modifiers.
273 switch (OutMI.getOpcode()) {
274 case X86::LEA64_32r: // Handle 'subreg rewriting' for the lea64_32mem operand.
275 lower_lea64_32mem(&OutMI, 1);
277 case X86::MOVZX16rr8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr8); break;
278 case X86::MOVZX16rm8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm8); break;
279 case X86::MOVSX16rr8: LowerSubReg32_Op0(OutMI, X86::MOVSX32rr8); break;
280 case X86::MOVSX16rm8: LowerSubReg32_Op0(OutMI, X86::MOVSX32rm8); break;
281 case X86::MOVZX64rr32: LowerSubReg32_Op0(OutMI, X86::MOV32rr); break;
282 case X86::MOVZX64rm32: LowerSubReg32_Op0(OutMI, X86::MOV32rm); break;
283 case X86::MOV64ri64i32: LowerSubReg32_Op0(OutMI, X86::MOV32ri); break;
284 case X86::MOVZX64rr8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr8); break;
285 case X86::MOVZX64rm8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm8); break;
286 case X86::MOVZX64rr16: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr16); break;
287 case X86::MOVZX64rm16: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm16); break;
288 case X86::SETB_C8r: LowerUnaryToTwoAddr(OutMI, X86::SBB8rr); break;
289 case X86::SETB_C16r: LowerUnaryToTwoAddr(OutMI, X86::SBB16rr); break;
290 case X86::SETB_C32r: LowerUnaryToTwoAddr(OutMI, X86::SBB32rr); break;
291 case X86::SETB_C64r: LowerUnaryToTwoAddr(OutMI, X86::SBB64rr); break;
292 case X86::MOV8r0: LowerUnaryToTwoAddr(OutMI, X86::XOR8rr); break;
293 case X86::MOV32r0: LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); break;
294 case X86::MMX_V_SET0: LowerUnaryToTwoAddr(OutMI, X86::MMX_PXORrr); break;
295 case X86::MMX_V_SETALLONES:
296 LowerUnaryToTwoAddr(OutMI, X86::MMX_PCMPEQDrr); break;
297 case X86::FsFLD0SS: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
298 case X86::FsFLD0SD: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
299 case X86::V_SET0PS: LowerUnaryToTwoAddr(OutMI, X86::XORPSrr); break;
300 case X86::V_SET0PD: LowerUnaryToTwoAddr(OutMI, X86::XORPDrr); break;
301 case X86::V_SET0PI: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
302 case X86::V_SETALLONES: LowerUnaryToTwoAddr(OutMI, X86::PCMPEQDrr); break;
305 LowerSubReg32_Op0(OutMI, X86::MOV32r0); // MOV16r0 -> MOV32r0
306 LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
309 LowerSubReg32_Op0(OutMI, X86::MOV32r0); // MOV64r0 -> MOV32r0
310 LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
314 // The assembler backend wants to see branches in their small form and relax
315 // them to their large form. The JIT can only handle the large form because
316 // it does not do relaxation. For now, translate the large form to the
318 case X86::JMP_4: OutMI.setOpcode(X86::JMP_1); break;
319 case X86::JO_4: OutMI.setOpcode(X86::JO_1); break;
320 case X86::JNO_4: OutMI.setOpcode(X86::JNO_1); break;
321 case X86::JB_4: OutMI.setOpcode(X86::JB_1); break;
322 case X86::JAE_4: OutMI.setOpcode(X86::JAE_1); break;
323 case X86::JE_4: OutMI.setOpcode(X86::JE_1); break;
324 case X86::JNE_4: OutMI.setOpcode(X86::JNE_1); break;
325 case X86::JBE_4: OutMI.setOpcode(X86::JBE_1); break;
326 case X86::JA_4: OutMI.setOpcode(X86::JA_1); break;
327 case X86::JS_4: OutMI.setOpcode(X86::JS_1); break;
328 case X86::JNS_4: OutMI.setOpcode(X86::JNS_1); break;
329 case X86::JP_4: OutMI.setOpcode(X86::JP_1); break;
330 case X86::JNP_4: OutMI.setOpcode(X86::JNP_1); break;
331 case X86::JL_4: OutMI.setOpcode(X86::JL_1); break;
332 case X86::JGE_4: OutMI.setOpcode(X86::JGE_1); break;
333 case X86::JLE_4: OutMI.setOpcode(X86::JLE_1); break;
334 case X86::JG_4: OutMI.setOpcode(X86::JG_1); break;
338 void X86AsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
340 // Only the target-dependent form of DBG_VALUE should get here.
341 // Referencing the offset and metadata as NOps-2 and NOps-1 is
342 // probably portable to other targets; frame pointer location is not.
343 unsigned NOps = MI->getNumOperands();
345 O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
346 // cast away const; DIetc do not take const operands for some reason.
347 DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
350 // Frame address. Currently handles register +- offset only.
351 assert(MI->getOperand(0).isReg() && MI->getOperand(3).isImm());
352 O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 3, O);
355 printOperand(MI, NOps-2, O);
359 X86AsmPrinter::getDebugValueLocation(const MachineInstr *MI) const {
360 MachineLocation Location;
361 assert (MI->getNumOperands() == 7 && "Invalid no. of machine operands!");
362 // Frame address. Currently handles register +- offset only.
363 assert(MI->getOperand(0).isReg() && MI->getOperand(3).isImm());
364 Location.set(MI->getOperand(0).getReg(), MI->getOperand(3).getImm());
369 void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
370 X86MCInstLower MCInstLowering(OutContext, Mang, *this);
371 switch (MI->getOpcode()) {
372 case TargetOpcode::DBG_VALUE:
373 if (isVerbose() && OutStreamer.hasRawTextSupport()) {
375 raw_string_ostream OS(TmpStr);
376 PrintDebugValueComment(MI, OS);
377 OutStreamer.EmitRawText(StringRef(OS.str()));
381 case X86::MOVPC32r: {
383 // This is a pseudo op for a two instruction sequence with a label, which
390 MCSymbol *PICBase = MCInstLowering.GetPICBaseSymbol();
391 TmpInst.setOpcode(X86::CALLpcrel32);
392 // FIXME: We would like an efficient form for this, so we don't have to do a
393 // lot of extra uniquing.
394 TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create(PICBase,
396 OutStreamer.EmitInstruction(TmpInst);
399 OutStreamer.EmitLabel(PICBase);
402 TmpInst.setOpcode(X86::POP32r);
403 TmpInst.getOperand(0) = MCOperand::CreateReg(MI->getOperand(0).getReg());
404 OutStreamer.EmitInstruction(TmpInst);
409 // Lower the MO_GOT_ABSOLUTE_ADDRESS form of ADD32ri.
410 if (MI->getOperand(2).getTargetFlags() != X86II::MO_GOT_ABSOLUTE_ADDRESS)
413 // Okay, we have something like:
414 // EAX = ADD32ri EAX, MO_GOT_ABSOLUTE_ADDRESS(@MYGLOBAL)
416 // For this, we want to print something like:
417 // MYGLOBAL + (. - PICBASE)
418 // However, we can't generate a ".", so just emit a new label here and refer
420 MCSymbol *DotSym = OutContext.CreateTempSymbol();
421 OutStreamer.EmitLabel(DotSym);
423 // Now that we have emitted the label, lower the complex operand expression.
424 MCSymbol *OpSym = MCInstLowering.GetSymbolFromOperand(MI->getOperand(2));
426 const MCExpr *DotExpr = MCSymbolRefExpr::Create(DotSym, OutContext);
427 const MCExpr *PICBase =
428 MCSymbolRefExpr::Create(MCInstLowering.GetPICBaseSymbol(), OutContext);
429 DotExpr = MCBinaryExpr::CreateSub(DotExpr, PICBase, OutContext);
431 DotExpr = MCBinaryExpr::CreateAdd(MCSymbolRefExpr::Create(OpSym,OutContext),
432 DotExpr, OutContext);
435 TmpInst.setOpcode(X86::ADD32ri);
436 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
437 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
438 TmpInst.addOperand(MCOperand::CreateExpr(DotExpr));
439 OutStreamer.EmitInstruction(TmpInst);
445 MCInstLowering.Lower(MI, TmpInst);
447 OutStreamer.EmitInstruction(TmpInst);