1 //===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===//
3 // This file defines the pass which converts floating point instructions from
4 // virtual registers into register stack instructions.
6 //===----------------------------------------------------------------------===//
8 #define DEBUG_TYPE "fp"
10 #include "X86InstrInfo.h"
11 #include "llvm/CodeGen/MachineFunctionPass.h"
12 #include "llvm/CodeGen/MachineInstrBuilder.h"
13 #include "llvm/CodeGen/LiveVariables.h"
14 #include "llvm/Target/TargetInstrInfo.h"
15 #include "llvm/Target/TargetMachine.h"
16 #include "Support/Debug.h"
17 #include "Support/Statistic.h"
22 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
23 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions");
25 struct FPS : public MachineFunctionPass {
26 virtual bool runOnMachineFunction(MachineFunction &MF);
28 virtual const char *getPassName() const { return "X86 FP Stackifier"; }
30 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
31 AU.addRequired<LiveVariables>();
32 MachineFunctionPass::getAnalysisUsage(AU);
35 LiveVariables *LV; // Live variable info for current function...
36 MachineBasicBlock *MBB; // Current basic block
37 unsigned Stack[8]; // FP<n> Registers in each stack slot...
38 unsigned RegMap[8]; // Track which stack slot contains each register
39 unsigned StackTop; // The current top of the FP stack.
41 void dumpStack() const {
42 std::cerr << "Stack contents:";
43 for (unsigned i = 0; i != StackTop; ++i) {
44 std::cerr << " FP" << Stack[i];
45 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!");
50 // getSlot - Return the stack slot number a particular register number is
52 unsigned getSlot(unsigned RegNo) const {
53 assert(RegNo < 8 && "Regno out of range!");
57 // getStackEntry - Return the X86::FP<n> register in register ST(i)
58 unsigned getStackEntry(unsigned STi) const {
59 assert(STi < StackTop && "Access past stack top!");
60 return Stack[StackTop-1-STi];
63 // getSTReg - Return the X86::ST(i) register which contains the specified
65 unsigned getSTReg(unsigned RegNo) const {
66 return StackTop - 1 - getSlot(RegNo) + X86::ST0;
69 // pushReg - Push the specifiex FP<n> register onto the stack
70 void pushReg(unsigned Reg) {
71 assert(Reg < 8 && "Register number out of range!");
72 assert(StackTop < 8 && "Stack overflow!");
73 Stack[StackTop] = Reg;
74 RegMap[Reg] = StackTop++;
77 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; }
78 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) {
79 if (!isAtTop(RegNo)) {
80 unsigned Slot = getSlot(RegNo);
81 unsigned STReg = getSTReg(RegNo);
82 unsigned RegOnTop = getStackEntry(0);
84 // Swap the slots the regs are in
85 std::swap(RegMap[RegNo], RegMap[RegOnTop]);
87 // Swap stack slot contents
88 assert(RegMap[RegOnTop] < StackTop);
89 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]);
91 // Emit an fxch to update the runtime processors version of the state
92 MachineInstr *MI = BuildMI(X86::FXCH, 1).addReg(STReg);
93 I = 1+MBB->insert(I, MI);
98 void duplicateToTop(unsigned RegNo, unsigned AsReg,
99 MachineBasicBlock::iterator &I) {
100 unsigned STReg = getSTReg(RegNo);
101 pushReg(AsReg); // New register on top of stack
103 MachineInstr *MI = BuildMI(X86::FLDrr, 1).addReg(STReg);
104 I = 1+MBB->insert(I, MI);
107 // popStackAfter - Pop the current value off of the top of the FP stack
108 // after the specified instruction.
109 void popStackAfter(MachineBasicBlock::iterator &I);
111 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
113 void handleZeroArgFP(MachineBasicBlock::iterator &I);
114 void handleOneArgFP(MachineBasicBlock::iterator &I);
115 void handleTwoArgFP(MachineBasicBlock::iterator &I);
116 void handleSpecialFP(MachineBasicBlock::iterator &I);
120 Pass *createX86FloatingPointStackifierPass() { return new FPS(); }
122 /// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
123 /// register references into FP stack references.
125 bool FPS::runOnMachineFunction(MachineFunction &MF) {
126 LV = &getAnalysis<LiveVariables>();
129 bool Changed = false;
130 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
131 Changed |= processBasicBlock(MF, *I);
135 /// processBasicBlock - Loop over all of the instructions in the basic block,
136 /// transforming FP instructions into their stack form.
138 bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
139 const TargetInstrInfo &TII = MF.getTarget().getInstrInfo();
140 bool Changed = false;
143 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) {
144 MachineInstr *MI = *I;
145 MachineInstr *PrevMI = I == BB.begin() ? 0 : *(I-1);
146 unsigned Flags = TII.get(MI->getOpcode()).TSFlags;
148 if ((Flags & X86II::FPTypeMask) == 0) continue; // Ignore non-fp insts!
150 ++NumFP; // Keep track of # of pseudo instrs
151 DEBUG(std::cerr << "\nFPInst:\t";
152 MI->print(std::cerr, MF.getTarget()));
154 // Get dead variables list now because the MI pointer may be deleted as part
156 LiveVariables::killed_iterator IB = LV->dead_begin(MI);
157 LiveVariables::killed_iterator IE = LV->dead_end(MI);
159 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo();
160 LiveVariables::killed_iterator I = LV->killed_begin(MI);
161 LiveVariables::killed_iterator E = LV->killed_end(MI);
163 std::cerr << "Killed Operands:";
165 std::cerr << " %" << MRI->getName(I->second);
169 switch (Flags & X86II::FPTypeMask) {
170 case X86II::ZeroArgFP: handleZeroArgFP(I); break;
171 case X86II::OneArgFP: handleOneArgFP(I); break;
173 case X86II::OneArgFPRW: // ST(0) = fsqrt(ST(0))
174 assert(0 && "FP instr type not handled yet!");
176 case X86II::TwoArgFP: handleTwoArgFP(I); break;
177 case X86II::SpecialFP: handleSpecialFP(I); break;
178 default: assert(0 && "Unknown FP Type!");
181 // Check to see if any of the values defined by this instruction are dead
182 // after definition. If so, pop them.
183 for (; IB != IE; ++IB) {
184 unsigned Reg = IB->second;
185 if (Reg >= X86::FP0 && Reg <= X86::FP6) {
186 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
187 ++I; // Insert fxch AFTER the instruction
188 moveToTop(Reg-X86::FP0, I); // Insert fxch if neccesary
189 --I; // Move to fxch or old instruction
190 popStackAfter(I); // Pop the top of the stack, killing value
194 // Print out all of the instructions expanded to if -debug
195 DEBUG(if (*I == PrevMI) {
196 std::cerr<< "Just deleted pseudo instruction\n";
198 MachineBasicBlock::iterator Start = I;
199 // Rewind to first instruction newly inserted.
200 while (Start != BB.begin() && *(Start-1) != PrevMI) --Start;
201 std::cerr << "Inserted instructions:\n\t";
202 (*Start)->print(std::cerr, MF.getTarget());
203 while (++Start != I+1);
211 assert(StackTop == 0 && "Stack not empty at end of basic block?");
215 //===----------------------------------------------------------------------===//
216 // Efficient Lookup Table Support
217 //===----------------------------------------------------------------------===//
222 bool operator<(const TableEntry &TE) const { return from < TE.from; }
223 bool operator<(unsigned V) const { return from < V; }
226 static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
227 for (unsigned i = 0; i != NumEntries-1; ++i)
228 if (!(Table[i] < Table[i+1])) return false;
232 static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) {
233 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode);
234 if (I != Table+N && I->from == Opcode)
239 #define ARRAY_SIZE(TABLE) \
240 (sizeof(TABLE)/sizeof(TABLE[0]))
243 #define ASSERT_SORTED(TABLE)
245 #define ASSERT_SORTED(TABLE) \
246 { static bool TABLE##Checked = false; \
247 if (!TABLE##Checked) \
248 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \
249 "All lookup tables must be sorted for efficient access!"); \
254 //===----------------------------------------------------------------------===//
256 //===----------------------------------------------------------------------===//
258 // PopTable - Sorted map of instructions to their popping version. The first
259 // element is an instruction, the second is the version which pops.
261 static const TableEntry PopTable[] = {
262 { X86::FADDrST0 , X86::FADDPrST0 },
264 { X86::FDIVRrST0, X86::FDIVRPrST0 },
265 { X86::FDIVrST0 , X86::FDIVPrST0 },
267 { X86::FISTr16 , X86::FISTPr16 },
268 { X86::FISTr32 , X86::FISTPr32 },
270 { X86::FMULrST0 , X86::FMULPrST0 },
272 { X86::FSTr32 , X86::FSTPr32 },
273 { X86::FSTr64 , X86::FSTPr64 },
274 { X86::FSTrr , X86::FSTPrr },
276 { X86::FSUBRrST0, X86::FSUBRPrST0 },
277 { X86::FSUBrST0 , X86::FSUBPrST0 },
279 { X86::FUCOMPr , X86::FUCOMPPr },
280 { X86::FUCOMr , X86::FUCOMPr },
283 /// popStackAfter - Pop the current value off of the top of the FP stack after
284 /// the specified instruction. This attempts to be sneaky and combine the pop
285 /// into the instruction itself if possible. The iterator is left pointing to
286 /// the last instruction, be it a new pop instruction inserted, or the old
287 /// instruction if it was modified in place.
289 void FPS::popStackAfter(MachineBasicBlock::iterator &I) {
290 ASSERT_SORTED(PopTable);
291 assert(StackTop > 0 && "Cannot pop empty stack!");
292 RegMap[Stack[--StackTop]] = ~0; // Update state
294 // Check to see if there is a popping version of this instruction...
295 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), (*I)->getOpcode());
297 (*I)->setOpcode(Opcode);
298 if (Opcode == X86::FUCOMPPr)
299 (*I)->RemoveOperand(0);
301 } else { // Insert an explicit pop
302 MachineInstr *MI = BuildMI(X86::FSTPrr, 1).addReg(X86::ST0);
303 I = MBB->insert(I+1, MI);
307 static unsigned getFPReg(const MachineOperand &MO) {
308 assert(MO.isPhysicalRegister() && "Expected an FP register!");
309 unsigned Reg = MO.getReg();
310 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");
311 return Reg - X86::FP0;
315 //===----------------------------------------------------------------------===//
316 // Instruction transformation implementation
317 //===----------------------------------------------------------------------===//
319 /// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem>
321 void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) {
322 MachineInstr *MI = *I;
323 unsigned DestReg = getFPReg(MI->getOperand(0));
324 MI->RemoveOperand(0); // Remove the explicit ST(0) operand
326 // Result gets pushed on the stack...
330 /// handleOneArgFP - fst ST(0), <mem>
332 void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
333 MachineInstr *MI = *I;
334 assert(MI->getNumOperands() == 5 && "Can only handle fst* instructions!");
336 unsigned Reg = getFPReg(MI->getOperand(4));
337 bool KillsSrc = false;
338 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
339 E = LV->killed_end(MI); KI != E; ++KI)
340 KillsSrc |= KI->second == X86::FP0+Reg;
342 // FSTPr80 and FISTPr64 are strange because there are no non-popping versions.
343 // If we have one _and_ we don't want to pop the operand, duplicate the value
344 // on the stack instead of moving it. This ensure that popping the value is
347 if ((MI->getOpcode() == X86::FSTPr80 ||
348 MI->getOpcode() == X86::FISTPr64) && !KillsSrc) {
349 duplicateToTop(Reg, 7 /*temp register*/, I);
351 moveToTop(Reg, I); // Move to the top of the stack...
353 MI->RemoveOperand(4); // Remove explicit ST(0) operand
355 if (MI->getOpcode() == X86::FSTPr80 || MI->getOpcode() == X86::FISTPr64) {
356 assert(StackTop > 0 && "Stack empty??");
358 } else if (KillsSrc) { // Last use of operand?
363 //===----------------------------------------------------------------------===//
364 // Define tables of various ways to map pseudo instructions
367 // ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i)
368 static const TableEntry ForwardST0Table[] = {
369 { X86::FpADD, X86::FADDST0r },
370 { X86::FpDIV, X86::FDIVST0r },
371 { X86::FpMUL, X86::FMULST0r },
372 { X86::FpSUB, X86::FSUBST0r },
373 { X86::FpUCOM, X86::FUCOMr },
376 // ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
377 static const TableEntry ReverseST0Table[] = {
378 { X86::FpADD, X86::FADDST0r }, // commutative
379 { X86::FpDIV, X86::FDIVRST0r },
380 { X86::FpMUL, X86::FMULST0r }, // commutative
381 { X86::FpSUB, X86::FSUBRST0r },
385 // ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
386 static const TableEntry ForwardSTiTable[] = {
387 { X86::FpADD, X86::FADDrST0 }, // commutative
388 { X86::FpDIV, X86::FDIVRrST0 },
389 { X86::FpMUL, X86::FMULrST0 }, // commutative
390 { X86::FpSUB, X86::FSUBRrST0 },
391 { X86::FpUCOM, X86::FUCOMr },
394 // ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
395 static const TableEntry ReverseSTiTable[] = {
396 { X86::FpADD, X86::FADDrST0 },
397 { X86::FpDIV, X86::FDIVrST0 },
398 { X86::FpMUL, X86::FMULrST0 },
399 { X86::FpSUB, X86::FSUBrST0 },
404 /// handleTwoArgFP - Handle instructions like FADD and friends which are virtual
405 /// instructions which need to be simplified and possibly transformed.
407 /// Result: ST(0) = fsub ST(0), ST(i)
408 /// ST(i) = fsub ST(0), ST(i)
409 /// ST(0) = fsubr ST(0), ST(i)
410 /// ST(i) = fsubr ST(0), ST(i)
412 /// In addition to three address instructions, this also handles the FpUCOM
413 /// instruction which only has two operands, but no destination. This
414 /// instruction is also annoying because there is no "reverse" form of it
417 void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
418 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table);
419 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable);
420 MachineInstr *MI = *I;
422 unsigned NumOperands = MI->getNumOperands();
423 assert(NumOperands == 3 ||
424 (NumOperands == 2 && MI->getOpcode() == X86::FpUCOM) &&
425 "Illegal TwoArgFP instruction!");
426 unsigned Dest = getFPReg(MI->getOperand(0));
427 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
428 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
429 bool KillsOp0 = false, KillsOp1 = false;
431 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
432 E = LV->killed_end(MI); KI != E; ++KI) {
433 KillsOp0 |= (KI->second == X86::FP0+Op0);
434 KillsOp1 |= (KI->second == X86::FP0+Op1);
437 // If this is an FpUCOM instruction, we must make sure the first operand is on
438 // the top of stack, the other one can be anywhere...
439 if (MI->getOpcode() == X86::FpUCOM)
442 unsigned TOS = getStackEntry(0);
444 // One of our operands must be on the top of the stack. If neither is yet, we
446 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
447 // We can choose to move either operand to the top of the stack. If one of
448 // the operands is killed by this instruction, we want that one so that we
449 // can update right on top of the old version.
451 moveToTop(Op0, I); // Move dead operand to TOS.
453 } else if (KillsOp1) {
457 // All of the operands are live after this instruction executes, so we
458 // cannot update on top of any operand. Because of this, we must
459 // duplicate one of the stack elements to the top. It doesn't matter
460 // which one we pick.
462 duplicateToTop(Op0, Dest, I);
466 } else if (!KillsOp0 && !KillsOp1 && MI->getOpcode() != X86::FpUCOM) {
467 // If we DO have one of our operands at the top of the stack, but we don't
468 // have a dead operand, we must duplicate one of the operands to a new slot
470 duplicateToTop(Op0, Dest, I);
475 // Now we know that one of our operands is on the top of the stack, and at
476 // least one of our operands is killed by this instruction.
477 assert((TOS == Op0 || TOS == Op1) &&
478 (KillsOp0 || KillsOp1 || MI->getOpcode() == X86::FpUCOM) &&
479 "Stack conditions not set up right!");
481 // We decide which form to use based on what is on the top of the stack, and
482 // which operand is killed by this instruction.
483 const TableEntry *InstTable;
484 bool isForward = TOS == Op0;
485 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0);
488 InstTable = ForwardST0Table;
490 InstTable = ReverseST0Table;
493 InstTable = ForwardSTiTable;
495 InstTable = ReverseSTiTable;
498 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode());
499 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!");
501 // NotTOS - The register which is not on the top of stack...
502 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0;
504 // Replace the old instruction with a new instruction
505 *I = BuildMI(Opcode, 1).addReg(getSTReg(NotTOS));
507 // If both operands are killed, pop one off of the stack in addition to
508 // overwriting the other one.
509 if (KillsOp0 && KillsOp1 && Op0 != Op1) {
510 assert(!updateST0 && "Should have updated other operand!");
511 popStackAfter(I); // Pop the top of stack
514 // Insert an explicit pop of the "updated" operand for FUCOM
515 if (MI->getOpcode() == X86::FpUCOM) {
516 if (KillsOp0 && !KillsOp1)
517 popStackAfter(I); // If we kill the first operand, pop it!
518 else if (KillsOp1 && Op0 != Op1) {
519 if (getStackEntry(0) == Op1) {
520 popStackAfter(I); // If it's right at the top of stack, just pop it
522 // Otherwise, move the top of stack into the dead slot, killing the
523 // operand without having to add in an explicit xchg then pop.
525 unsigned STReg = getSTReg(Op1);
526 unsigned OldSlot = getSlot(Op1);
527 unsigned TopReg = Stack[StackTop-1];
528 Stack[OldSlot] = TopReg;
529 RegMap[TopReg] = OldSlot;
531 Stack[--StackTop] = ~0;
533 MachineInstr *MI = BuildMI(X86::FSTPrr, 1).addReg(STReg);
534 I = MBB->insert(I+1, MI);
539 // Update stack information so that we know the destination register is now on
541 if (MI->getOpcode() != X86::FpUCOM) {
542 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS);
543 assert(UpdatedSlot < StackTop && Dest < 7);
544 Stack[UpdatedSlot] = Dest;
545 RegMap[Dest] = UpdatedSlot;
547 delete MI; // Remove the old instruction
551 /// handleSpecialFP - Handle special instructions which behave unlike other
552 /// floating point instructions. This is primarily inteaded for use by pseudo
555 void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
556 MachineInstr *MI = *I;
557 switch (MI->getOpcode()) {
558 default: assert(0 && "Unknown SpecialFP instruction!");
559 case X86::FpGETRESULT: // Appears immediately after a call returning FP type!
560 assert(StackTop == 0 && "Stack should be empty after a call!");
561 pushReg(getFPReg(MI->getOperand(0)));
563 case X86::FpSETRESULT:
564 assert(StackTop == 1 && "Stack should have one element on it to return!");
565 --StackTop; // "Forget" we have something on the top of stack!
568 unsigned SrcReg = getFPReg(MI->getOperand(1));
569 unsigned DestReg = getFPReg(MI->getOperand(0));
570 bool KillsSrc = false;
571 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
572 E = LV->killed_end(MI); KI != E; ++KI)
573 KillsSrc |= KI->second == X86::FP0+SrcReg;
576 // If the input operand is killed, we can just change the owner of the
577 // incoming stack slot into the result.
578 unsigned Slot = getSlot(SrcReg);
579 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!");
580 Stack[Slot] = DestReg;
581 RegMap[DestReg] = Slot;
584 // For FMOV we just duplicate the specified value to a new stack slot.
585 // This could be made better, but would require substantial changes.
586 duplicateToTop(SrcReg, DestReg, I);
592 I = MBB->erase(I)-1; // Remove the pseudo instruction