1 //===-- X86MachObjectWriter.cpp - X86 Mach-O Writer -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/X86MCTargetDesc.h"
11 #include "MCTargetDesc/X86FixupKinds.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/MC/MCAsmLayout.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCContext.h"
16 #include "llvm/MC/MCMachObjectWriter.h"
17 #include "llvm/MC/MCSectionMachO.h"
18 #include "llvm/MC/MCValue.h"
19 #include "llvm/Object/MachOFormat.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/Format.h"
24 using namespace llvm::object;
27 class X86MachObjectWriter : public MCMachObjectTargetWriter {
28 bool RecordScatteredRelocation(MachObjectWriter *Writer,
29 const MCAssembler &Asm,
30 const MCAsmLayout &Layout,
31 const MCFragment *Fragment,
35 uint64_t &FixedValue);
36 void RecordTLVPRelocation(MachObjectWriter *Writer,
37 const MCAssembler &Asm,
38 const MCAsmLayout &Layout,
39 const MCFragment *Fragment,
42 uint64_t &FixedValue);
44 void RecordX86Relocation(MachObjectWriter *Writer,
45 const MCAssembler &Asm,
46 const MCAsmLayout &Layout,
47 const MCFragment *Fragment,
50 uint64_t &FixedValue);
51 void RecordX86_64Relocation(MachObjectWriter *Writer,
52 const MCAssembler &Asm,
53 const MCAsmLayout &Layout,
54 const MCFragment *Fragment,
57 uint64_t &FixedValue);
59 X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
61 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
62 /*UseAggressiveSymbolFolding=*/Is64Bit) {}
64 void RecordRelocation(MachObjectWriter *Writer,
65 const MCAssembler &Asm, const MCAsmLayout &Layout,
66 const MCFragment *Fragment, const MCFixup &Fixup,
67 MCValue Target, uint64_t &FixedValue) {
68 if (Writer->is64Bit())
69 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
72 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
78 static bool isFixupKindRIPRel(unsigned Kind) {
79 return Kind == X86::reloc_riprel_4byte ||
80 Kind == X86::reloc_riprel_4byte_movq_load;
83 static unsigned getFixupKindLog2Size(unsigned Kind) {
86 llvm_unreachable("invalid fixup kind!");
88 case FK_Data_1: return 0;
90 case FK_Data_2: return 1;
92 // FIXME: Remove these!!!
93 case X86::reloc_riprel_4byte:
94 case X86::reloc_riprel_4byte_movq_load:
95 case X86::reloc_signed_4byte:
96 case FK_Data_4: return 2;
97 case FK_Data_8: return 3;
101 void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
102 const MCAssembler &Asm,
103 const MCAsmLayout &Layout,
104 const MCFragment *Fragment,
105 const MCFixup &Fixup,
107 uint64_t &FixedValue) {
108 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
109 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind());
110 unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
113 uint32_t FixupOffset =
114 Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
115 uint32_t FixupAddress =
116 Writer->getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
119 unsigned IsExtern = 0;
122 Value = Target.getConstant();
125 // Compensate for the relocation offset, Darwin x86_64 relocations only have
126 // the addend and appear to have attempted to define it to be the actual
127 // expression addend without the PCrel bias. However, instructions with data
128 // following the relocation are not accommodated for (see comment below
129 // regarding SIGNED{1,2,4}), so it isn't exactly that either.
130 Value += 1LL << Log2Size;
133 if (Target.isAbsolute()) { // constant
134 // SymbolNum of 0 indicates the absolute section.
135 Type = macho::RIT_X86_64_Unsigned;
138 // FIXME: I believe this is broken, I don't think the linker can understand
139 // it. I think it would require a local relocation, but I'm not sure if that
140 // would work either. The official way to get an absolute PCrel relocation
141 // is to use an absolute symbol (which we don't support yet).
144 Type = macho::RIT_X86_64_Branch;
146 } else if (Target.getSymB()) { // A - B + constant
147 const MCSymbol *A = &Target.getSymA()->getSymbol();
148 MCSymbolData &A_SD = Asm.getSymbolData(*A);
149 const MCSymbolData *A_Base = Asm.getAtom(&A_SD);
151 const MCSymbol *B = &Target.getSymB()->getSymbol();
152 MCSymbolData &B_SD = Asm.getSymbolData(*B);
153 const MCSymbolData *B_Base = Asm.getAtom(&B_SD);
155 // Neither symbol can be modified.
156 if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
157 Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
158 report_fatal_error("unsupported relocation of modified symbol");
160 // We don't support PCrel relocations of differences. Darwin 'as' doesn't
161 // implement most of these correctly.
163 report_fatal_error("unsupported pc-relative relocation of difference");
165 // The support for the situation where one or both of the symbols would
166 // require a local relocation is handled just like if the symbols were
167 // external. This is certainly used in the case of debug sections where the
168 // section has only temporary symbols and thus the symbols don't have base
169 // symbols. This is encoded using the section ordinal and non-extern
170 // relocation entries.
172 // Darwin 'as' doesn't emit correct relocations for this (it ends up with a
173 // single SIGNED relocation); reject it for now. Except the case where both
174 // symbols don't have a base, equal but both NULL.
175 if (A_Base == B_Base && A_Base)
176 report_fatal_error("unsupported relocation with identical base");
178 Value += Writer->getSymbolAddress(&A_SD, Layout) -
179 (A_Base == NULL ? 0 : Writer->getSymbolAddress(A_Base, Layout));
180 Value -= Writer->getSymbolAddress(&B_SD, Layout) -
181 (B_Base == NULL ? 0 : Writer->getSymbolAddress(B_Base, Layout));
184 Index = A_Base->getIndex();
188 Index = A_SD.getFragment()->getParent()->getOrdinal() + 1;
191 Type = macho::RIT_X86_64_Unsigned;
193 macho::RelocationEntry MRE;
194 MRE.Word0 = FixupOffset;
195 MRE.Word1 = ((Index << 0) |
200 Writer->addRelocation(Fragment->getParent(), MRE);
203 Index = B_Base->getIndex();
207 Index = B_SD.getFragment()->getParent()->getOrdinal() + 1;
210 Type = macho::RIT_X86_64_Subtractor;
212 const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
213 MCSymbolData &SD = Asm.getSymbolData(*Symbol);
214 const MCSymbolData *Base = Asm.getAtom(&SD);
216 // Relocations inside debug sections always use local relocations when
217 // possible. This seems to be done because the debugger doesn't fully
218 // understand x86_64 relocation entries, and expects to find values that
219 // have already been fixed up.
220 if (Symbol->isInSection()) {
221 const MCSectionMachO &Section = static_cast<const MCSectionMachO&>(
222 Fragment->getParent()->getSection());
223 if (Section.hasAttribute(MCSectionMachO::S_ATTR_DEBUG))
227 // x86_64 almost always uses external relocations, except when there is no
228 // symbol to use as a base address (a local symbol with no preceding
229 // non-local symbol).
231 Index = Base->getIndex();
234 // Add the local offset, if needed.
236 Value += Layout.getSymbolOffset(&SD) - Layout.getSymbolOffset(Base);
237 } else if (Symbol->isInSection() && !Symbol->isVariable()) {
238 // The index is the section ordinal (1-based).
239 Index = SD.getFragment()->getParent()->getOrdinal() + 1;
241 Value += Writer->getSymbolAddress(&SD, Layout);
244 Value -= FixupAddress + (1 << Log2Size);
245 } else if (Symbol->isVariable()) {
246 const MCExpr *Value = Symbol->getVariableValue();
248 bool isAbs = Value->EvaluateAsAbsolute(Res, Layout,
249 Writer->getSectionAddressMap());
254 report_fatal_error("unsupported relocation of variable '" +
255 Symbol->getName() + "'");
258 report_fatal_error("unsupported relocation of undefined symbol '" +
259 Symbol->getName() + "'");
262 MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind();
265 if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
266 // x86_64 distinguishes movq foo@GOTPCREL so that the linker can
267 // rewrite the movq to an leaq at link time if the symbol ends up in
268 // the same linkage unit.
269 if (unsigned(Fixup.getKind()) == X86::reloc_riprel_4byte_movq_load)
270 Type = macho::RIT_X86_64_GOTLoad;
272 Type = macho::RIT_X86_64_GOT;
273 } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
274 Type = macho::RIT_X86_64_TLV;
275 } else if (Modifier != MCSymbolRefExpr::VK_None) {
276 report_fatal_error("unsupported symbol modifier in relocation");
278 Type = macho::RIT_X86_64_Signed;
280 // The Darwin x86_64 relocation format has a problem where it cannot
281 // encode an address (L<foo> + <constant>) which is outside the atom
282 // containing L<foo>. Generally, this shouldn't occur but it does
283 // happen when we have a RIPrel instruction with data following the
284 // relocation entry (e.g., movb $012, L0(%rip)). Even with the PCrel
285 // adjustment Darwin x86_64 uses, the offset is still negative and the
286 // linker has no way to recognize this.
288 // To work around this, Darwin uses several special relocation types
289 // to indicate the offsets. However, the specification or
290 // implementation of these seems to also be incomplete; they should
291 // adjust the addend as well based on the actual encoded instruction
292 // (the additional bias), but instead appear to just look at the final
294 switch (-(Target.getConstant() + (1LL << Log2Size))) {
295 case 1: Type = macho::RIT_X86_64_Signed1; break;
296 case 2: Type = macho::RIT_X86_64_Signed2; break;
297 case 4: Type = macho::RIT_X86_64_Signed4; break;
301 if (Modifier != MCSymbolRefExpr::VK_None)
302 report_fatal_error("unsupported symbol modifier in branch "
305 Type = macho::RIT_X86_64_Branch;
308 if (Modifier == MCSymbolRefExpr::VK_GOT) {
309 Type = macho::RIT_X86_64_GOT;
310 } else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
311 // GOTPCREL is allowed as a modifier on non-PCrel instructions, in which
312 // case all we do is set the PCrel bit in the relocation entry; this is
313 // used with exception handling, for example. The source is required to
314 // include any necessary offset directly.
315 Type = macho::RIT_X86_64_GOT;
317 } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
318 report_fatal_error("TLVP symbol modifier should have been rip-rel");
319 } else if (Modifier != MCSymbolRefExpr::VK_None)
320 report_fatal_error("unsupported symbol modifier in relocation");
322 Type = macho::RIT_X86_64_Unsigned;
326 // x86_64 always writes custom values into the fixups.
329 // struct relocation_info (8 bytes)
330 macho::RelocationEntry MRE;
331 MRE.Word0 = FixupOffset;
332 MRE.Word1 = ((Index << 0) |
337 Writer->addRelocation(Fragment->getParent(), MRE);
340 bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
341 const MCAssembler &Asm,
342 const MCAsmLayout &Layout,
343 const MCFragment *Fragment,
344 const MCFixup &Fixup,
347 uint64_t &FixedValue) {
348 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
349 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
350 unsigned Type = macho::RIT_Vanilla;
353 const MCSymbol *A = &Target.getSymA()->getSymbol();
354 MCSymbolData *A_SD = &Asm.getSymbolData(*A);
356 if (!A_SD->getFragment())
357 report_fatal_error("symbol '" + A->getName() +
358 "' can not be undefined in a subtraction expression");
360 uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
361 uint64_t SecAddr = Writer->getSectionAddress(A_SD->getFragment()->getParent());
362 FixedValue += SecAddr;
365 if (const MCSymbolRefExpr *B = Target.getSymB()) {
366 MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
368 if (!B_SD->getFragment())
369 report_fatal_error("symbol '" + B->getSymbol().getName() +
370 "' can not be undefined in a subtraction expression");
372 // Select the appropriate difference relocation type.
374 // Note that there is no longer any semantic difference between these two
375 // relocation types from the linkers point of view, this is done solely for
376 // pedantic compatibility with 'as'.
377 Type = A_SD->isExternal() ? (unsigned)macho::RIT_Difference :
378 (unsigned)macho::RIT_Generic_LocalDifference;
379 Value2 = Writer->getSymbolAddress(B_SD, Layout);
380 FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
383 // Relocations are written out in reverse order, so the PAIR comes first.
384 if (Type == macho::RIT_Difference ||
385 Type == macho::RIT_Generic_LocalDifference) {
386 // If the offset is too large to fit in a scattered relocation,
387 // we're hosed. It's an unfortunate limitation of the MachO format.
388 if (FixupOffset > 0xffffff) {
390 format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
391 Asm.getContext().FatalError(Fixup.getLoc(),
392 Twine("Section too large, can't encode "
393 "r_address (") + Buffer +
394 ") into 24 bits of scattered "
395 "relocation entry.");
396 llvm_unreachable("fatal error returned?!");
399 macho::RelocationEntry MRE;
400 MRE.Word0 = ((0 << 0) |
401 (macho::RIT_Pair << 24) |
404 macho::RF_Scattered);
406 Writer->addRelocation(Fragment->getParent(), MRE);
408 // If the offset is more than 24-bits, it won't fit in a scattered
409 // relocation offset field, so we fall back to using a non-scattered
410 // relocation. This is a bit risky, as if the offset reaches out of
411 // the block and the linker is doing scattered loading on this
412 // symbol, things can go badly.
414 // Required for 'as' compatibility.
415 if (FixupOffset > 0xffffff)
419 macho::RelocationEntry MRE;
420 MRE.Word0 = ((FixupOffset << 0) |
424 macho::RF_Scattered);
426 Writer->addRelocation(Fragment->getParent(), MRE);
430 void X86MachObjectWriter::RecordTLVPRelocation(MachObjectWriter *Writer,
431 const MCAssembler &Asm,
432 const MCAsmLayout &Layout,
433 const MCFragment *Fragment,
434 const MCFixup &Fixup,
436 uint64_t &FixedValue) {
437 assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
439 "Should only be called with a 32-bit TLVP relocation!");
441 unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
442 uint32_t Value = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
443 unsigned IsPCRel = 0;
445 // Get the symbol data.
446 MCSymbolData *SD_A = &Asm.getSymbolData(Target.getSymA()->getSymbol());
447 unsigned Index = SD_A->getIndex();
449 // We're only going to have a second symbol in pic mode and it'll be a
450 // subtraction from the picbase. For 32-bit pic the addend is the difference
451 // between the picbase and the next address. For 32-bit static the addend is
453 if (Target.getSymB()) {
454 // If this is a subtraction then we're pcrel.
455 uint32_t FixupAddress =
456 Writer->getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
457 MCSymbolData *SD_B = &Asm.getSymbolData(Target.getSymB()->getSymbol());
459 FixedValue = (FixupAddress - Writer->getSymbolAddress(SD_B, Layout) +
460 Target.getConstant());
461 FixedValue += 1ULL << Log2Size;
466 // struct relocation_info (8 bytes)
467 macho::RelocationEntry MRE;
469 MRE.Word1 = ((Index << 0) |
472 (1 << 27) | // Extern
473 (macho::RIT_Generic_TLV << 28)); // Type
474 Writer->addRelocation(Fragment->getParent(), MRE);
477 void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
478 const MCAssembler &Asm,
479 const MCAsmLayout &Layout,
480 const MCFragment *Fragment,
481 const MCFixup &Fixup,
483 uint64_t &FixedValue) {
484 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
485 unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
487 // If this is a 32-bit TLVP reloc it's handled a bit differently.
488 if (Target.getSymA() &&
489 Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP) {
490 RecordTLVPRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
495 // If this is a difference or a defined symbol plus an offset, then we need a
496 // scattered relocation entry. Differences always require scattered
498 if (Target.getSymB()) {
499 RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
500 Target, Log2Size, FixedValue);
504 // Get the symbol data, if any.
505 MCSymbolData *SD = 0;
506 if (Target.getSymA())
507 SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
509 // If this is an internal relocation with an offset, it also needs a scattered
511 uint32_t Offset = Target.getConstant();
513 Offset += 1 << Log2Size;
514 // Try to record the scattered relocation if needed. Fall back to non
515 // scattered if necessary (see comments in RecordScatteredRelocation()
517 if (Offset && SD && !Writer->doesSymbolRequireExternRelocation(SD) &&
518 RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
519 Target, Log2Size, FixedValue))
523 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
525 unsigned IsExtern = 0;
528 if (Target.isAbsolute()) { // constant
529 // SymbolNum of 0 indicates the absolute section.
531 // FIXME: Currently, these are never generated (see code below). I cannot
532 // find a case where they are actually emitted.
533 Type = macho::RIT_Vanilla;
535 // Resolve constant variables.
536 if (SD->getSymbol().isVariable()) {
538 if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
539 Res, Layout, Writer->getSectionAddressMap())) {
545 // Check whether we need an external or internal relocation.
546 if (Writer->doesSymbolRequireExternRelocation(SD)) {
548 Index = SD->getIndex();
549 // For external relocations, make sure to offset the fixup value to
550 // compensate for the addend of the symbol address, if it was
551 // undefined. This occurs with weak definitions, for example.
552 if (!SD->Symbol->isUndefined())
553 FixedValue -= Layout.getSymbolOffset(SD);
555 // The index is the section ordinal (1-based).
556 const MCSectionData &SymSD = Asm.getSectionData(
557 SD->getSymbol().getSection());
558 Index = SymSD.getOrdinal() + 1;
559 FixedValue += Writer->getSectionAddress(&SymSD);
562 FixedValue -= Writer->getSectionAddress(Fragment->getParent());
564 Type = macho::RIT_Vanilla;
567 // struct relocation_info (8 bytes)
568 macho::RelocationEntry MRE;
569 MRE.Word0 = FixupOffset;
570 MRE.Word1 = ((Index << 0) |
575 Writer->addRelocation(Fragment->getParent(), MRE);
578 MCObjectWriter *llvm::createX86MachObjectWriter(raw_ostream &OS,
581 uint32_t CPUSubtype) {
582 return createMachObjectWriter(new X86MachObjectWriter(Is64Bit,
585 OS, /*IsLittleEndian=*/true);