1 ##===- lib/Target/X86/Makefile -----------------------------*- Makefile -*-===##
3 # The LLVM Compiler Infrastructure
5 # This file was developed by the LLVM research group and is distributed under
6 # the University of Illinois Open Source License. See LICENSE.TXT for details.
8 ##===----------------------------------------------------------------------===##
11 include $(LEVEL)/Makefile.common
13 # Make sure that tblgen is run, first thing.
14 $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
15 X86GenRegisterInfo.inc X86GenInstrNames.inc \
16 X86GenInstrInfo.inc X86GenSimpInstrSelector.inc \
17 X86GenInstrSelector.inc
19 X86GenRegisterNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
20 $(SourceDir)/../Target.td $(TBLGEN)
21 @echo "Building X86.td register names with tblgen"
22 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
24 X86GenRegisterInfo.h.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
25 $(SourceDir)/../Target.td $(TBLGEN)
26 @echo "Building X86.td register information header with tblgen"
27 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
29 X86GenRegisterInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
30 $(SourceDir)/../Target.td $(TBLGEN)
31 @echo "Building X86.td register information implementation with tblgen"
32 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
34 X86GenInstrNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
35 $(SourceDir)/../Target.td $(TBLGEN)
36 @echo "Building X86.td instruction names with tblgen"
37 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
39 X86GenInstrInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
40 $(SourceDir)/../Target.td $(TBLGEN)
41 @echo "Building X86.td instruction information with tblgen"
42 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
44 X86GenSimpInstrSelector.inc:: $(SourceDir)/X86InstrSel.td $(TBLGEN)
45 @echo "Building X86.td simple instruction selector with tblgen"
46 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-simp-instr-sel -o $@
48 X86GenInstrSelector.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
49 $(SourceDir)/../Target.td $(TBLGEN)
50 @echo "Building X86.td instruction selector with tblgen"
51 $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@